igneum-labs
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c43880ef41
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Class v6 10.0j (after the landing): the multi-family adversary lane's macro-window core (k 0.40 node-for-node; the window knob buys the card nothing against a macro file) carried beside the k lane's model as a disagreement the placed rows settle
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 15:13:27 +00:00 |
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igneum-labs
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7e5897dc32
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Class v6 10.0i: the adversary's re-optimised core (the gated base k 0.37 at N3, the gated window 0.50, +0.13 of k the window's honest defence; the placed ungated core +64 percent over synthesis) and the bracket the served figures sit in until the placed gated rows at 17:30
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 15:04:41 +00:00 |
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igneum-labs
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e1d397e8b0
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Merge the mirror's master da5e1e8a into counter-asic-4 (the coord record lane's earlier copy of class-v6-rotating-family.md superseded by this branch's)
# Conflicts:
# docs/design/class-v6-rotating-family.md
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2026-10-08 15:03:33 +00:00 |
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igneum-labs
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da5e1e8a69
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Merge ca3-coord-record 7fdd094a into master (gate: green on 7fdd094a, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 14:58:07 +00:00 |
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igneum-labs
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01d2848791
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Class v6: the window's card cost MEASURED (within 5 percent per load with the liveness chain, no spill); the served sentence's one word made honest (adopts, retains across every rotation); lane D's report (x16 over the verifier gate; the genesis table's 75-point spelling under test); lane C's drawn-era F8 read (the per-load class must take (c''')); lane 1's memory-clock ladder (the memory side bought one for one with the rate)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:56:22 +00:00 |
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igneum-labs
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33c0a58b65
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Merge class-v6-floor-sm-docs-2 308aa4a7 into master (gate: green on 308aa4a7, recorded by tools/ci/pre-push.sh; landed on the box mirror under the exception declared by main: main's ruling, 7 Oct 2026 19:5x UK: the GitHub account is suspended, lanes land on the box mirror's master, the box gate stamp is the verdict; GitHub gets the fast-forward when it answers)
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2026-10-08 14:56:22 +00:00 |
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igneum-labs
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164803dd63
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Merge reference-apps 11982954 into master (gate: green on 11982954, recorded by tools/ci/pre-push.sh; landed on the box mirror)
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2026-10-08 14:55:35 +00:00 |
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igneum-labs
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7fdd094ab8
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Counter ASIC 3.0 status: the register window's measured set on the 5090 and 4090 (at most 5 percent per load, no spill, no rate per unit of work), all five floor documents on master, lane C's drawn-era F8 row (layer 5 takes the floor), lane D's full report 3958f0d29, lane 5's served text read, the build order's amendments relayed; the 7 October public-text file marked superseded
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:50:51 +00:00 |
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igneum-labs
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308aa4a7da
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Class v6 floor lane 1: sm-sparse.md amendment, the memory-clock ladder on PC 1 at the 1,300 lock (the 5090's PHY has two states, 13,801 and 7,001 MHz; the half-rate state loses 43 percent of rate for 37 percent of watts, energy per hash up 12 percent on class v3 and 5 on class v4: the memory clock is not a lever; the memory path read as 11 nJ per read at the margin, equal to the DRAM chase probes)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of 6d666ce9d (6d666ce9d6) for the box mirror master
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2026-10-08 14:49:41 +00:00 |
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igneum-labs
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1198295463
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Merge remote-tracking branch 'build/master' into reference-apps
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2026-10-08 14:48:24 +00:00 |
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igneum-labs
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18ae1a31b5
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Reference apps, the review's four orders: /receipt is a transaction inclusion receipt in title, copy, file and the offline verifier's output (a payment receipt authenticates the outcome and is named as the next step); /light states its trusted inputs in one block and reads as a verification path with stated trust assumptions; /oracle discloses the deployer-installed voter table and the unchecked aggregator signature on the page and in trust() (oracle redeployed on the shared verifier, 0x3ad71d46, chain id accepted before and after the class v5 floor); the four words included, executed, proven, finalised defined once in site/partials/terms.html and injected on the three pages
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:48:23 +00:00 |
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igneum-labs
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3958f0d29c
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Merge class-v6-family-gate 4eca18c3 into master (gate: green on 4eca18c3, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 14:46:07 +00:00 |
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igneum-labs
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698837d70a
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Class v6: the liveness rule on the window in change (4) (main, 15:56 UK); the three v7 research lanes named
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:42:27 +00:00 |
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igneum-labs
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513bca993b
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Merge class-v6-invention f812e800 into master (gate: green on f812e800, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 14:40:15 +00:00 |
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igneum-labs
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4eca18c34e
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Class v6 family gate, the full report: point B's row (0 hot sets at the 64 shape, 5 over 1.2x, the floor refusing 1 of 64) and the 18:00 amendment line (the best-mix genesis table under test)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:40:03 +00:00 |
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igneum-labs
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bcdce0f120
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Merge class-v6-floor-k-docs e0a81517 into master (gate: green on e0a81517, recorded by tools/ci/pre-push.sh; landed on the box mirror under the exception declared by main: main's ruling, 7 Oct 2026 19:5x UK: the GitHub account is suspended, lanes land on the box mirror's master, the box gate stamp is the verdict; GitHub gets the fast-forward when it answers)
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2026-10-08 14:39:16 +00:00 |
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igneum-labs
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781fc1b549
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Merge class-v6-family-gate 72b58cec into master (gate: green on 72b58cec, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 14:38:28 +00:00 |
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igneum-labs
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4db034da80
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Merge ca3-coord-record bf394283 into master (gate: green on bf394283, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 14:37:26 +00:00 |
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igneum-labs
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1219093494
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Merge build-server 6eae74c85 into master (gate: green on 6eae74c85, recorded by tools/ci/pre-push.sh; landed on the build mirror by the build-server lane)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:36:22 +00:00 |
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igneum-labs
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b6a45ced76
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Class v6 10.0f: lane 3's profitability surface, first cut (p* scales as C_dev over q times the discounted life and under 5 percent with the per-joule edge; the conditions under which development is attractive; the fixed-lane chip needs 4x the price of the programmable one); the served economic line carries it
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:35:20 +00:00 |
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igneum-labs
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6211413a74
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Class v6 10.0h: the served text (the review's sentence verbatim, each number's label, the lines beside it, what is withdrawn)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:32:53 +00:00 |
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igneum-labs
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e0a81517b5
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shadow-k: the 32-lane core (5.55 pJ per lane-op, k 0.45 at the lock), the shuffle row (1.24 pJ, k 0.021), the mix optimiser's best corner
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of bfccc26ed (bfccc26ed4) for the box mirror master
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2026-10-08 14:32:45 +00:00 |
|
igneum-labs
|
b039ded194
|
shadow-k: row (2'), the 32-lane 16-register core (4.2 pJ per lane-op ASAP7, k 0.34 at the lock at N3)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of 3e2a202fe (bfccc26ed4) for the box mirror master
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2026-10-08 14:32:45 +00:00 |
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igneum-labs
|
f5e1045318
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shadow-k: the node column (node-for-node the base core is k 0.78 and the GDDR7 board 2.4x at the lock)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of 05275ca6a (bfccc26ed4) for the box mirror master
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2026-10-08 14:32:45 +00:00 |
|
igneum-labs
|
44bb0b406d
|
shadow-k: the design sweep (64 registers k 0.78, 1,024 imem 0.97 as built and about 0.6 with SRAM, select tree 0.55), the sweep variants' RTL and configs, the synthesis-row driver, the steady-state solve in the collector
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of 036c1aded (bfccc26ed4) for the box mirror master
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2026-10-08 14:32:45 +00:00 |
|
igneum-labs
|
069d4f032f
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shadow-k: the ranking and the mixed draw (the census lane's re-weight on the unit floors and the core)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of e92167057 (bfccc26ed4) for the box mirror master
|
2026-10-08 14:32:44 +00:00 |
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igneum-labs
|
a97605d7c0
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shadow-k: the programmable core's synthesis-only row (6.9 pJ per lane-op ASAP7, k 0.56 at the lock at N3), the edge table in the absolute convention, the lease-routed Makefile
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of ed7d2626d (bfccc26ed4) for the box mirror master
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2026-10-08 14:32:44 +00:00 |
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igneum-labs
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c31ff8a73e
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chip-model: the programmable shadow core (core_v6: imem, fetch, decode, per-lane register file, the class units, era registers), 8, 32 and 32-lane 16-register builds, synthesis-only power path
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of 49c49c340 (bfccc26ed4) for the box mirror master
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2026-10-08 14:32:44 +00:00 |
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igneum-labs
|
7784bdc7d1
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chip-model: shadow-k collector, mix optimiser, edge rows; the report's method sections
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of 6fab785c5 (bfccc26ed4) for the box mirror master
|
2026-10-08 14:32:43 +00:00 |
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igneum-labs
|
ccd5a366c1
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chip-model: the shadow-k floor lane's RTL, testbenches and ORFS flow (ASAP7) for every class v6 mixer family
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of 9009ed0f4 (bfccc26ed4) for the box mirror master
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2026-10-08 14:32:43 +00:00 |
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igneum-labs
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15d1c284fa
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Class v6 10.0g: the second external review's seven amendments (energy, economic and response statements kept separate; the minimax evaluation rule with the free adversary and the negative controls; the discrete-GPU cohort; the 1.25x same-node gate; no arrival probabilities; the RandomX wording; the next programme named)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:31:49 +00:00 |
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igneum-labs
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72b58cec74
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Class v6 family gate, the full report (16:30 BST): 38,000 drawn eras, the lossy-share curve per shape (the exhaustion a 256-shape interaction, about 6x the independent estimate), the pre-floor spread per width and the width-4 floor decision (0.995 kept at its measured cost), the two live-dataset censuses (128 band epochs: 2 hot sets at the 256 shape, both refused by the class v5 floor), the seven known-failed seeds through the sigma form (one value-level test, the bucket bound retired into the bit read; p212 and p225 at bit R), the x4, x8 and x16 verifier rows (x16 outside the band on the 10 ms gate), the band stratum's gate records as JSON lines; every row's log under logs/
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:31:37 +00:00 |
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igneum-labs
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f812e800ee
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Merge remote-tracking branch 'build/master' into class-v6-invention
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2026-10-08 14:31:15 +00:00 |
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igneum-labs
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c6f999bd6b
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Class v6 invention: the drawn-era F8-form read of the sound per-load form (not clean: 7 of 64 seeds with a site under the 0.995 floor, min 0.940, one item at 1,938 reads; the per-load class runs no (c'''), so the floor joins G5-draw with the seven seeds as the known-failed case; the uniform-control share column labelled as not F8's number), the harness's era option
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:31:14 +00:00 |
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igneum-labs
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ad00108853
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Class v6 10.0f: the external review's five corrections (the programmable chip's 3-year life with the per-life table, the lifetime headline withdrawn; the profitability surface in place of the single threshold; the dataset claim narrowed to a stale machine; proving an opportunity not an exclusion; the served sentence as the review words it; Monero an observed comparison; the window k not a lower bound); the 32-lane window core as the chip assessed (about 2.6x a node ahead, 2.2x node-for-node)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:30:45 +00:00 |
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igneum-labs
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bf39428306
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Counter ASIC 3.0 status: the class v6 floor closed at 15:28 (the table, the capex wall, the served line in two units, the four changes, amendment 1's best-mix table), the 5.5 GiB row measured on a rented 5090, the attack pass's 15:30 reading (F9 max attempt 32, F1's one letter miss at parity pending), preview 1 on the founder's Mac, main's class v6 build order fanned to five lanes with clocks (packs 21:00, census 22:30, object 23:30, 0.3.27 tomorrow, the chip page 17:30)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:30:20 +00:00 |
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igneum-labs
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4f409e7ce9
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Merge app-audit-26 612764d8 into master (gate: green on 612764d8, recorded by tools/ci/pre-push.sh; landed on the box mirror)
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2026-10-08 14:29:58 +00:00 |
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igneum-labs
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6eae74c85c
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Merge remote-tracking branch 'build/master' into build-server
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2026-10-08 14:29:13 +00:00 |
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igneum-labs
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44eacd733d
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Class v6 amendment 15:3x UK: the chip's shuffle is k 0.011 to 0.021 (the lowest family), the register file linear in its entries (the window is the knob), the core32 row; change (1) amended: the op mix moves to the band's best mix as the genesis table, subject to one acceptance pass
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:28:58 +00:00 |
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igneum-labs
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cc03c4d782
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Merge ca3-coord-record 65ef6d3f into master (gate: green on 65ef6d3f, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 14:26:43 +00:00 |
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igneum-labs
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731caa1f18
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Class v6 3.3: lane 3's reading of the measured 5.5 GiB step (the mapping safe at the v6 epoch; 4 percent at stock, about 9 at the knee; the 8 GB tier's RX 7600 row owed)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:25:50 +00:00 |
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igneum-labs
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a41aa5a0cc
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Class v6 3.3: the 5.5 GiB genesis floor measured on a rented 5090 at stock (3.5 percent of rate, about 4 percent of energy; the non-power-of-two mapping no cliff on sm_120; the ds55 pin)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:24:53 +00:00 |
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igneum-labs
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612764d819
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Miner window audit: the Earnings row is two windows (7 days, all time) under the 24-hour headline; the 24-hour count never falls back to zero before the engine's earned sums land
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:23:33 +00:00 |
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igneum-labs
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65ef6d3f4b
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Counter ASIC 3.0 status: the second minute 15:05:00 on f8da7515 (named on the gates, the fast-time PASS 15:17 behind it), the Intel row closed on the Arc B580 (one fingerprint on six platforms), the k lane's design sweep and node column, kit d's op-mix row, the W = 8 row at stock, lane D's strata complete (38,000 eras), the floor-sm, denominator and invention landings, the preview 1 line, PC 1's 13 percent caveat
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:19:50 +00:00 |
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igneum-labs
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f4b52c3e13
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cross-remote: CROSS_EXTRA_ENV, one literal export line for the box build (the preview builds set IGNEUM_PREVIEW); site deploy: the explorer source notice and the /build and /faucet chain-id lines asserted
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:18:19 +00:00 |
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igneum-labs
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07cb5d933a
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Class v6: W = 8 withdrawn on measurement (the 5090 at stock pays +4.8 percent of energy for 0.2x of the die's shadowed edge; lane 3 083ea1e4); the width is W = 4, 16 never
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:15:53 +00:00 |
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igneum-labs
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1d9ad52a0c
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Merge class-v6-floor-invention-docs-3 3471075c into master (gate: green on 3471075c, recorded by tools/ci/pre-push.sh; landed on the box mirror under the exception declared by main: main's ruling, 7 Oct 2026 19:5x UK: the GitHub account is suspended, lanes land on the box mirror's master, the box gate stamp is the verdict; GitHub gets the fast-forward when it answers)
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2026-10-08 14:12:11 +00:00 |
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igneum-labs
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9ff09ecc9f
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Class v6: W = 16 closed from the knee side (2.3x the energy per hash at the 5090's lock); nothing on it owed
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:05:47 +00:00 |
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igneum-labs
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3471075c32
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Class v6 floor lane 5 (invention): the knee row from PC 1 (the hash lane, kit d): at the 1,300 lock the hinted w64 form reads 37.6 against the 4-byte row's 100.6 MH/s at 2.3x the energy per hash, so W = 16 is dead at the knee as at stock; every row this lane owed on W = 16 is closed
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Documents-only replay of c8e8b82ad (c8e8b82add) for the box mirror master
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2026-10-08 14:05:41 +00:00 |
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igneum-labs
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86a9f4f27a
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Class v6 layer 1: kit d measured (inside the shadow block the weight table is a 30 percent energy lever; multiply-heavy 23 to 33 percent under shuffle-heavy per hash; shuffle-heavy = stock in watts; the lossy cap stands on both sides); W = 16 dead at the knee too
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 14:04:44 +00:00 |
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