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shadow-k: the node column (node-for-node the base core is k 0.78 and the GDDR7 board 2.4x at the lock)

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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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igneum-josh 2026-10-08 14:53:42 +01:00
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docs/analysis/class-v6/floor/shadow-k.md
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@ -185,6 +185,24 @@ under 2x at the lock needs the window, the long block and the knee together and
stays unamortised, which it does not. The GPU pays nothing for the window until occupancy binds, 1.58x per hash for
the long block (0.40x per forcing instruction), and nothing for the select tree.
### 4b. The node column: which part of the edge is the node (the coordinator's order, 15:0x UK)
The record compares a chip scaled to N3 or N2 against a TSMC 4N card (N5 class; the M5 Max is N3), so part of
the edge is the node. Factors as in 2.3, every one claimed. Absolute; the GDDR7 board at the lock = 2.33 /
(0.466 + 102,100 x e_chip).
| Core | pJ per lane-op ASAP7 / N5 / N3 / N2 | k at the lock, N5 / N3 / N2 | GDDR7 board at the lock, N5 / N3 / N2 |
|---|---|---|---|
| base (32 registers, 256 imem) | 6.9 / 4.8 / 3.5 / 2.5 | 0.78 / 0.56 / 0.40 | 2.4x / 2.8x / 3.2x |
| 64-register file | 9.7 / 6.8 / 4.9 / 3.5 | 1.09 / 0.78 / 0.56 | 2.0x / 2.4x / 2.8x |
| all four together | ROW_CORE32ALL_NODE |
One line: of the 2.8x at k 0.56, the N5-to-N3 node step is worth 0.4x (2.4x node-for-node, a factor of 1.17,
claimed); the rest is the memory system (3.6x at zero shadow at the lock, modelled) less what the class v4 shadow
takes back on the card's own node (3.6x to 2.4x), which is the design. Node-for-node the base core already sits at
k 0.78 and the 64-register core at 1.09, so "near 0.9" is reached node-for-node by the window alone; what it does
not survive is the node step a chip project would buy (an N3 core gives back 0.4x, an N2 core 0.8x).
## 5. The chip edge at the measured k
`E_chip = E_mem + N_ops x e_chip` (absolute: the chip's shadow cost is 102,100 x 3.5 pJ = 0.36 microjoules per hash