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igneum-labs
4ed9be047a class v5 design page: Devnet 3's crossing at 68,400 (epoch 19, program 3d375a55029e7e60 at attempt 2), the worker fault (generator-5 packs refused by the pre-kit workers) and its fix 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 11:56:24 +00:00
igneum-labs
acac4963c3 class v5 design page: 0.3.25's pairing (the freeze, kit 65b47211, the Intel worker held out; the Arc read to 0.3.26 with the second PC dark) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 11:31:25 +00:00
igneum-labs
a9b3bf9b5f class v5 section 14 and AP-F8-6: F8's residue attributed (a per-site bucket concentration of about a quarter bit at one narrow-window site; the per-site bucket bound is the next class's second test) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 08:48:31 +00:00
igneum-labs
55b8ca7821 class v5 design page: the Arc fault's cause (the kit worker lacks the Intel rotate-fold rewrite intel_rotr.h; master lacks it too; the rebuild waits on the Intel lane's landing) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 08:46:54 +00:00
igneum-labs
0cc17998fd class v5 design page: the Intel row held out of 0.3.24 (the Arc B580's self-test fails on both classes' vector lanes with the dataset right: an Intel OpenCL evaluation fault; crossing time 09:36 UK) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 08:38:08 +00:00
igneum-labs
0315d47b70 class v5 design page: F1's full record line (chip-view ops, the empty top bins, AP-F1-1's v5 half fixed and passed) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 04:23:18 +00:00
igneum-labs
77f48b9ea5 class v5 design page: F1 PASS on the freeze (100,000 programs, max saved share 4.688 percent, 0 mismatches); the attack families on class v5 complete 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 04:22:01 +00:00
igneum-labs
b5f8f6b2a5 class v5 design page: F1's state (computing, not hung; its count exists only at its end, about 10:00 UK) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 03:06:46 +00:00
igneum-labs
cb8b94be72 class v5 design page: F9's full record line; the Intel row stated as not measured tonight (the second PC's Arc job queued until a Windows entry exists) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 02:39:00 +00:00
igneum-labs
6a5a598dd5 class v5 design page: F9's mean attempt index corrected to 2.185 (the lane's correction) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 02:38:15 +00:00
igneum-labs
1fc3adbc77 class v5 design page: F9 PASS on the freeze (100,000 seeds, 0 exhausted, 0 panics, max attempt 30) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 02:38:01 +00:00
igneum-labs
bf6f31a026 class v5 design page: F9 and F1 interim on the freeze (0 exhausted of 73,691, 0 F1 failures) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 01:00:23 +00:00
igneum-labs
9623055c42 class v5 design page: section 0's landing row 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 00:39:04 +00:00
igneum-labs
501af925e7 class v5 design page: the AMD fingerprint read on the RX 9070 XT through the PC 1 queue (82b19cbde8557ea5, self-test PASS, v4 control PASS); the Intel job waits on the second PC's clear 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 00:17:48 +00:00
igneum-labs
c4b53af159 class v5 record: the tally is nine of nine hot sets refused (adv-accept's 228763 at 0.9809, a non-saturated single-item source), in main's sentence on AP-F8-6, section 14 and spec 1.4.7.2 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 00:13:46 +00:00
igneum-labs
fbcc999d97 class v5 design page: adv-accept's final total (nine of nine live hot sets and both single-item programs refused; seven clean refusals of twelve deep seeds) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 00:13:13 +00:00
igneum-labs
5e5a2ddc3d class v5 harness dir: the 18:5x UK flip-stale run (skewed binaries, FAIL) filed under superseded/ by its case name (the runner had written it under its first argument) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:54:30 +00:00
igneum-labs
2949656759 class v5 records: the time zone written as UK, not the forbidden zone name, in the ledger, the spec and the page 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:54:09 +00:00
igneum-labs
e55c82662a class v5: the 61-row era reading (0 of 61 refused; era-drawn-28 at 0.9969) and the class v5 attempts census (per-candidate rejection 0.6893, (a') 83.4 percent, (c''') 1.0 percent, 0 exhaustions, P(256) 4.4e-42) on the spec, the page and AP-F8-6, logs under the harness dir 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:50:45 +00:00
igneum-labs
bd69e73552 class v5 page and ledger: the pre-public scrub (no founder name on the page), M35's status word, the public ledger regenerated 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:46:48 +00:00
igneum-labs
c2a19d38e5 AP-F8-6 and class v5 section 14 open with main's sentence verbatim (eight of eight hot sets refused; the diffuse era-stride excess under 0.1 percent of a hash's reads per site is the next class's test) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:40:01 +00:00
igneum-labs
342fd3e516 Merge remote-tracking branch 'build/master' into class-v5 
# Conflicts:
#	docs/fud-ledger.md
#	igneum-pow/src/generator.rs
#	site/ledger.html
#	site/litepaper.html
 2026-10-07 22:39:39 +00:00
igneum-labs
a381e57570 fud ledger AP-F8-6: the class v5 floor does not reach adv-cache-2's era-stride diffuse class (0 of 29 refused; the instrument, the bound, the next class's test); class v5 page: the clock lines corrected to BST with the clock rule, F4 PASS on 19c60cf9 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:35:27 +00:00
igneum-labs
f807cfba4e class v5 design page: section 14's reach sentence corrected by the era reading (the floor reads few-item hot sets, not the era-stride diffuse class: 0 of 29 of adv-cache-2's programs refused, the six over 1.2x at 0.9965 to 0.9997) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:33:24 +00:00
igneum-labs
0355829608 class v5 design page: section 14's false-refusal rows from adv-accept (six clean programs refused among its nine deepest seeds; the floor's margin) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:28:09 +00:00
igneum-labs
c17ce3b287 spec 01: class v5 as 1.4.7 (the class, generator 5, (c''') with the census numbers, the verified last resort, the two draw rules, the activation object and signal, the test vectors) and 1.8.6 (the state leaves: stream, derivation, sample, leaf line, refresh, witness, cost) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:17:32 +00:00
igneum-labs
9f67420a6a Merge remote-tracking branch 'build/v5-kits' into class-v5 
# Conflicts:
#	docs/design/class-v5-stored-state.md
 2026-10-07 22:09:37 +00:00
igneum-labs
5bfa9b45c4 class v5 design page: F8 on the freeze PASS with the known residue (the attack-pass lane's reading), F9/F1/F4 pending 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:06:37 +00:00
igneum-labs
e4a59a42ae class v5 design page: section 14's running total (adv-accept's seed 122960 refused; eight of eight live hot sets under the floor) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:42:03 +00:00
igneum-labs
4227a9c4f6 class v5 design page: the class-walk harness case's two readings (FAIL on the unfixed fork, PASS on the node lane's pair 4), the logs under the harness dir 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:10:55 +00:00
igneum-labs
19c60cf9a8 class v5 design page: the two known-failed readings of the post-freeze commit (day 29,337 at cost 203; adv3/steer/2 at instruction 47) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:02:27 +00:00
igneum-labs
0a5abe0634 class v5 harness: the class-walk case under the v5 object (v4 floor 0, v3 never: every epoch before the flip is class 4), a fork-binary override for the node lane's pair build; the page carries the node lane's branch list and the decide() fix 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:55:51 +00:00
igneum-labs
ea3a76e4c4 class v5: AP-F4-1 in the agreed form (adder cost at most 205 against the median 226, w32 without the position-32 digit, a two-adder multiplier or one rotation amount rejected; known-failed first on chain day 29,337) and the verified last resort (part (a) repaired by re-sourcing stale loads, then the whole rule over a 256-candidate scan; known-failed first on adv-accept-3's adv3/steer/2) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:55:03 +00:00
igneum-labs
dba17a0a4f class v5 FREEZE: the suite's green and the gate on the record (section 0), the shadow rule's measured trigger reading, the next commit named 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:53:07 +00:00
igneum-labs
7965f5bafa class v5 design page: section 14's final total from adv-accept (seven of seven live hot sets refused; the three mild concentrations at about 1.0004x) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:49:23 +00:00
igneum-labs
1fabc0842a class v5 design page: section 14's running total (adv-accept's seed 1738 refused; six of six live hot sets under the floor) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:39:15 +00:00
igneum-labs
03c3f88046 class v5 design page: section 14's record sentence is the defender's ruling (the hot-set half closed, the residual named with prevalence, gain and lever) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:38:42 +00:00
igneum-labs
7eb3ad69ce class v5 design page: section 14 carries the five programs' ratios and the record's sentence (the floor closes the class on every measured hot set by X_f >= f and misses the shadow-block-write residual, named with its instrument and bound); the residual as a gap row 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:38:29 +00:00
igneum-labs
0d5570e299 class v5 (c'''): the census number in the record (4,600 f8 seeds: 2.435 percent of sub-version 3 accepted programs under 0.995, attempts mean 2.174 to 2.248, 0 class v5 programs under the floor; 0.99 would pass the exemplar), the flip-stale PASS on the matched binaries 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:04:35 +00:00
igneum-labs
658f6b9195 class v5 design page: section 14 carries adv-accept's multiplicity reading at the acceptance sample 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:40:48 +00:00
igneum-labs
78714e59d5 class v5 design page: section 14 carries adv-accept's class v5 check of the exemplar (the hot set does not move under the state dataset) and the known-failed test's reading 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:39:16 +00:00
igneum-labs
d0939373b0 class v5 design page: section 14 (the acceptance rule's class v5 part on the residual hot-set class, the two fixes, the floor taken), the witness row done, the class-walk exception, the harness skew and override-field rows 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:07:32 +00:00
igneum-labs
ec1a751eea class v5 page, section 13: the CUDA row read from the kit on a fleet RTX 4090 (82b19cbde8557ea5 at 18:57:45Z and 18:57:50Z, 62.759 MH/s), the 5090 row left to the fleet when one frees 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:00:02 +00:00
igneum-labs
ac07fb8357 class v5 kits: the Intel row stated as not measured tonight (no B580 on PC 1 or PC 2, the Arc path needs a driver click no PC job may raise; the holder and a click-free path owed) in the kit README text and section 13 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:48:01 +00:00
igneum-labs
381a5745ab class v5 page, section 13: the kit rows closed by branch v5-kits (every host uploads the leaves; Metal and Apple OpenCL read 82b19cbde8557ea5 at 18:34Z under the measure lock; the kit zip packs-ca3-v5-20261007T183921Z sha256 e6c088bb...; the NVIDIA, AMD and Intel runs asked of their lanes) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:42:47 +00:00
igneum-labs
8bb638f843 Pre-public scrub, the text pass (7 October 2026, 19:5x UK): no founder name, personal login, earlier business or personal address in any tracked text file, and a gate check that keeps it so 
The sweep (main's item 1): 199 tracked text files, 783 lines. The founder's full name, first name and possessive become "the founder" (sentence starts capitalised); the lowercase operating-system user name in WSL paths and commands becomes <user>; the second owner login becomes "the second owner login"; the three earlier businesses and the two other brands become "the other business", "the earlier entity", "the earlier business" and "another brand"; the Chrome profile rule names the igneum.network profile, not the profile's label. The standing commit login igneum-labs is not a founder term here: the fresh-repository step renames it in the history (docs/plans/history-rewrite.md, tools/repo/fresh-repo.sh).

The patterns never appear in plain text in the tree (a plaintext list would be the hit): tools/ci/founder-strings.b64 (perl regex, tab, a sample per row) is read by tools/ci/founder-strings-check.sh (every tracked text file, perl, known-failed first: the self-test plants each row's sample in a fixture and the hit must name the file), by tools/community/discord-hooks.mjs (the guard's founder and business rows; the test takes its fixtures from the samples) and by tools/repo/fresh-repo.sh (the business names of the rewrite rules). site/forbidden-strings.txt carries the same patterns as b64: lines, decoded case-insensitive by site/scrub.mjs and tools/ci/launch-gates-check.mjs (whose fixture now plants an encoded made-up name). The check runs in the gate's tree checks on every merge.

Not in this commit, by main's word: the 105 commit messages and 40 personal-identity commits that need the history rewrite (listed, not run), and the secrets found by gitleaks over the history (reported with owners).

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:39:50 +00:00
igneum-labs
c569ed0783 class v5 harness: the accepted-after parser reads the miner's epoch-second line clock (it matched HH:MM:SS and counted nothing: the v5-fasttime lane's finding, 20:3x UK), with its own known-finished check (the honest miners must show accepted lines after the flip); the page's PASS rows say which two counts were parse misses and what they rest on until the re-run 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:38:42 +00:00
igneum-labs
3c7384c96f class v5 design page: section 13's wire row done by the node lane (class-v5-node-wire 7737ebd9, version 1 with the last-field fallback, 43 exec tests), the witness row in progress 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:34:55 +00:00
igneum-labs
310e61b151 class v5 design page: the M5 Max rows (class v5 +0.23 ms per warp over class v4 on one core, interleaved three times under the measure lock, both a quarter of the 10 ms gate); the time line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:33:17 +00:00
igneum-labs
3efd339786 class v5: the first class v5 pack, Devnet 3's epoch 0 (genesis 4020cb43... as epoch and era seed, day 20,733, the genesis state's 11 leaves under root 7e37a9fb...), generator 5, program id e5a4ac5978462156, exported on igneum-build-1 at 18:06:41Z; its Metal fingerprint 82b19cbde8557ea5 on the M5 Max at 18:07:09Z (vectors 3 of 3, cache and dataset PASS); the page's time line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:07:55 +00:00