igneum-network/igneum
1
0
Fork 0
Code Issues Pull requests Releases Activity

class v5 design page: F9 and F1 interim on the freeze (0 exhausted of 73,691, 0 F1 failures)

Browse source 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
This commit is contained in:
igneum-labs 2026-10-08 01:00:23 +00:00
parent dcd1a044dd
commit bf6f31a026
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
docs/design/class-v5-stored-state.md
View file

@ -277,7 +277,7 @@ Every item of this page that has no code, no test or no measurement yet, with th
| The hot-set cache rule (AP-F8-1, 1.067x bound) | inherited by merge from sub-version 3 (the dataflow freshness rule, the shared-operand rule, the 256 cap and the last resort); the bound itself is the attack-pass lane's F8 gate on the v5 stream | attack-pass lane (a3832b1c3b274b310) for the gate; this lane for the v5 pack export it reads | 2 |
| The weak-day FPGA rule (AP-F4-1, NAF sum at least 163, at least 4 distinct rotations) | NO code, NO test: recorded in section 11 with the rule text; lands in `memhard.rs` `MixParams::with_shape` behind the v5 class (the mixer draw redrawn from the next stream values), with the known-failed case (the worst calendar day 29,337 at 1.121x redrawn) and the per-day rejection count (6.1e-4) | this lane | 3 |
| The shadow-redundancy rule (AP-F1-1, 3.0 percent) | NO code, NO test: recorded in section 11 with the fraction; lands in `generator.rs` beside the shadow draw behind the v5 class (a block whose peephole-removable share exceeds 3.0 percent redrawn), with the known-failed case (the census's 5.078 percent block redrawn) | this lane | 3 |
| The attack-pass families on v5 (F1, F4, F8's 64-seed gate at 2^24 with the 1.2x line, F9's exhaustion count) | F8 on the freeze 1c420786 PASS with the known residue (build-2, halves ended 22:58 and 23:03 UK; pairing e5a4ac5978462156 verified, 0 mismatches against the library on the Devnet 3 state): 61 of 64 seeds under 1.2x of the window model (0.9919x to 1.144x), 3 over, all in the four-seed tail (p10 1.5047x, p8 1.3787x, p4 1.2166x); p34 reads 0.9997x under the (c''') floor; p23, p19, p15, p18, p56 at 0.9997x to 1.0001x; the ratios equal sub-version 3's seed for seed within 0.001 except where the floor moved a draw. F4 on 8ca66afa PASS, AP-F4-1 FIXED-AND-PASSED against class v5 (build-1, 23:3x UK): with the agreed rule in the draw, 0 of 2^24 chain days over 1.1x on the LUT metric (median 226, minimum accepted cost 206 at day 27,016 = 1.097x, one adder above the reject line, the rule doing what it says) and 0 on the DSP-bound metric, mean 225.79, sd 6.07; day 29,337 redrawn (cost 203 to 228), day 20,729 at 219 unchanged. F9 and F1 follow from build-1 | attack-pass lane; this lane pairs the tip | 0 |
| The attack-pass families on v5 (F1, F4, F8's 64-seed gate at 2^24 with the 1.2x line, F9's exhaustion count) | F8 on the freeze 1c420786 PASS with the known residue (build-2, halves ended 22:58 and 23:03 UK; pairing e5a4ac5978462156 verified, 0 mismatches against the library on the Devnet 3 state): 61 of 64 seeds under 1.2x of the window model (0.9919x to 1.144x), 3 over, all in the four-seed tail (p10 1.5047x, p8 1.3787x, p4 1.2166x); p34 reads 0.9997x under the (c''') floor; p23, p19, p15, p18, p56 at 0.9997x to 1.0001x; the ratios equal sub-version 3's seed for seed within 0.001 except where the floor moved a draw. F4 on 8ca66afa PASS, AP-F4-1 FIXED-AND-PASSED against class v5 (build-1, 23:3x UK): with the agreed rule in the draw, 0 of 2^24 chain days over 1.1x on the LUT metric (median 226, minimum accepted cost 206 at day 27,016 = 1.097x, one adder above the reject line, the rule doing what it says) and 0 on the DSP-bound metric, mean 225.79, sd 6.07; day 29,337 redrawn (cost 203 to 228), day 20,729 at 219 unchanged. F9 and F1 on 1c420786, interim at 01:59 UK: F9 exhaustion count 73,691 of 100,000 chain-shaped seeds written, 0 exhausted, 0 panics, maximum attempt 30, per-candidate rejection about 0.69 (the 10^5 about 02:30 UK); F1 redundancy census 2 h 28 min in, 0 failures so far. The record file: docs/analysis/attack-pass-2026-10.md, lane (d), on the mirror's attack-pass | attack-pass lane; this lane pairs the tip | 0 |
| The kit for every platform: Metal | done (branch `v5-kits`, 7 October 2026, 19:3x UK): `proto-metal/main.swift` `servePackDataset` reads `leaves.bin`, checks the pack's count and FNV-1a 64, binds buffers 2 and 3 as `packbench.swift` does, self-tests the dataset head and last word against `vectors.json` and drops the leaf buffer after the build; a v5 prepare and job served on the M5 Max at 18:37:32Z | kits lane | 0 |
| The kit: CUDA | done (`v5-kits`): `packfile.h` reads `IGNEUM_STATE_LEAVES`, the FNV, file, root and block (generator 5 = class v5; a v5 pack without the count or another class with one is refused), `pf_load_leaves` reads and checks `leaves.bin`; `worker.cpp` uploads it (`cuMemcpyHtoD`) for `igneum_build(ds, cache, leaves, nLeaves, nItems)` and frees it after; the CPU emulation runs `--check` on v5-dn3-epoch0: PASS on igneum-build-1 at 18:40:52Z (cache FNV 7334fa46e5d972eb, dataset head, word [268435455], 64 samples, 96 of 96 lanes); the loader test carries the class v5 cases known-failed first (46 ok) | kits lane | 0 |
| The kit: OpenCL (AMD), Intel | host done (`v5-kits`): `proto-opencl/host.c` sets the build arguments for both kernel shapes in one place and uploads the leaves in `--bench-pack`, `--serve` and the compiled-in bench (the host reference derives words from the same leaves); the Linux and Windows workers are in the kit zip; the 9070 XT run placed on PC 1 as one lock slot after the 9070 XT G1 and ladder job (the hash lane publishes `tools/class-v5/pc1-amd-v5-bench.ps1`, expected 82b19cbde8557ea5); Intel: not measured tonight, no Arc B580 on PC 1 or PC 2 and the only Arc path needs a driver click, which no PC job may raise (the coordinator's ruling, 19:5x UK), so the card's holder and a click-free driver path are owed | coordinator (PC 1 queue), the B580's holder | 1 |