igneum-network/igneum
1
0
Fork 0
Code Issues Pull requests Releases Activity
1468 commits 218 branches 0 tags 1.1 GiB
Commit graph

951 commits

Author SHA1 Message Date
igneum-labs
037cb780d7 Counter ASIC 2.0: the crossing verdict PASS (05:21:48Z); H re-cut to about 19:12 to 19:20Z 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 05:58:24 +00:00
igneum-labs
ac4a88ce03 Counter ASIC 2.0: the coverage card counts corrected (47 mining / 18 chain mode / 6 proving-only) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 04:18:27 +00:00
igneum-labs
b438e10e1c Counter ASIC 2.0: proving v1 segments confirmed from PC 2's log; decision 7 (segment length or cards) for the project lead 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 04:18:18 +00:00
igneum-labs
0e6a4cd333 plan: C47 card counts from the fleet table (47 as shipped, 18 chain mode, 6 proving-only) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 04:18:14 +00:00
igneum-labs
d02f3fb1b7 plan: v1 live on devnet, no segment record because one prover cannot cover 8 consecutive blocks (C47) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 04:17:51 +00:00
igneum-labs
9268c5a391 Counter ASIC 2.0: stamp 04:17 from the clock 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 04:17:13 +00:00
igneum-labs
7321d1fb45 Counter ASIC 2.0: proving v1's zero segments explained from prover.rs (coverage, not a fault); the morning line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 04:17:08 +00:00
igneum-labs
0678ae05d5 Counter ASIC 2.0 status 04:17: proving v1 active with 0 segments proven (C47), the morning line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 04:16:32 +00:00
igneum-labs
6cca0c4cab Counter ASIC 2.0 status 03:56: the crossing held (epoch 43 class v3 at DAA 154,814, 03:51:42Z); C46 on the next-cut list 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 03:55:26 +00:00
igneum-labs
9632d78921 Counter ASIC 2.0 status 01:34: the PC 2 chain closed (job 6's curve, the ledger suites, the job-runner finding) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 01:33:37 +00:00
igneum-labs
37f53c067a Counter ASIC 2.0 status: stamp 01:13 from the clock 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 01:13:02 +00:00
igneum-labs
ea6f946587 Counter ASIC 2.0 status 01:16: the repro reading confirmed, the prover off on PC 2 since 00:49Z, job 5's parse failure 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 01:12:58 +00:00
igneum-labs
bdf4237b23 Counter ASIC 2.0 rollout: PC job hygiene items (parse check, result writer, card-off confirmation) on the next-cut list 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 01:11:47 +00:00
igneum-labs
84e709cf48 Counter ASIC 2.0 status: heading stamped 01:10 from the clock 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 01:10:52 +00:00
igneum-labs
02ab3d94d6 Counter ASIC 2.0 status 01:12: the repro run read as beside the miner, agg-cost-pc2-5 go 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 01:10:48 +00:00
igneum-labs
aae4dbc45b Counter ASIC 2.0 status 00:59: past DAA 144,000, N4 final, the queue state 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:59:27 +00:00
igneum-labs
84393fb1b2 Counter ASIC 2.0 status: heading stamped 00:45 from the clock 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:45:34 +00:00
igneum-labs
724bd5aa00 Counter ASIC 2.0 status 00:47: the M16 inline bench table, the repro run on PC 2 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:45:30 +00:00
igneum-labs
a87db8d3e1 Counter ASIC 2.0 rollout 6b: mine-and-prove measured beside the miner (sweep 4) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:38:58 +00:00
igneum-labs
559a5a0648 plan: the beside-the-miner pair (floor-sweep-4): 16 GB mines and proves at 12.7 GB and 17 s a shard on the patched server; 12 GB proves alone, mine-and-prove 9.9 GB before the display, over the 9.0 GB line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:38:51 +00:00
igneum-labs
b33d33a0a9 Counter ASIC 2.0 status 00:40: the mine-and-prove reading corrected to the 600 DAA-s deadline rule 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:38:49 +00:00
igneum-labs
43c2951867 Counter ASIC 2.0 status 00:40: floor-sweep-4 rows (mine-and-prove beside the miner), M16 go 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:38:33 +00:00
igneum-labs
38a78419ac Counter ASIC 2.0: the crossing watcher (infra/devnet/crossing-watch.mjs) armed for N4 = 154,800; status 00:36 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:35:45 +00:00
igneum-labs
897ec73186 Counter ASIC 2.0 status: the 00:28 and 00:29 headings stamped from the clock (were guessed ahead) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:29:39 +00:00
igneum-labs
250a7d1ebe Counter ASIC 2.0: the M20 era test fails on 89dfcb95 under igneum-pow; G6 caveat (suites ran without the feature) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:29:21 +00:00
igneum-labs
449329dea0 Counter ASIC 2.0 status 00:36: the 0.3.12 list with the paid_wei fix first, the settings.json rule for PC 2 playbooks 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:28:40 +00:00
igneum-labs
e054c914e6 plan: the /api/state fix heads 0.3.12 (0.3.11 closed at a2f08e3) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:28:27 +00:00
igneum-labs
bea41cf4ab Counter ASIC 2.0 rollout: the empty /api/state cause is paid_wei u128; 0.3.12 app cut recommended for the morning 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:28:15 +00:00
igneum-labs
42f36b3fd3 app: /api/state never answers {} again (paid_wei over u64::MAX broke to_value; the field is a decimal string, the error is logged once) 
serde_json's to_value refuses a u128 over u64::MAX (18.45 IGN) and state_json turned the error into json!({}). A paid shard is 1.23 IGN on average, so a proving machine's dashboard went blank about 15 paid shards after every app start. Unit test over the boundary; 114 app tests pass.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:27:35 +00:00
igneum-labs
350d875903 Counter ASIC 2.0 rollout: the app's empty /api/state (non-finite float) on the next-cut list 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:25:00 +00:00
igneum-labs
8fff2ac261 Counter ASIC 2.0 status 00:24: job 4 void, sweep 4 running, the M20 era test finding 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:23:08 +00:00
igneum-labs
c547a1ff4a Counter ASIC 2.0: shard labels corrected (adopted = the v1 shard, prototype = block-338-shard1) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:18:50 +00:00
igneum-labs
047932f2e1 plan: the prover-floor agent's sweep 3 rows (the patched server proves the v1 shard at 10.3 GB on the 12 GB profile, 12.9 GB at 2^27; the 12 and 16 GB rows move from nothing to proves alone, the pairs pending) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:18:32 +00:00
igneum-labs
7fdea00b20 Counter ASIC 2.0 rollout 8: master CI green 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:18:19 +00:00
igneum-labs
43a3b354ea Counter ASIC 2.0 rollout 6b: the 12 GB tier measured on patch v3 (2^26 threshold, 10,291 MiB at 5.7 s) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:18:14 +00:00
igneum-labs
67fd440001 Counter ASIC 2.0 status 00:20: floor-sweep-3 nine rows, the aggregation-cost re-run go 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:17:53 +00:00
igneum-labs
d721048b31 Counter ASIC 2.0 rollout 8: shipped, the two publishes, the digest sweep, what is not yet on 0.3.11 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:15:20 +00:00
igneum-labs
0afe36c371 Counter ASIC 2.0 status 00:18: 0.3.11 shipped, master fa8193b and 18de437, the sweep closed 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:15:02 +00:00
igneum-labs
8716747934 Counter ASIC 2.0 rollout: the explorer split (894fe08 safe, 303038a waits) on the next-cut list 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:14:40 +00:00
igneum-labs
18de437605 release 0.3.11: the plan's merge and push section 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:14:19 +00:00
igneum-labs
c2462ab2f4 Counter ASIC 2.0 rollout: C43 miner resubscription and the update-now queue on the next-cut list 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:12:23 +00:00
igneum-labs
d61ce0ccee release 0.3.11: the plan's step 2, the digest sweep and the open items; sections in order 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:12:23 +00:00
igneum-labs
1b78d8004e Counter ASIC 2.0 status 00:09: publish 2 on the nodes at 0139ab9d, the floor build go 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 00:09:20 +00:00
igneum-labs
d32907e28f Counter ASIC 2.0 status 23:58: the panic's arithmetic corrected from the agent's reading 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:59:48 +00:00
igneum-labs
168be4f5e9 Counter ASIC 2.0 status 23:58: the v2 server's tracegen panic, PC 2 clear for publish 2 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:57:50 +00:00
igneum-labs
f7613e5f96 release-0.3.11 plan: the push and both CI runs, step 1 (the hand nodes and the seed at 4d8f8bb6, the manifest with the override carried over, the Mac, PC 2 and its epoch-boundary recovery, the stall and the Mac's resume, the laptop), the next-cut list 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:56:46 +00:00
igneum-labs
4b6b160f91 Counter ASIC 2.0 status 23:57: PC 2 on 0.3.11, publish 2 go, N4 stands 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:56:45 +00:00
igneum-labs
a47b33eed3 Counter ASIC 2.0 status 23:47: the update queues behind the sweep's cap, no relay task 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:44:59 +00:00
igneum-labs
ac3f8d6133 Counter ASIC 2.0 rollout: 7d the step-1 stall and the slipped times, the prover memory tiers 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:43:36 +00:00
igneum-labs
d553d30584 Counter ASIC 2.0 status 23:40: PC 2 clear, sweep 2 hung on point 1, the new-side stall 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:39:53 +00:00
igneum-labs
e35a79d04b Counter ASIC 2.0 rollout: C41 HiveOS local mode on the next-cut list, the tier line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:32:37 +00:00
igneum-labs
803eded24e Counter ASIC 2.0 status 23:32: publish 1 live at 4d8f8bb6, PC 2 updates when the sweep closes 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:31:44 +00:00
igneum-labs
b144c5e392 Counter ASIC 2.0 status 23:20: floor-build-4 green, sweep 2 running 2026-10-05 23:20:58 +00:00
igneum-labs
2ce51f1842 Counter ASIC 2.0 status 23:19: release-0.3.11 on origin, the inputs live, CI running 2026-10-05 23:19:05 +00:00
igneum-labs
6f95751e06 Windows payload inputs: node 89dfcb95 (push-inputs.sh, the PC 2 build, the class-aware workers, signed); release-0.3.11 plan: the PC 2 job 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:18:28 +00:00
igneum-labs
119b4de596 Counter ASIC 2.0 status 23:18: PC 2 restored, the identities side effect, the time-slice lever 2026-10-05 23:18:27 +00:00
igneum-labs
3e83ee1dad Counter ASIC 2.0: G5 and G6 complete on the final release tree (PC 2 job build-20261005-230745); status 23:17 2026-10-05 23:17:45 +00:00
igneum-labs
654835d8f3 Rollout plan section 4: publish 1 flips the fleet to 4d8f8bb6 2026-10-05 23:15:40 +00:00
igneum-labs
9d1c494a9f release-0.3.11 plan: the three digests on the 0.3.11 binary (4d8f8bb6 with the live file, measured), the two-publish order (C39, C40), the HiveOS package's missing override 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:15:20 +00:00
igneum-labs
b0da2870c4 Counter ASIC 2.0: the rolling-upgrade digest is 4d8f8bb6 (the four-field file on the 0.3.11 node); status 23:14 2026-10-05 23:14:55 +00:00
igneum-labs
02f2bc6e4b Counter ASIC 2.0: C40, the publish-1 order (hand nodes and the seed first); status 23:14 2026-10-05 23:14:21 +00:00
igneum-labs
0f1fc50349 Counter ASIC 2.0: C39, the two-manifest order in the rollout plan; status 23:13 2026-10-05 23:13:17 +00:00
igneum-labs
046a92ed28 Counter ASIC 2.0: the activation at about 03:30 UTC and PC 1's 0 peers until its update, in 7c; status 23:11 2026-10-05 23:11:31 +00:00
igneum-labs
4b967ebf90 Counter ASIC 2.0: C32's premise withdrawn, the rule reworded; status 23:10 2026-10-05 23:10:28 +00:00
igneum-labs
87dcbd804a release-0.3.11 plan: the PC 2 job id, the rollout order as agreed 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:10:03 +00:00
igneum-labs
74cbb923c6 Counter ASIC 2.0 status 23:09: PC 2's order for the night 2026-10-05 23:09:43 +00:00
igneum-labs
1afac29211 Counter ASIC 2.0 status 23:09: the M16 kit and its slot 2026-10-05 23:09:15 +00:00
igneum-labs
c785bd3113 release-0.3.11 plan: the relay's PC1 is the 1ccfe586 box (PC 2 restarted twice by my tasks, PC 1 unreachable until the morning), the combined PC 2 job, C38 complete 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:08:52 +00:00
igneum-labs
7c78a0a10a Rollout plan: the eGPU drop rows withdrawn in the same breath as the finding; the morning's hands list (start PC 1's app first, then the 16:00Z check) 2026-10-05 23:08:40 +00:00
igneum-labs
e518bbf4a2 Counter ASIC 2.0 status 23:08: PC 2's dirty state and the restore, C38 in the tree at c5bc0f6, the exes' two sources 2026-10-05 23:08:09 +00:00
igneum-labs
343e7b24ea Counter ASIC 2.0: the relay PC1/PC 2 correction (the 9070 XT never dropped during the app jobs, PC 2 restarted twice, PC 1 unreachable); status 23:07 2026-10-05 23:07:08 +00:00
igneum-labs
c5bc0f6bc8 Merge ca2-coord (6bb8124) into release-0.3.11: the Counter ASIC 2.0 docs commits (N4 rows, gate cells, digests, rules, status; the five cited documents already in the tree) 
# Conflicts:
#	docs/bench-log.md
 2026-10-05 23:06:38 +00:00
igneum-labs
6bb8124080 Counter ASIC 2.0 status 23:05: C38 closed, the four branches merged into ca2-coord 2026-10-05 23:05:34 +00:00
igneum-labs
14b748fafa Merge branch 'prover-floor' into ca2-coord 2026-10-05 23:04:46 +00:00
igneum-labs
b9f0158872 Merge branch 'ca2-epoch' into ca2-coord 
# Conflicts:
#	docs/bench-log.md
 2026-10-05 23:04:46 +00:00
igneum-labs
dae3593578 Merge branch 'ca2-soundness' into ca2-coord 
# Conflicts:
#	docs/bench-log.md
#	proto-metal/packbench.swift
 2026-10-05 23:04:45 +00:00
igneum-labs
310e5f0ee5 ca2-soundness: docs/analysis/scratch-soundness.md alone (its code is already in the tree through the mixer merge; the branch merge conflicted there); release-0.3.11 plan: C37 and C38 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:04:38 +00:00
igneum-labs
22b495aa1d Merge branch 'ca2-analysis' into ca2-coord 
# Conflicts:
#	docs/bench-log.md
 2026-10-05 23:04:14 +00:00
igneum-labs
0059f12c98 Merge prover-floor (8e2686d) into release-0.3.11: docs and standalone probe sources the evidence rows cite (C38); nothing a built artefact reads 2026-10-05 23:03:46 +00:00
igneum-labs
41889fcaea Merge ca2-epoch (6cb846b) into release-0.3.11: docs and standalone probe sources the evidence rows cite (C38); nothing a built artefact reads 
# Conflicts:
#	docs/bench-log.md
 2026-10-05 23:03:46 +00:00
igneum-labs
bfdc632a14 Merge ca2-analysis (c9ebe7b) into release-0.3.11: docs and standalone probe sources the evidence rows cite (C38); nothing a built artefact reads 
# Conflicts:
#	docs/bench-log.md
 2026-10-05 23:03:45 +00:00
igneum-labs
f754d6ba7f Counter ASIC 2.0 status 23:03: C38, the four analysis branches' documents and the two options 2026-10-05 23:03:33 +00:00
igneum-labs
142b5ef254 release-0.3.11 plan: the tree, the builds and tests so far, the override object and both digests, PC 1's hung engine and the relaunch, the next cut 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:02:07 +00:00
igneum-labs
f9d9805ae8 bench log + plan: C35 corrected (the quit was not the 0.3.11 update; what is established, the hang, the orphans, the prompt, the fixes) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:00:52 +00:00
igneum-labs
e9c95297ec Counter ASIC 2.0: ember-tune 8ab9068 on the next-cut list with the second-engine rule; status 23:00 2026-10-05 23:00:32 +00:00
igneum-labs
d19441c14d C35 class: a second engine gets no pipe (its output goes to a file the playbook tails) and its whole tree is ended at the end and on the budget; ember-tune-pc1.ps1 and sweep-5090.ps1 fixed; tools/ci/second-engine-check.sh fails any playbook without both; the rule in ember-tune.md 
PC 1, 22:31 UTC: the installed engine's quit hung 24 minutes in the jobs runner's abort, waiting for EOF on the script's
stdout pipe whose write end the second engine and its miners had inherited (Process.Start with redirection inherits
every inheritable handle), while the orphaned miners mined on against the relaunched app.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 23:00:06 +00:00
igneum-labs
30b6959557 Counter ASIC 2.0 status 22:59: the orphaned second-engine miners, the hang's mechanism, the second-engine playbook rule 2026-10-05 22:59:45 +00:00
igneum-labs
921ed874fb Counter ASIC 2.0 status 22:59: the explorer public-api-check item for the next cut; the two watchers 2026-10-05 22:59:05 +00:00
igneum-labs
9ed2cabc25 Counter ASIC 2.0: the M28 worker-miner coupling for the next cut; status 22:57 2026-10-05 22:57:27 +00:00
igneum-labs
48c2b68c60 Counter ASIC 2.0: fud-close to the next cut (the tree closed at b9acc57); status 22:57 2026-10-05 22:57:12 +00:00
igneum-labs
53218ba978 Counter ASIC 2.0: fud-close on the ship order with the G5 rebuild; status 22:56 2026-10-05 22:56:58 +00:00
igneum-labs
213e69fbda Counter ASIC 2.0 status 22:55: PC 1's engine hung after its quit; task #243 ends and relaunches it 2026-10-05 22:55:29 +00:00
igneum-labs
df86a27ea2 Counter ASIC 2.0: the no-prompt rule for the night (C35), the morning test; status 22:55 2026-10-05 22:55:19 +00:00
igneum-labs
7cf89995f3 Rollout plan: the G1 and G3 state cells read GREEN with their job and time 2026-10-05 22:54:38 +00:00
igneum-labs
6c99c0bb6d Counter ASIC 2.0 status 22:54: C35 resolution, the UAC-prompt shape, the collect go 2026-10-05 22:54:23 +00:00
igneum-labs
c47e55853d Counter ASIC 2.0 status 22:53: the PC 1 relaunch, the PC 2 queue with the M16 job, the api/state class 2026-10-05 22:53:17 +00:00
igneum-labs
8d2fae7052 Counter ASIC 2.0: the two digests and the DMG in the rollout plan; status 22:52: PC 1's app down since 22:31, the relaunch asked 2026-10-05 22:52:23 +00:00
igneum-labs
8f9dcf491b Counter ASIC 2.0 status 22:50: the C16 reversal withdrawn, C35 narrowed to Ember's api/quit 2026-10-05 22:50:35 +00:00
igneum-labs
5f8f471ae4 Counter ASIC 2.0 status 22:50: the 20:01Z early update on PC 2, the quit order 2026-10-05 22:50:04 +00:00
igneum-labs
70bd7799e1 Rollout plan: N4 = N5 = 154,800 and the G5 workers (the row edits) 2026-10-05 22:49:06 +00:00
igneum-labs
7e78016b29 Counter ASIC 2.0: N4 = N5 = 154,800 and the G5 workers in the rollout plan; status 22:48 2026-10-05 22:48:57 +00:00
igneum-labs
bcb419cb07 Counter ASIC 2.0 status 22:48: C35, Ember's re-run held, the AMD link flapping 2026-10-05 22:48:05 +00:00
igneum-labs
f80085c464 Counter ASIC 2.0 status 22:45: the shipper's takeover and CI fixes, the PC queues for the rollout 2026-10-05 22:45:24 +00:00
igneum-labs
f76fca96e2 bench log + plan: PC 1 run 1 aborted by the 0.3.11 update 47 s in, the before snapshots of both cards, the AMD offset-range finding and its consequence per tier 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:44:46 +00:00
igneum-labs
a3fe9ffad4 Counter ASIC 2.0 status 22:44: the AMD agent stopped, PC 1 clear for the update 2026-10-05 22:44:17 +00:00
igneum-labs
b584e41e31 CI on the merged 0.3.11 tree: MacBook reworded in the analysis prose (the identity check's hostname pattern), a presence check before the kit's first use in the three proving-v1 PC 2 scripts (C32), pc1-cpu-prove.ps1 on the socket check's allow list (the CPU path starts no GPU server) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:44:09 +00:00
igneum-labs
52288e54be Counter ASIC 2.0 status 22:43: Ember's failed run, the PC 1 window for the AMD sweep, the update holds 2026-10-05 22:43:50 +00:00
igneum-labs
5bc7ce9b55 Prover floor: sweep 1 table and reading (the Setup-time keys bind at 12.7 GB) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:42:17 +00:00
igneum-labs
2f2bdb5a70 plan: the prover-floor agent's first sweep (the v1 shard at 12.7 GB with the 2^26 split, 5.3 s; the 9.7 GB Setup is next) and the 12 GB profile decision 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:42:12 +00:00
igneum-labs
77d04d5577 Counter ASIC 2.0 status 22:42: the release tree handed to the shipper 2026-10-05 22:42:12 +00:00
igneum-labs
4e20f38d10 Counter ASIC 3.0 plan from the history audit; status 22:41: the release tree assembled, the 12.7 GB floor, PC 2 queue 2026-10-05 22:41:24 +00:00
igneum-labs
32b2df66b0 Merge branch 'asic-history' into release-0.3.11 2026-10-05 22:40:22 +00:00
igneum-labs
5b70cd5d50 Merge branch 'proving-methods' into release-0.3.11 2026-10-05 22:40:22 +00:00
igneum-labs
717520ead3 Merge branch 'consequences' into release-0.3.11 2026-10-05 22:40:22 +00:00
igneum-labs
ea7122a4c5 Merge branch 'ca2-coord' into release-0.3.11 2026-10-05 22:40:05 +00:00
igneum-labs
1de0566590 C34: the packaged override line carries all nine fields (N4, N5 and the three proving v1 parameters); the two digests at publish 2026-10-05 22:39:44 +00:00
igneum-labs
75a56182b2 Merge commit 'a2f08e3' into release-0.3.11 
# Conflicts:
#	docs/bench-log.md
#	docs/evidence.md
#	site/litepaper.html
 2026-10-05 22:39:34 +00:00
igneum-labs
2c0dc01e49 Consequences ledger: C34 the packaged override line lacks proving v1's four fields 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:39:25 +00:00
igneum-labs
629157b388 Merge branch 'ca2-coord' into release-0.3.11 
# Conflicts:
#	docs/bench-log.md
 2026-10-05 22:39:12 +00:00
igneum-labs
f42a51565d Merge branch 'ca2-v3' into release-0.3.11 2026-10-05 22:38:59 +00:00
igneum-labs
9b2cd505c1 Consequences ledger: sweep 11 notes (G4b green, the PCs' workers key by class and era, the patched server built, the merges) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:38:48 +00:00
igneum-labs
563edf1f4a release-0.3.10 plan: PC 2's prover restored at 22:01Z (a socket fix), the open item closed 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:38:37 +00:00
igneum-labs
8f03662db2 Counter ASIC 2.0 status 22:38: the merged tip 2112721, the 0.3.11 ship assigned with its inputs 2026-10-05 22:38:33 +00:00
igneum-labs
a2f08e3f70 prover loop: a PermissionDenied from the host names the root-owned GPU-server socket and the fix (the root-socket class); the plan's two times 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:38:22 +00:00
igneum-labs
399b1ca427 docs/analysis/asic-resistance-history.md: the 2011 to 2026 history of ASIC resistance (31 rows, chip, gain per joule, months held, response), the papers, the chip economics and the market-cap table, ten lessons, the audit of class v2 and the Counter ASIC 2.0 layers, seven ranked additions (partial-store chip row first), nine candidates placed nowhere 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:38:17 +00:00
igneum-labs
c3aef6fcae Consequences ledger: C32 CI side closed (kit-path-check e3bd761), the bash-body-check branch in the merge note 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:37:52 +00:00
igneum-labs
21127216e7 counter-asic-2-node.md: the integration checks on 19b30e3 (igneum-pow, packfile, the CUDA emulation, test-generic on Apple OpenCL, the fork check) all green 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:36:56 +00:00
igneum-labs
d449ff486d Consequences ledger: C33 closed (explorer 303038a) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:35:56 +00:00
igneum-labs
8970afc600 counter-asic-2-node.md: the integration merges (readwidth 06dcb31, origin/master ae699a4) and how each conflict was kept 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:34:28 +00:00
igneum-labs
492da2e095 Consequences ledger: C33 the public stats API carries no proving coverage (2.7%, one prover, 46 s median on /api/live) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:34:07 +00:00
igneum-labs
19b30e31f0 Merge remote-tracking branch 'origin/master' into ca2-v3 
# Conflicts:
#	docs/bench-log.md
#	proto-opencl/host.c
 2026-10-05 22:34:07 +00:00
igneum-labs
607587dc2a Counter ASIC 2.0: H at about 18:45Z, the G4b row's state text, the floor build green and the sweep go; status 22:33 2026-10-05 22:33:42 +00:00
igneum-labs
47ae818b2f Merge branch 'readwidth' into ca2-v3 
# Conflicts:
#	docs/bench-log.md
#	docs/plans/read-width.md
#	igneum-pow/src/emit.rs
#	proto-metal/packbench.swift
 2026-10-05 22:33:39 +00:00
igneum-labs
393a8f831f Prover floor: the build recipe as it ran (Go pinned, the binary's sha256 and targets), the RISC Zero contingency figures with their source, playbook fixes 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:33:31 +00:00
igneum-labs
1c90ca9c6f Consequences: H lands about 18:45Z by the DAA rate at 22:33Z (C1, D1) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:33:19 +00:00
igneum-labs
91713112da Counter ASIC 2.0: gate G4b green (the Metal miner across a v3 boundary; the serveDataset outage fixed); status 22:33 2026-10-05 22:33:15 +00:00
igneum-labs
68af6db901 counter-asic-2-node.md: gate run 4, a real Metal miner across the v3 boundary (3 v3 prepares and prepared lines, swap with no pause, 124 blocks on v3, 0 re-check mismatches); class-v3.mjs judges the Metal checks from the first v3 prepare on 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:32:45 +00:00
igneum-labs
cf6e6f82b4 Counter ASIC 2.0: C32 rules (PC 2's update-now after the floor build; re-fetch after every app update); status 22:32 2026-10-05 22:32:44 +00:00
igneum-labs
0bb6e84af8 Consequences ledger: C32 taken (the update-now sequenced after the prover-floor build; the re-fetch rule) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:32:42 +00:00
igneum-labs
c6c78657d6 Consequences ledger: C32 the app update wipes fetched job kits (a class), the prover-floor build against the 0.3.11 update-now 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:32:16 +00:00
igneum-labs
e6f81106bd Consequences ledger: C31 the five places on 0d9b23d 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:31:31 +00:00
igneum-labs
b3a0cac16c Consequences ledger: C17 closed in part, C9 to decision D4, C1's hour re-cut in the number cell 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:31:25 +00:00
igneum-labs
e296194215 Consequences ledger: C31 closed (ca2-coord a7be43f) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:30:57 +00:00
igneum-labs
1bec7efddf Counter ASIC 2.0 status 22:30: C31, Ember's run, floor-build-3 2026-10-05 22:30:56 +00:00
igneum-labs
0d4680c6b0 Consequences ledger: C31 addendum, the step schedule as fact in five places against miner.html's old sentence 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:30:45 +00:00
igneum-labs
de77871a84 C31: the litepaper's 12 GB clause struck, the dataset schedule written as the gate 1 proposal on the site and litepaper, the merge rule for evidence row 16 and the proving sentences 2026-10-05 22:30:41 +00:00
igneum-labs
a9455c1422 Consequences ledger: C31 three faults in the copy the ship takes (12 GB beside 24 GB, the stale evidence row 16, mapping (b) stated as fact before D4) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:30:17 +00:00
igneum-labs
20ed778e54 Consequences ledger: the branch's merge note for the integrator 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:28:36 +00:00
igneum-labs
a7870be336 Consequences ledger: C29 withdrawn in part (2.1 ms is the fixed crate's measurement), C19 superseded, D11 applied pending escrow 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:28:15 +00:00
igneum-labs
ffdf28fc47 Consequences ledger: C5 the 0.3.10 restart aborted 0 shards (PC 2's prover was dark on the socket across it) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:27:37 +00:00
igneum-labs
50e80cb11e C1: H = 210,000 lands about 19:00Z on 6 October (18:50 to 19:35), not 19:50 2026-10-05 22:27:36 +00:00
igneum-labs
b7f4cc9f13 Consequences ledger: sweep 9 notes (H lands 18:50 to 19:35Z by the live rate, G4b), C30 taken; D1 ETA re-cut 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:27:06 +00:00
igneum-labs
79880291b9 Counter ASIC 2.0 status 22:27: the integration merge plan and the ship order 2026-10-05 22:27:04 +00:00
igneum-labs
78c040095d Counter ASIC 2.0: the fourth eGPU drop in the hardware events, the era branch final, PC 1 to Ember; status 22:25 2026-10-05 22:25:24 +00:00
igneum-labs
c877e11ff5 C29 and D11: the verifier line on the fixed crate, the bounty struck until escrowed, the final-class rates in the public tables; status 22:25 2026-10-05 22:25:02 +00:00
igneum-labs
0839e259cc Counter ASIC 2.0: gates G1 and G2 green on the final class; spec 1.17 fingerprints; status 22:24 2026-10-05 22:24:19 +00:00
igneum-labs
e805ceab8f Consequences decisions: the glance table counts eleven 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:24:08 +00:00
igneum-labs
02b165a414 Counter ASIC 2.0 status 22:23: floor-build-1 failed on its log path, floor-build-2 running 2026-10-05 22:23:46 +00:00
igneum-labs
a215abc809 Consequences: C28 closed; C29 the litepaper's verifier ms is the ratio; C30 the 5090's 15% app gap; D11 the unfunded chip bounty on the hero 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:23:44 +00:00
igneum-labs
787c8e39bd Counter ASIC 2.0: G4b (a) done, app e0de2ab; status 22:23 2026-10-05 22:23:07 +00:00
igneum-labs
dd2ede567d Counter ASIC 2.0: gate G4b (the Mac mines v3: the app's --prepare-packs gap and the Metal gate run); status 22:21 2026-10-05 22:21:57 +00:00
igneum-labs
20a2d19883 Consequences decisions: the ten in one glance, ordered by when they bite 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:21:54 +00:00
igneum-labs
d3b30f4940 Consequences: C28 host RAM per server on rigs; D9 wording reconciled; D10 the proving route (A now, RISC Zero as version 2 is the project lead's) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:21:27 +00:00
igneum-labs
ce01cb75e6 Counter ASIC 2.0: gate G4 run 3 green on the final class; status 22:20 2026-10-05 22:20:42 +00:00
igneum-labs
f91dc13689 Consequences decisions: D9 a 12 GB card for PC 1 (the coordinator's request, proving-methods.md), checked against the cards evidence.md says are on order 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:20:25 +00:00
igneum-labs
84aac1baed Litepaper: the verifier figures on class v3; status 22:20 2026-10-05 22:20:18 +00:00
igneum-labs
104be2dbcf counter-asic-2-node.md: gate G4 run 3 PASS on the final class (x8 with the era, d5070e7): 182 / 122 blocks, 0 rejected, 0 forks; suite job 4 green (G6) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:20:16 +00:00
igneum-labs
a59e782159 Bench log: Counter ASIC 2.0, the numbers (the level 3 page section); litepaper anchor 2026-10-05 22:20:05 +00:00
igneum-labs
f8df1b7caa Counter ASIC 2.0 status 22:19: proving-methods recorded 2026-10-05 22:19:18 +00:00
igneum-labs
48cb0a191d evidence.md rows 17, 18, 19 on the measured class v3: the chip model, the latency bound, the soundness and bit-exactness 2026-10-05 22:19:12 +00:00
igneum-labs
40a94996f1 Analysis: proving methods, the memory anatomy of the SP1 prover, the survey of every proving route, and the ranked path to 12 GB cards 
the project lead, 5 October 2026 22:05 UTC: if the GPU-server patch does not enable 12 GB cards, research proving and see if there are different methods. docs/analysis/proving-methods.md: (1) the memory anatomy of SP1 6.8.1 from its code (the 20 GB panic in sp1-gpu builder.rs, the maximum-sized trace buffers, the mempool that never releases, the fixed recursion shape), the theoretical floor for the adopted shard (about 10 to 11 GB, approximate); (2) the survey: SP1, RISC Zero, Airbender, ZisK, OpenVM, Pico, Ziren, Stwo, Jolt, Ceno, Nexus, Valida, Powdr, Binius, the 2026 entrants, the sumcheck and GKR family, folding, continuations, distributed proving, AMD and Apple backends, every claim cited; (3) per route the change to the guest, aggregator and node verifier, the cost in agent days, the risk, and whether 12 GB under 60 s is reached; (4) the ranking: re-size SP1's server with S_p as the dial and one server per card (no consensus change), RISC Zero as version 2 for the fallback and Apple, the sumcheck family in five years; (5) the tier consequences and the public line.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:19:04 +00:00
igneum-labs
9488399fcc Site and litepaper: level 1 on the hero and abstract, the chip bullet on the measured row; the level 3 table filled; status 22:18 2026-10-05 22:18:39 +00:00
igneum-labs
5959651452 Spec 01 1.13.1: the class v3 era draw (stride, interleave, windows) as decided, with the devnet stand-in and the measured spread 2026-10-05 22:17:59 +00:00
igneum-labs
31814153ee Spec 01: class v3's mixer x8 form in 1.8.5 with the measured costs, the class v3 vectors in 1.17, the cache note in 1.5 2026-10-05 22:17:33 +00:00
igneum-labs
4fa1320a0a Counter ASIC 2.0: gate G6 green; status 22:16 2026-10-05 22:16:50 +00:00
igneum-labs
a6be364c87 Counter ASIC 2.0 status 22:16: the 5090 power sweep, the G2 job go 2026-10-05 22:16:15 +00:00
igneum-labs
37dab3f5a5 counter-asic-2-node.md: the verifier before/after table (the mixer fix), class v3 = x8, the merges and checks on d5070e7 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:15:18 +00:00
igneum-labs
0f82258d7d Counter ASIC 2.0: the final-vectors package, the bash-body-check branch in the 0.3.11 tree; status 22:15 2026-10-05 22:15:07 +00:00
igneum-labs
6bbe8fbdb4 Consequences ledger: C24 and C27 closed on branch bash-body-check (7adb1ca, 6805125) with the merge notes 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:14:37 +00:00
igneum-labs
271db8e5ac Counter ASIC 2.0 status 22:13: suite job 4 published on the final tree 2026-10-05 22:13:25 +00:00
igneum-labs
199c974f3d Counter ASIC 2.0: the verifier fix and the x8 class committed; status 22:11 2026-10-05 22:11:49 +00:00
igneum-labs
d5070e744d Merge branch 'ca2-mixer' into ca2-v3 2026-10-05 22:11:29 +00:00
igneum-labs
1402989cdd Prover floor: SP1 6.8.1 GPU server memory model from source (the 24 GB panic, the threshold-sized trace buffers), the floor patch for sp1-gpu, the PC 2 toolchain, build and sweep playbooks 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:11:24 +00:00
igneum-labs
615837dbd0 Counter ASIC 2.0 status 22:11: the toolchain check, the build held behind job 4, C26 and C27 2026-10-05 22:11:10 +00:00
igneum-labs
ac2a4f9862 Consequences ledger: C26 taken into the proving plan 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:11:05 +00:00
igneum-labs
e041fb5e73 plan: the self-built CUDA server's packaging row before 0.3.12 (arch list, builder, signing, DMG and WSL2 placement, evidence note, rebuild at each SP1 upgrade, the verifying keys unchanged) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:10:55 +00:00
igneum-labs
9597374c4d verifier regression of e08909f fixed (derive_items out of line, one instance per cache size with the line mask a constant: v2 0.609 ms per unit against readwidth's 0.607, was 1.33); x8 into class v3 under the delegated rule (V3_CLASS = MX8; mx8-genesis and mx8-devnet-epoch0 re-exported through the seam, the devnet one with the era inside; the mx4 packs kept as the x4 record, generator 2); tests/packs.rs and tests/mixer.rs on the x8 class; mixer-x4.md 6.2a, 6.4a, 6.5 decision, 6.6 the regression; chip-model-v3.md headline x8 (0.92x with the factor); bench-log addendum with the PC 1 build rows 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:10:55 +00:00
igneum-labs
2b13281324 Consequences ledger: C26 with the prover-floor agent, C27 wiring rules 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:10:47 +00:00
igneum-labs
57249583d5 Consequences ledger round 4: C26 the rebuilt SP1 server's arch list and packaging, C27 checks at publish time; sweep 8 notes; D5 x8 decided 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:10:16 +00:00
igneum-labs
c597a7dcdb Counter ASIC 2.0 status 22:09: the fork test fixed at 89dfcb95 2026-10-05 22:09:59 +00:00
igneum-labs
c302a5738e counter-asic-2-node.md: suite job 3's result (kaspa-pow test rewritten for the era-in-class rule), the G6 reading corrected (the PC runs the feature-gated tests) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:08:44 +00:00
igneum-labs
90589ff60c Counter ASIC 2.0: G6 job 3 failed on a stale fork test, job 4 on the final tree; status 22:08 2026-10-05 22:08:07 +00:00
igneum-labs
a941b8b467 Counter ASIC 2.0: mixer x8 decided into v3 on the PC build rows; status 22:06 2026-10-05 22:06:59 +00:00
igneum-labs
f2d3dcaf3b Merge branch 'ca2-mixer' into ca2-v3 2026-10-05 22:05:05 +00:00
igneum-labs
92ab4582b3 counter-asic-2-node.md: the three PC 2 suite jobs (the flake, the kaspa-consensus rerun passed, job 3 pending) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:04:29 +00:00
igneum-labs
27a7ca6550 Counter ASIC 2.0 status 22:03: the PC 2 prover back, suite job 3 published 2026-10-05 22:03:35 +00:00
igneum-labs
4f0b9f5475 bench-log: the root-socket recurrence of 21:25Z and the fix job of 22:01Z (the prover proved again at 22:02Z) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:03:06 +00:00
igneum-labs
829687b1ab mixer x4: the measure session (v2 / x4 / x8 verifier 1.33 / 1.94 / 2.79 ms per unit on a loaded core, 1.45x and 2.1x; the 256 MiB fill 172 to 175 ms; the Metal 1 GiB build flat at 21 ms, latency-bound), the verification-throughput consequences (C19), what is unverified and what is owed; the bench-log entry; the PC 1 two-card playbook; the measured verifier row in the chip model 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:02:28 +00:00
igneum-labs
d2d5f5d6f2 mixer-x4.md: the x8 packs' Metal and Apple OpenCL rows, the daily-build table per tier (5090, 9070 XT, M5 Max, gfx1036 per prepare, a scaled 8 GB-class row) and the x4 / x8 rule; chip-model-v3.md: the mixer row alone as the headline (layer 5 measured, not adopted, with the 5090 and 9070 XT g beside the Mac's), x8 rows at year 0 and year 4 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:02:23 +00:00
igneum-labs
147db8db44 mixer x8 candidate beside x4 (coordinator's rule, 5 October 2026 21:30 UTC): LoadClass::MX8 ("mx8", same stream, keys (r m + j + 1) x 0x9E3779B9), the two candidate packs mx8-genesis and mx8-devnet-epoch0 (generator 2 with the class in the id; the vectors are re-cut through the seam after the x4/x8 choice), tests/mixer.rs fuzz takes IGNEUM_MIXER_CLASS, the PC playbooks carry the x8 packs and the gfx1036 fallback; mixer-x4.md: the Metal fuzz row 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:02:23 +00:00
igneum-labs
86ef4eab1e chip-model-v3.md: the hot table in the added form priced with the Mac's g (0.93 / 0.87 at 32 / 64 MiB, the 5090's g pending the PC rows): 1.98x and 2.12x at the equal integer budget, 1.60x and 1.67x with the SRAM deducted; the margin section says which convention keeps the claim 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:02:23 +00:00
igneum-labs
36ef07fda2 mixer x4: tests/mixer.rs (200-program v3 fuzz with the Metal pack writer, stats beside v2, dataset edges at every multiplier, determinism against the pinned pack); scratch.rs edge literal gains era_bytes; mixer-x4.md: the v3 vector tables, the v2 diff, the Metal and Apple OpenCL bit-exactness rows, the soundness table so far 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:02:23 +00:00
igneum-labs
65600a5caa Counter ASIC 2.0 status 22:01: the regression bisected, the mixer PC job, the PC 2 queue, the ship template 2026-10-05 22:01:10 +00:00
igneum-labs
23ab08202f plan: the 12 GB floor's cause (the shipped sp1-gpu-server refuses cards under 24 GB and allocates every prover at Setup; the prover-floor agent's source read) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 22:00:37 +00:00
igneum-labs
1852593e58 Counter ASIC 2.0: G6 job 2 green; the master merge dry-run; status 22:00 2026-10-05 22:00:30 +00:00
igneum-labs
be67d76914 Counter ASIC 2.0 status 21:59: 0.3.10 shipped and merged, the 0.3.11 base is master 2a9dbd8 2026-10-05 21:59:55 +00:00
igneum-labs
e3b7ac869b counter-asic-2-node.md: the cache merge done and checked, the mixer fix owed (54bbfcc is not it; its merge conflicts in bench-log.md and packbench.swift only) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:59:18 +00:00
igneum-labs
d60caeb608 Counter ASIC 2.0 status 21:58: ca2-v3 def920b with the cache merged 2026-10-05 21:58:53 +00:00
igneum-labs
ae699a4af2 release-0.3.10 plan: the merge to master, the console card's stale commit string, the site build on a conflicted journey.json 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:58:34 +00:00
igneum-labs
4c4a947baa Counter ASIC 2.0: layers 4 and 8 decided IN on the PC rows; status 21:58 2026-10-05 21:58:33 +00:00
igneum-labs
def920b1ed counter-asic-2-node.md: the CPU hash rate across the switch in run 2 (approximate) and the verifier slowdown the era agent measured, to be re-measured after the mixer fix 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:58:22 +00:00
igneum-labs
2a9dbd8176 Merge release-0.3.10: the certificate-driven reorg (C4), EVM transaction relay (protocol 14), the pack loader fix and the rebuilt workers, the six-section miner, GPU hot-plug, elevated-job exit codes, the PC-built Windows node (static libstdc++), node 21d4c73c; shipped 5 October 2026 21:32Z 
# Conflicts:
#	site/index.html
#	site/journey.json
 2026-10-05 21:58:04 +00:00
igneum-labs
e83084a1c1 Counter ASIC 2.0 status 21:58: ca2-cache rebased 39ecd7c 2026-10-05 21:58:03 +00:00
igneum-labs
3a6beaa0b8 Counter ASIC 2.0 status 21:57: the era PC job, the verifier regression gate item, the PC 2 order 2026-10-05 21:57:48 +00:00
igneum-labs
39ecd7c52b hot table (Counter ASIC 2.0 layer 5), measured and not adopted, on the ca2-v3 composed class (squash of tag ca2-cache-history-2026-10-05) 
LoadClass::hot (Option<HotClass { mb, k, added }>) beside mix, slots, scratch, mixer_mult, growth and era; V3_CLASS = { era: None, hot: None, ..LoadClass::MX4 } (hot stays None: the hot code is behind the flag, measured and not adopted). Op::Hot, the hot slots drawn after the scratch slots, no width roll (v2_loads allows the added form's extra slots), the id suffix hot/<S><k>[added], the hot parsing inside parse_loads, the era branch first in name(). HotTable under seed_words("igneum-hot/" || epoch seed) with the cache chain and tag umHT, read at H[mulhi(src, HOT_WORDS)]; DatasetSource::hot attached by new_class_day and from_seed_bytes_class; the acceptance stand-in dataset_elem(idx, S[2], S[3]); the three emitters (hot argument after the init words, ht_segment and igneum_hot_fill beside the layout-aware cores); packfile.h hot fields beside class, era, attempt and mixerMult; OpenCL host, Metal packbench and NVRTC worker fill H on the device and self-test it. Eight packs under proto-cuda/packs-ca2-hot (replaced hot32k4 hot64k4 hot96k4 hot64k2 hot64k8, added hot32k4a hot64k4a hot96k4a) re-exported on the merged crate: vectors unchanged, program.h and program.json carry the mixer fields. docs/plans/hot-table.md (design, spec text, per-tier budget, chip model, Mac and PC measurements, the decision: layer 5 out of v3, the 3.0 note); bench-log entry and addenda with job ids and worker sha256s; the two PC playbooks.

Checks on this commit: cargo test --release 53 + 19 pass (the pinned v2, mx4, era, readwidth and hot packs); the pinned packs under proto-cuda/packs, packs-ca2-mixer, packs-ca2-era and packs-readwidth untouched; Metal packbench and Apple OpenCL --bench-pack on all eight hot packs (run lock, 2^20 at base 0): 96/96 lanes, hot table head, last line and FNV PASS, one fingerprint per pack on both harnesses, equal to the fingerprints before the rebase (hot32k4 679e5e83378d3790, hot64k4 d4c9e456b039fdef, hot96k4 7c98eceffee9fd73, hot64k2 f43b10a95879b8e5, hot64k8 c11309d743be9392, hot32k4a afb700b2d997c847, hot64k4a ba214baa9c1a9e85, hot96k4a 29e1916aed6deff5). No era or mixer behaviour changed: every resolution kept the ca2-v3 side and appended the hot branch.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:57:39 +00:00
igneum-labs
3f81901155 plan: the aggregation-cost agent's card-alone rows (an empty shard 2 s, an aggregation 2 s, 4 proving-only cards for an empty chain) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:57:26 +00:00
igneum-labs
26ebf9cf29 release-0.3.10 plan: the ship (run 37374158235 after six dispatches through GitHub's outage, the fallback rehearsed on PC 1 and stood down), the rollout with per-machine times, the hand nodes and the seed, the digest sweep, the mixed fleet, the next cut and the open items 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:57:21 +00:00
igneum-labs
5fc5e100ad Counter ASIC 2.0: G6 first job failed on the known kaspa-consensus flake, split re-run; the app branch final a223ca9; status 21:56 2026-10-05 21:56:54 +00:00
igneum-labs
c4da08d302 App: the resume path re-arms every stopped card, re-exports its pack and checks 90 s later that every enabled card mines (PC 2 at 21:25:11Z and the Mac that afternoon stayed at 0 MH/s after resume); the PC 2 socket-fix job 
The known-failed case, from PC 2's 0.3.9 log (run win-1ccfe586-20261005-200114): 1791234223 pause -> 'stopping the
miners (paused)' (every slot's restart_at cleared, the 5090 'off'); 1791235511 '[ok] mining resumed'; then
'0.00 MH/s, waiting' at every 30-s status line until the 0.3.10 restart at 21:49:41Z. Cause: Cmd::Resume re-armed
only slots whose watchdog said faulted; the 5090's slot was healthy and stopped, so nothing restarted it. The test
the_pc2_resume_of_21_25_11z_restarts_under_the_new_rule_and_not_the_old encodes that slot (faulted false, live
false): the old rule returns [] (the defect), the new rule [0]. cargo test -p igneum-app resume: 3 passed;
provedefault: 6 passed.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:56:20 +00:00
igneum-labs
1610a0744b Counter ASIC 2.0 status 21:55: both PCs on 0.3.10, the PC 2 prover socket item, ca2-v3 495c552 2026-10-05 21:55:39 +00:00
igneum-labs
495c55280c counter-asic-2-node.md: gate G4 run 2 PASS on the composed class (era in the class on the mixer, 1558971): 181 / 124 blocks, 0 rejected, 0 forks; the PC 2 suite job id; the cache merge owed 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:53:37 +00:00
igneum-labs
fc5721a516 Counter ASIC 2.0 status 21:53: the suite job published 2026-10-05 21:53:24 +00:00
igneum-labs
4127c80108 Counter ASIC 2.0: gate G4 green (runs 1 and 2); status 21:52: the suites packing 2026-10-05 21:52:11 +00:00
igneum-labs
110a9b1af1 Counter ASIC 2.0: the resume fix assigned to 0.3.11's app half; status 21:50 2026-10-05 21:50:54 +00:00
igneum-labs
6d4767b2a9 Consequences ledger: sweep 7 notes (hot table out, era draw in, x8 verifier half, the PC 2 resume defect) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:49:39 +00:00
igneum-labs
705e129446 Counter ASIC 2.0 status 21:46: PC 1 on 0.3.10, the era go 2026-10-05 21:46:13 +00:00
igneum-labs
17da4045b5 Counter ASIC 2.0 status 21:45: the PC 2 resume no-op defect, the miners off since 21:25 2026-10-05 21:45:43 +00:00
igneum-labs
30f7c41c29 Consequences ledger: C19 and C14 closed on the mixer verifier measurement (x8 = 2.1x, 7.1 ms margin); D5 carries it 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:43:45 +00:00
igneum-labs
978c430a8a Counter ASIC 2.0 status 21:42: the era fast-forward 1558971, the cache rebase, the suites' tip 2026-10-05 21:42:41 +00:00
igneum-labs
5f125f5aee Counter ASIC 2.0 status 21:41: the era draw's Mac spread 0.8%, the final package, the merges 2026-10-05 21:41:42 +00:00
igneum-labs
1558971521 era layout (Counter ASIC 2.0 layers 4 and 8) behind the class flag, on the ca2-v3 seam: the 7-draw era stream from E_n (stride, interleave, width pinned at 4 B), per-site window draws (dataset, half, quarter at a 256 MiB floor), the strided windowed load address in the interpreter, the acceptance mirror and the three emitters, the interleaved dataset layout riding with the program (memhard::Layout, mh_t/mh_j/mh_addr, Epoch::dataset_word), V3_CLASS with the era drawn inside by generate_from_seed_bytes_program_class, --era / --era-widths on the CLI, six class v3 era packs (packs-ca2-era), tests, the design doc, host.cu/host.c deriving host words through the pack's mh_word, emu/test-layout.sh, the PC 1 playbook 
Squashed from six commits (tag ca2-era-pre-squash) for one merge.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:41:33 +00:00
igneum-labs
f394016bc3 Counter ASIC 2.0 status 21:41: the mixer timing session, x8 provisional 2026-10-05 21:41:15 +00:00
igneum-labs
208487c300 Counter ASIC 2.0 status 21:40: x8 built and bit-exact, the mixer PC job 2026-10-05 21:40:50 +00:00
igneum-labs
b3d15a7304 counter-asic-2-node.md: the two owed items (gate run 2 on the composed class, per-day dataset reuse in the CUDA and OpenCL workers) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:39:11 +00:00
igneum-labs
a61bbc4524 Counter ASIC 2.0: gate G4 run 1 PASS recorded; status 21:39 2026-10-05 21:39:01 +00:00
igneum-labs
08db83b2eb counter-asic-2-node.md: gate G4 run 1 PASS on the mixer-x4 class (181 / 124 blocks across the boundary, 0 rejected, 0 forks, 3 switch lines, v2 and v3 program ids), the summary JSON 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:38:37 +00:00
igneum-labs
29e1b28db4 Counter ASIC 2.0 status 21:38: ca2-cache final 2de19e5 2026-10-05 21:38:34 +00:00
igneum-labs
9eb6b5e654 Counter ASIC 2.0: layer 5 decided OUT on the PC rows; status 21:36 2026-10-05 21:36:30 +00:00
igneum-labs
5c0c196331 Consequences ledger: C23 taken by ca2-mixer too 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:36:08 +00:00
igneum-labs
030858063c Counter ASIC 2.0 status 21:34: PC 2 timing, the suites after the restart 2026-10-05 21:34:16 +00:00
igneum-labs
d6a503ca93 Counter ASIC 2.0: the iGPU restart-per-epoch statement, dataset reuse on the next-cut list, the gate's script fix; status 21:32 2026-10-05 21:32:35 +00:00
igneum-labs
54132959be Merge origin/master (the explorer pages, the public API check, the CLAUDE.md note) into release-0.3.10; docs, site, observer and ci.yml only 2026-10-05 21:32:17 +00:00
igneum-labs
2432a01f6c Counter ASIC 2.0 status 21:31: the runner recovered, the 0.3.10 rollout, the restart rule 2026-10-05 21:31:32 +00:00
igneum-labs
1df7ae9b08 Consequences ledger: C25 closed (Ember Tune 5d7ced9) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:31:24 +00:00
igneum-labs
ac55f878e1 Consequences ledger: C23 taken by the coordinator, C24 in work with the no-skip rule 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:31:11 +00:00
igneum-labs
dd37094a5b ember-tune.md: a signed prior is a starting point inside the card's own reported limits, never a memory clock; the tests that prove the clamp (consequences row C25) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:31:06 +00:00
igneum-labs
3791a29ebb Counter ASIC 2.0 status 21:31: C23 and C24 2026-10-05 21:31:06 +00:00
igneum-labs
48c13b5f1e Consequences ledger round 3: C23 the mixer's daily build on the iGPU tier, C24 the bash-body-in-PowerShell class, C25 tuning priors under the signing key; D5 re-cut to the measured chip row 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:30:25 +00:00
igneum-labs
d8e6ad3341 Counter ASIC 2.0: the x8 refinement in the rollout plan; status 21:28: hot-table go, installer attempt 3 failed, PC 1 order 2026-10-05 21:28:07 +00:00
igneum-labs
52e41787ec Counter ASIC 2.0: the x4/x8 decision rule recorded (delegated); status 21:27 2026-10-05 21:27:46 +00:00
igneum-labs
8981d15f59 Counter ASIC 2.0 status 21:27: installer attempt 3, the fast-failure rule 2026-10-05 21:27:00 +00:00
igneum-labs
99f7836a81 bench log: Ember Tune, what PC 1 could measure tonight (elevated=False, the cancelled prompt at 20:09 UTC, the 9070 XT off the bus), the pipeline verified without a card, the tier consequences 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:26:31 +00:00
igneum-labs
e2be67fc3f Counter ASIC 2.0: G6 state and the expected 0.3.11 digest; status 21:25 2026-10-05 21:25:28 +00:00
igneum-labs
7053d206a1 counter-asic-2-node.md: the (program id, era seed) identity, the measured digest flip, the Mac suite results 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:25:09 +00:00
igneum-labs
5c808b89e0 Ember Tune: every card tuned for MH per watt out of the box, the fleet prior per card model in the signed manifest, the console and /miners priors table 
the project lead, 5 October 2026, 22:45 BST: "make sure we have ember tuning every single card for efficiency out of the box, the
more data = the better the tune, make an awesome system." Built on lever 3 (docs/plans/miner-eff.md), lever 2's signed
tuning section (docs/design/miner-tuning.md), the AMD telemetry helper (423936b, its --tune/--set-gmax/--set-plimit/
--reset contract) and the Power control switch (057f0ec). Design, data flow, tiers and the privacy line:
docs/plans/ember-tune.md.

- src/ember.rs (new): two knobs per card (power limit %, core clock cap MHz; memory clock never touched), the full plan
  (power ladder 100..50%, then the clock ladder 90..60% at the chosen power), the confirm plan (the fleet prior and one
  neighbour), the baseline plan (measure only), the marks (faulted, hot, memory_clock_dropped, unapplied, no_readings),
  the choice (best MH/W within 1% of the top rate, then rate, then draw), the fleet record (a hash of the install id,
  no address), the prior lookup and the kill switch (tuning.ember), the state machine on a fake clock. 9 unit tests.
- engine.rs: tick_sweep schedules every NVIDIA, AMD and Apple card (120 s steady, 600 s to the boundary, no job hold,
  no pause, weekly, again after a driver major or program-class change, never under the manifest kill switch); the
  probe (nvidia-smi clocks.max.gr + driver_version and the direct/helper mode; igneum-gpu-telemetry --tune for AMD);
  tune_apply (nvidia-smi -pl / -lgc 0,<MHz> / -rgc directly or through the helper; the AMD helper per request);
  Cmd::TuneProbe, Cmd::TuneSet; faults from rejected and mismatched hashes mark the step; the TUNE lines and the TUNE
  {json} record, uploaded with the log; the Tuned line on the card state. The NVIDIA helper starts only with Power
  control on: the --sweep job never counts as permission (no prompt on a PC with nobody there).
- sweep.rs: the helper protocol gains lgc/rgc (clock cap and reset) and resets the clocks after 20 idle minutes.
- state.rs, config.rs: the tune fields (clock cap, driver, class, source, the Tuned line); the nvidia-smi telemetry
  query carries clocks.gr and clocks.mem; the AMD sample line's plimit_pct and gmax_mhz are parsed.
- ui: "Tuned: X MH/s at Y W (Z MH/W)" with the point, the source and when; measure-only cards say why; the Ember Tune
  switch; tune-line.test.mjs.
- relay/lib/ember.mjs + relay/test/ember.test.mjs: the aggregation per (card model | driver major | program class):
  median point, MH/W, spread, samples, machines; five samples converge, an outlier does not move the median, baselines
  make no prior, de-duplication, the manifest merge keeps lever 2's cards. api/console.mjs fn=tuning and
  tools/console.mjs tuning; tools/tuning.mjs --priors [--write tuning.json] [--site] [--tuning-off].
- site: the fleet priors table on /miners (site/miner-priors.json), the lever text.
- relay/playbooks/ember-tune-pc1.ps1: the PC 1 run (second engine with --sweep from a scratch copy of the install).

Measured tonight: see the bench log entry that follows the PC 1 run. The 9070 XT left PC 1's bus at 20:40 UTC and the
5090 needs the administrator prompt the project lead cannot answer asleep, so tonight's PC 1 run is the baseline plan on the 5090
through the whole pipeline; the two-knob tune on both cards is owed.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:25:09 +00:00
igneum-labs
48baa91575 Counter ASIC 2.0 status 21:25: the mixer x4 bit-exact on the Mac, the chip row 1.84x, the hot table's effect on the row 2026-10-05 21:25:03 +00:00
igneum-labs
c0c44cab39 Counter ASIC 2.0 status 21:24: the third eGPU drop, the miners are mining, the installer build running 2026-10-05 21:24:45 +00:00
igneum-labs
ec0c36f611 Counter ASIC 2.0 status 21:23: the era package, the V3_CLASS composition rule 2026-10-05 21:23:38 +00:00
igneum-labs
123af2d107 Counter ASIC 2.0 status 21:23: the installer build republished, PC 1 order 2026-10-05 21:23:10 +00:00
igneum-labs
877b45a116 Counter ASIC 2.0 status 21:22: the installer build job failed in 2 s, PC 1 decision pending 2026-10-05 21:22:37 +00:00
igneum-labs
ced3b703d4 Counter ASIC 2.0 status 21:22: Ember Tune queued 2026-10-05 21:22:20 +00:00
igneum-labs
e8547b1bcb Counter ASIC 2.0 status 21:21: PC 2 to agg-cost-pc2-2 until 21:45, the PC 1 order 2026-10-05 21:21:27 +00:00
igneum-labs
41afd097cd Counter ASIC 2.0 status 21:20: the added-form hot table on the Mac, the decision rule for layer 5 2026-10-05 21:20:53 +00:00
igneum-labs
8420f074d5 Counter ASIC 2.0 status 21:20: layer 9 complete with the compile-ahead table and the floor 2026-10-05 21:20:25 +00:00
igneum-labs
5a6c30560a Counter ASIC 2.0: the proving v1 app branch final 6dc686a; the 0.3.11 tree composition; status 21:20 2026-10-05 21:20:13 +00:00
igneum-labs
6cb846b84c ca2-epoch: the Mac compile-ahead measurement (10 fresh programs 15.9 / 17.7 / 20.4 ms min / median / max, the devnet pack 79 ms then 1 ms from the shader cache) in docs/bench-log.md and epoch-length.md section 6; the per-card table and the 600-s floor filled 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:19:33 +00:00
igneum-labs
b52c5f4cda Consequences ledger: C19 taken by ca2-mixer, the 8x corrected to under 4x pending the run 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:17:11 +00:00
igneum-labs
37fa956ca5 Consequences ledger: C22 taken in full by the proving agent 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:12:23 +00:00
igneum-labs
2f6c7138b6 evidence and litepaper: the 24 GB tier is measured on the 32 GB card's allocation, not yet on a 24 GB card (consequences C22) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:12:13 +00:00
igneum-labs
451b02ea42 Counter ASIC 2.0 status 21:11: the 9070 XT back on the bus, PC 1 to the 0.3.10 build, the playbook parse-gate rule 2026-10-05 21:11:19 +00:00
igneum-labs
2bc198b89d Consequences ledger: C2 closed on the miner-on curve; C22 the 30 GB CPU prover against the macOS switch; sweep 5 notes; D2 the two drafts and the 24 GB marker 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:09:39 +00:00
igneum-labs
1319adf588 Counter ASIC 2.0 status 21:05: the node merge ba43cf0f, the hot-table package, unproven_daa at fast time 2026-10-05 21:05:20 +00:00
igneum-labs
36c5f13a5f fast-time: the proving v1 fields and pow_genesis_dataset_log2 in both override files (the fork's every-field test), README rows; class-v3.mjs reports the build time per epoch; docs/plans/counter-asic-2-node.md (the node side of Counter ASIC 2.0, gate result pending) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:04:39 +00:00
igneum-labs
006b2fe585 Counter ASIC 2.0: proving v1 handoff recorded in the rollout plan; status 21:04 2026-10-05 21:04:35 +00:00
igneum-labs
594790b354 Merge branch 'amd-prove' into ca2-coord 
# Conflicts:
#	docs/bench-log.md
 2026-10-05 21:03:58 +00:00
igneum-labs
5424c30bba Proving v1: the app's default restores Decision and gb (lost in the tier rewrite), the AMD-only and Apple 'mines and does not prove' line with the CPU prover's measured cost, the plan's AMD/Apple row 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:03:42 +00:00
igneum-labs
ffa2633845 docs/analysis/amd-proving.md: no zkVM proves on AMD (SP1, RISC Zero, Jolt, OpenVM, ICICLE cited), the SP1 CPU prover measured on PC 1 beside the miners (282 s a shard at any size, 30 GB RSS: no CPU tier), the tier consequences and the public line; PC 1 job scripts with the bash -n gate; bench-log entry 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 21:02:59 +00:00
igneum-labs
4366c6ad90 Counter ASIC 2.0 status 21:02: the measure lock convoy, found by lsof 2026-10-05 21:02:13 +00:00
igneum-labs
64ab9ce8d0 Counter ASIC 2.0 status 21:01: the 0.3.10 installer build takes PC 1 after the repro run 2026-10-05 21:01:20 +00:00
igneum-labs
b93d1897eb Counter ASIC 2.0 status 21:00: PC 1 to the repro run, PC 2 to agg-cost, the CPU fallback numbers, the S_p shard dropped 2026-10-05 21:00:58 +00:00
igneum-labs
2abdb56194 Counter ASIC 2.0 status 20:58: PC 1 and PC 2 occupancy 2026-10-05 20:58:57 +00:00
igneum-labs
46bad306d8 Proving v1: the harness passes on the final fork tree (N = 8, 21 checks in 244 s) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:57:33 +00:00
igneum-labs
b4e94a482d Counter ASIC 2.0 status 20:57: the mixer construction committed, MX4 is V3_CLASS 2026-10-05 20:57:12 +00:00
igneum-labs
4ddc9fcf4c Proving v1: the miner-on curve's 2^25 rows (the prototype shard 24.7 GB and 38.8 s beside the miner) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:56:32 +00:00
igneum-labs
88740ce75e Counter ASIC 2.0 status 20:56: PC 2 released, the proving fork tip, the S_p curve with the miner on 2026-10-05 20:56:23 +00:00
igneum-labs
1aff0b79d1 Proving v1: the miner-on curve (the adopted shard 22.2 GB and 13.2 s beside the miner; the prototype 30.1 GB): the 24 GB tier measured, the public lines updated 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:55:54 +00:00
igneum-labs
e08909f138 mixer x4 and the cache growth rule (Counter ASIC 2.0, class v3 construction): LoadClass mixer_mult and growth, LoadClass::MX4 (v2 loads, no width roll), memhard::Shape in MixParams, m mixer applications per round with keys round_key(r m + j), Cache::fill_log2, the option C schedule (growth_doublings, cache_log2_words, dataset_log2_words, days_since_genesis) with its test table, day-sized Epoch entries, the three emitters (m loop only for m > 1, v2 text unchanged), program.h and program.json fields, packfile.h mixerMult, packbench and OpenCL host prints, --class mx4 and --days on the CLI; docs/plans/mixer-x4.md design and spec text, docs/analysis/chip-model-v3.md, the 5090 and 9070 XT dataset-build playbooks (measurements and vectors to follow) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:54:10 +00:00
igneum-labs
3e237db050 counter-asic-2.md: layer 9 row and the decisions table of 5 October 2026 (night) 2026-10-05 20:53:45 +00:00
igneum-labs
f2c99cff95 Spec 01 1.4.5 and 1.4.6: generator 3, the class and era seed in the pack and on the job line, the refusal rule 2026-10-05 20:53:26 +00:00
igneum-labs
9eee20f97c Counter ASIC 2.0 status 20:53: spec text applied for layers 6, 7, 9; what still lands from the branches 2026-10-05 20:53:12 +00:00
igneum-labs
ac0d7c1592 Spec 01 and 04: layer 9 epoch_len (1.12, 1.13.1, 4.3), reserve family R1 and the emulation rule (1.13.2), the cache growth rule option C and the step mapping (1.13.3), the mixer_mult row 2026-10-05 20:52:58 +00:00
igneum-labs
cf0839a231 Counter ASIC 2.0 status 20:51: chain_dataset_day wired in the node, evidence row 22 2026-10-05 20:51:52 +00:00
igneum-labs
b8f8105af4 evidence.md: the card-lifetime claim as a designed row under the step schedule 2026-10-05 20:51:38 +00:00
igneum-labs
4a7b72da9b Litepaper hardware line on the step schedule; status 20:51: public copy applied, level 1 and the limits bullet wait for the chip row 2026-10-05 20:51:26 +00:00
igneum-labs
949c4582e1 Counter ASIC 2.0 status: readwidth head hash corrected to 06dcb31 2026-10-05 20:50:30 +00:00
igneum-labs
9fd666f3ff Consequences ledger: the read-width hash is 30ff674 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:50:21 +00:00
igneum-labs
fadc284414 Consequences ledger: C6 closed on pool-v0 (proving flag, no software dev fee in pool mode); D8 carries the fee sentence; the HiveOS README three-branch merge note 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:50:18 +00:00
igneum-labs
4f042f37dc Counter ASIC 2.0 status 20:50: the measure lock holder, the with-lock status defect 2026-10-05 20:50:05 +00:00
igneum-labs
ad2c0b566b Consequences ledger: C12 the Apple footprint arithmetic and the harness fields (read-width 46dcc3e) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:50:05 +00:00
igneum-labs
06dcb310fb read-width: per-watt and per-pound rows (telemetry watts, list prices approximate) and the AMD consequence (C11); packbench prints Metal's currentAllocatedSize and recommendedMaxWorkingSetSize (C12) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:49:45 +00:00
igneum-labs
4a1f872cb6 Counter ASIC 2.0 status 20:49: mixer construction, the lock cleared, PC 2 state, one merged-tree suite job 2026-10-05 20:49:39 +00:00
igneum-labs
1eaeefd770 Proving v1: the S_p curve's re-plan points (28.4 GB at 20 M cycles: the peak is flat from 20 M to 60 M) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:49:26 +00:00
igneum-labs
27471633c7 Counter ASIC 2.0 status: heading times 20:42 to 20:47 corrected to the commit clock 2026-10-05 20:48:20 +00:00
igneum-labs
9343d96a98 Counter ASIC 2.0 status 21:15: the Sonnet box off the link, PC 1 facts corrected, the queue 2026-10-05 20:47:57 +00:00
igneum-labs
ad6c8b4c52 Consequences ledger: C7 and C21 closed on the rig side (217d873), C20 confirmed no rig change 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:47:02 +00:00
igneum-labs
ce7474a74e Consequences ledger: sweep 3 notes (the 9070 XT bus drop stated by the coordinator, the epoch plan's tier table, the drafted litepaper sentences); C7 HiveOS table re-cut (2d056e8) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:46:53 +00:00
igneum-labs
c8f0fe7472 Counter ASIC 2.0: the G1 ruling (gfx1036 as the AMD vendor tonight), hardware events section for the morning 2026-10-05 20:46:20 +00:00
igneum-labs
1887438b36 Consequences decisions: D2 notes the proving agent's drafted sentences on its branch 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:45:56 +00:00
igneum-labs
4c9820c202 Consequences ledger: C15 closed with the S_p curve tiers; D2 recommendation re-cut to the measured tiers 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:45:46 +00:00
igneum-labs
fbeb3bb94d Counter ASIC 2.0 status 21:05: the 9070 XT absent on PC 1, app restart facts, era package ETA 2026-10-05 20:45:35 +00:00
igneum-labs
b1266b7fb7 Consequences ledger: C20 closed with the epoch agent's correction (prepare-ahead, exit 42 on a miss only) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:45:14 +00:00
igneum-labs
894022b926 Proving v1: the tiers from the S_p curve (24 GB proves the adopted shard, 32 GB mines and proves the prototype one, 12 and 16 GB off on this build) in the app's default, the litepaper, evidence rows 15 and 16 and the plan 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:45:01 +00:00
igneum-labs
560b6f78b6 ca2-epoch: docs/plans/epoch-length.md, the epoch length as a signalled era parameter (layer 9): day-anchored ladder 600 to 7,200, signal-only with the draw slot consumed, lead and T_epoch fixed (option A), the difficulty-settle constraint, the FPGA compile-time threat with citations, the per-card compile-ahead table and the 600-s floor (Mac rows pending the measurement), consequences per tier, spec text for 1.12, 1.13.1 and 4.3, owed list 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:44:45 +00:00
igneum-labs
878c0581ef Counter ASIC 2.0 status 21:00: the Metal pack path, the --prepare-packs app item, the seam signatures, the build queue 2026-10-05 20:44:16 +00:00
igneum-labs
03313281ba Proving v1: the S_p curve, card alone (13.9 GB floor, 20.4 GB at the v1 shard, 28.3 GB at the prototype shard): the 12 and 16 GB tiers cannot prove on SP1 6.8.1's GPU server, 24 GB proves v1 shards, 32 GB the prototype 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:43:22 +00:00
igneum-labs
bc671326a7 Consequences ledger: C21 the wallet also trusts K1 alone 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:43:21 +00:00
igneum-labs
fe852a4335 AMD telemetry: igneum-gpu-telemetry (ADLX on Windows, amdgpu sysfs on Linux, PDH utilisation fallback) feeds the card row's draw, temperature, fan, memory clock and MH/W; measured on PC 1: 9070 XT 198.9 W, 64 C, 657 rpm, 17.73 MH/s = 0.089 MH/W beside the 5090 at 307.6 W, 122.30 MH/s = 0.398 MH/W 
the project lead watched the 9070 XT at 90% usage with its fans barely turning and the app could not say what it drew: the
draw, temperature and MH per watt line came from nvidia-smi only, and the earlier per-watt figure used the board
rating. proto-opencl/gpu-telemetry.c prints one line per AMD card per sample (bus from SetupAPI by the display
device's name, kind, name, watts, temp_c, fan_rpm, fan_pct, mclk_mhz, gclk_mhz, util_pct, source), built by
build-windows.sh against vendor/adlx (the SDK clone), shipped by make-payload.sh and push-inputs.sh. The engine
runs it with -l 5 beside nvidia-smi (Source::AmdTelemetry, tick_amd_telemetry), parse_amd_telemetry fills
power_w, temp_gpu, fan_pct, fan_rpm, mclk_mhz, util_pct and telemetry_at on the AMD card matched by kind and
ordinal, so eff_mhw and the dashboard's existing line show it; app.js shows fan and memory clock when present.
Tests: three on the parser with lines captured on PC 1 and the Mac fixture; the sysfs path ran on a fixture tree.

Measured over 20:27:45 to 20:29:41 UTC with both cards mining (docs/bench-log.md, under the 9070 XT ceiling table):
9070 XT 198.9 W (193 to 212), 64 C, 657 rpm, 2,505 MHz memory, 3,290 MHz shader, 100% busy, 17.73 MH/s =
0.089 MH/W; RTX 5090 307.6 W, 69 C, 44% fan, 122.30 MH/s = 0.398 MH/W.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:43:21 +00:00
igneum-labs
436d3f70d6 Consequences ledger: C21 the OTA agent's take (7a412bd), the HiveOS README double-edit merge note 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:43:09 +00:00
igneum-labs
fd5384abe6 Consequences ledger: C7 HiveOS words landed (226d3b8), C18 closed, C19 C20 in work 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:42:14 +00:00
igneum-labs
0e337349d0 Counter ASIC 2.0 rollout: the rig miners' exit-42 path on the next-cut list as a layer 9 precondition 2026-10-05 20:42:03 +00:00
igneum-labs
3e3b12b505 Counter ASIC 2.0: C18 per-pound correction struck everywhere, C19 and C20 routed 2026-10-05 20:41:50 +00:00
igneum-labs
3f9bf60576 Counter ASIC 2.0 status 20:45: the node switch written, the Metal worker gate item, PC 1 gaps 2026-10-05 20:41:37 +00:00
igneum-labs
e43db2b6f1 Consequences ledger round 2: C18 per-pound figure, C19 mixer x4 verify cost per tier, C20 layer 9 rig restarts, C21 OTA keys on rigs; C4 C8 C11 C12 states; D4 revised to (b) with the lifetime table 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:41:27 +00:00
igneum-labs
33713368b6 Counter ASIC 2.0 status: heading times corrected to the commit clock (UTC) 2026-10-05 20:41:03 +00:00
igneum-labs
7f3201f533 Counter ASIC 2.0: rig-install follow-ups on the next-cut list, the CPU fixture in the PC 1 gap, no more agents 2026-10-05 20:39:44 +00:00
igneum-labs
05c6feef0d Consequences ledger: C7 the rig gates follow the sweep (70b95d5) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:39:18 +00:00
igneum-labs
9dcb9697cf Counter ASIC 2.0 status 23:20: the PC 1 queue 2026-10-05 20:39:03 +00:00
igneum-labs
3f1d7e31aa Consequences ledger: C7 the rig installer's answer; D8 the miner page's mines-and-proves sentence 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:38:47 +00:00
igneum-labs
4ce31bbbe0 Counter ASIC 2.0 status 23:10: layer 7 PC rows, PC 1 free 2026-10-05 20:38:08 +00:00
igneum-labs
344cba8e8c Proving v1: the memory sweep and the miner-on peaks, the root-socket class fix (cleanup lines, tools/ci/prover-socket-check.sh in CI), the host's --budget re-plan and the S_p curve job, the RAM and aggregation-card gates, N = 8 in the fast-time file and spec 7.4 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:35:13 +00:00
igneum-labs
3f33c6fd00 Counter ASIC 2.0 status 23:00: layer 9 agent, PC queues 2026-10-05 20:32:53 +00:00
igneum-labs
770145f7be Counter ASIC 2.0: card lifetime merged, cache freed after the build, growth mapping (b) recommended, public lines listed 2026-10-05 20:31:48 +00:00
igneum-labs
c9ebe7bd14 Counter ASIC 2.0 layer 7: RTX 5090 and RX 9070 XT dot4 numbers from PC 1 (job run-dot4-20261005): dp4a 7.45 T/s on the 5090 via inline PTX, v_dot4_i32_iu8 0.66 T/s on the 9070 XT via the clang builtin in Adrenalin OpenCL C, signed emulation 7.1x / 1.46x / 4.7x the ALU step on NVIDIA / AMD / Apple; no PC platform lists cl_khr_integer_dot_product 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:31:33 +00:00
igneum-labs
fa5a69148b Merge branch 'card-lifetime' into ca2-coord 2026-10-05 20:31:25 +00:00
igneum-labs
99ab478f1e docs/analysis/card-lifetime-2026-10-05.md: years each card tier keeps mining under the dataset schedule and the working-set rule, against the site and litepaper claims 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:30:46 +00:00
igneum-labs
66c2fea107 Consequences ledger: C16 the 20:01Z quit explained in part; C17 the root-owned SP1 socket class and the unattributed quit 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:30:31 +00:00
igneum-labs
37f6fa5a41 Consequences ledger: C13 closed by the explorer agent (894fe08) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:30:03 +00:00
igneum-labs
efeab4b23d Counter ASIC 2.0 rollout: ota-k2 commit on the next-cut list 2026-10-05 20:29:37 +00:00
igneum-labs
339b6981dd Consequences ledger: the proving agent's takes; C15 the 28.3 GB full shard and the unmeasured v1 shard; C16 the unexplained PC 2 app quit at 20:01Z 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:29:31 +00:00
igneum-labs
35b3e38d2a Counter ASIC 2.0 status 22:40: C1 decision and the 16:00Z check, one packfile.h fix 2026-10-05 20:29:09 +00:00
igneum-labs
e5a184dea2 Consequences ledger: states after the coordinator's and the miner UI's replies; C14 the mixer x4 verify cost for pools and nodes 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:28:17 +00:00
igneum-labs
724c5eee37 Counter ASIC 2.0: layer 9 row, C1 constraint, era mid-way and the attempt-aware packfile bug, C10 and C11 answers 2026-10-05 20:27:58 +00:00
igneum-labs
73358ca92d Proving v1: the 12 GB memory sweep on the 5090 (13.9 GB floor on an empty shard, 28.3 GB on a full one, no knob moves the floor) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-05 20:27:45 +00:00
igneum-labs
fff1994c8a Counter ASIC 2.0: layers 1, 2, 3 decided from the readwidth table, layer 5 Mac rows and the added-form redesign, user tiers, public level 2 edit 2026-10-05 20:27:01 +00:00
igneum-labs
6a9b7c1283 Counter ASIC 2.0: the mixer x4 decision into v3, ca2-mixer agent, status 22:00 2026-10-05 20:27:01 +00:00
igneum-labs
f4fc651512 Counter ASIC 2.0: layer 3 decided (scratch share 0, chip 2.4x at every share), the claim qualified, public level 3 headline 2026-10-05 20:27:01 +00:00
igneum-labs
5c3a35c6de Counter ASIC 2.0 status 21:35: the corrected SRAM mirror table 2026-10-05 20:27:01 +00:00
igneum-labs
bcb3f20bd9 Counter ASIC 2.0 status 21:25: proving v1 state, PC 2 queue 2026-10-05 20:27:01 +00:00
igneum-labs
cbbc81f002 Counter ASIC 2.0: the shipped-density correction to the SRAM mirror (130 to 165 mm^2), carried into the rollout and public docs 2026-10-05 20:27:01 +00:00
igneum-labs
b258094890 Counter ASIC 2.0: layer 6 option C and layer 7 R1 decided (delegated), the chip headline rule for the scratch share 2026-10-05 20:27:01 +00:00