igneum-labs
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6f337cb9b8
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Counter ASIC 3.0 gates (node): the node-cut compat gate (node-compat.mjs: a mining new node beside a 0.3.14 node on the live object, both joins, the served genesis sync, the restart; PASS on 7961c5f1, FAIL on the canary binary 713ef876), the ledger rows N1 (version 1026 on the live file) and N2 (the pruned node's sync panic, a remote crash vector), the P4 row
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-06 20:25:39 +00:00 |
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igneum-labs
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297dadb1ca
|
Counter ASIC 3.0 gates (node): the shipper's 0.3.15 readings in the P3 row (the three fixtures equal, the live floor's publish-2 digest 2c1162e2..., 0.3.14 exits at parse on the sixteen-field file, the box suite line)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-06 19:03:47 +00:00 |
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igneum-labs
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58fdfda87a
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Counter ASIC 3.0 gates (node): the 0.3.15 digest rule's compat and refusal cases on real nodes (digest-compat.mjs: a fixed node and a 0.3.14 node on the thirteen-field file peer on one digest; the sixteen-field node is refused), the P3 row, the sixteen-field digest 1dddfa55... on the devnet id
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-06 18:59:34 +00:00 |
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igneum-labs
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1cf76c0f8a
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Counter ASIC 3.0 gates (node): the rehearsal's miners are the GPU workers (the object inherits the devnet genesis bits); the id assertion on a worker box reads the pack's program.h
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-06 18:38:26 +00:00 |
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igneum-labs
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c5bfa14dc0
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Counter ASIC 3.0 gates (node): the digests re-read on the right network ids (the digest folds the network id in; the fleet's a15db4f0 on suffix 400 confirmed with the Mac binary of the same fork commit; the publish example 65a42ab2 on the devnet id); the 0.3.13 parse refusal as a cut-order fact
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-06 18:34:52 +00:00 |
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igneum-labs
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ea5e4588e2
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Counter ASIC 3.0 gates (node): the rehearsal re-cut for the hour (1 block/s: 600-DAA epochs, window 600, flip at minute 20, floor at minute 40; digest d23394e7...)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-06 18:18:04 +00:00 |
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igneum-labs
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6a57c69580
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Counter ASIC 3.0 gates (node): G6 on the signalling fork change GREEN (jobs build-20261006-173017, -174027, -174823: the 2.0 flake re-run alone, the five crates and the app, the relay upload fault noted)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 17:56:11 +00:00 |
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igneum-labs
|
f35cf492bf
|
Counter ASIC 3.0 gates (node): the signalling gate GREEN (two of three never flips, all three flips at the first full window, nobody flips at the floor; the failed case fails on eight checks), the four summaries, the preconditions rows
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 17:47:31 +00:00 |
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igneum-labs
|
2439d18c03
|
Counter ASIC 3.0 gates (node): the two cut preconditions: the fleet rehearsal plan (counter-asic-3-rehearsal.md, the publish and rehearsal override objects with their digests ac8e60ce... and bc2142b1...), the PROPOSED miner-signalled activation (node doc section 6), the fast-time signal gate class-v4-signal.mjs, the signal window in override-60x.json (120) and the README
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 17:27:50 +00:00 |
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igneum-labs
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5db68a99ec
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Counter ASIC 3.0 status: the two cut preconditions (staging rehearsal, miner-signalled activation) as gates; the line for the project lead re-worded, no date until 0.3.14 runs a clean day
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2026-10-06 16:47:12 +00:00 |
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igneum-labs
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52a3491af0
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Counter ASIC 3.0 status: the blocker closed (G4 re-run with the id assertion green), every gate green, the line for the project lead confirmed
|
2026-10-06 16:45:52 +00:00 |
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igneum-labs
|
f1938c3357
|
Merge branch 'ca3-v4-node' into ca3-coord
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2026-10-06 16:44:27 +00:00 |
|
igneum-labs
|
78634555f4
|
Counter ASIC 3.0 gates (node): the program id carries the class: G4 re-run GREEN with the id assertion (every v4 epoch's id = the CLI's class v4 id, differs from the same-seed v3 id; the assertion's failed case fails on that one check), the seven re-exported packs' Metal fingerprints equal the hash lane's table, G5 workers rebuilt from the fix
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:43:46 +00:00 |
|
igneum-labs
|
d022e5ef76
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Counter ASIC 3.0 status: the hash lane green on the id fix (4366418 merged)
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2026-10-06 16:40:09 +00:00 |
|
igneum-labs
|
551198d864
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Merge branch 'ca3-v4-hash' into ca3-coord
|
2026-10-06 16:39:24 +00:00 |
|
igneum-labs
|
43664184ed
|
Counter ASIC 3.0 gates (hash): follow-up 1 on the program-id fix (e05eb0c merged): crate suite 97 of 97, the seven v4 packs re-exported byte-identical (generator 4, id c120d7963abdcd96), fingerprints unchanged on Metal and Apple OpenCL, Mac G2 16 x 1,024 of 1,024 through the v4 class token, the harness 4 of 4 on the class and on the era with the id assert_ne holding; the job scripts take the class token from the pack
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:38:48 +00:00 |
|
igneum-labs
|
eef181124f
|
Counter ASIC 3.0 status: the program-id fix merged (e05eb0c), the re-runs open
|
2026-10-06 16:26:11 +00:00 |
|
igneum-labs
|
329d256202
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Counter ASIC 3.0 status: AMD G2 job ready (chain-seed packs, own kit)
|
2026-10-06 16:22:31 +00:00 |
|
igneum-labs
|
480c0518f6
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Counter ASIC 3.0 status: every gate green on the hash, the program-id blocker on the cut, the one line for the project lead
|
2026-10-06 16:18:08 +00:00 |
|
igneum-labs
|
e029091c3d
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Merge branch 'ca3-v4-node' into ca3-coord
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2026-10-06 16:16:21 +00:00 |
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igneum-labs
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3521d9a002
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Merge branch 'ca3-v4-hash' into ca3-coord
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2026-10-06 16:16:21 +00:00 |
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igneum-labs
|
d2237cc566
|
Counter ASIC 3.0 gates (hash): the RTX 5090 G1 and G2 JSON summaries
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:15:17 +00:00 |
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igneum-labs
|
85c267971c
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Counter ASIC 3.0 gates (hash): the RTX 5090 G1 and G2 evidence from the collected job.log (eight fingerprints equal to the Mac's, 8 x 1,024 of 1,024); hash-gates.md and the bench-log entry closed
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:14:08 +00:00 |
|
igneum-labs
|
ed53e96fd8
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Counter ASIC 3.0 gates (node): G6 row, the two crates whose lines the relay upload does not carry
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:10:30 +00:00 |
|
igneum-labs
|
f0b3355a7a
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Counter ASIC 3.0 gates (node): G4, G4b, G5 and G6 GREEN for class v4 (the three fast-time summaries incl. the known-failed case, node-gates.md, counter-asic-3-node.md)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:10:00 +00:00 |
|
igneum-labs
|
fa857683be
|
Counter ASIC 3.0 gates (hash): the gate directory (hash-gates.md, G1 Mac, G2 Mac, G3 and verifier JSON) and the bench-log entry; the RTX 5090 G1 rows pending the collected job.log
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:07:55 +00:00 |
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igneum-labs
|
179443499d
|
Counter ASIC 3.0 status: job 1 closed (G1 AMD green, the 9070 XT ladder flat to 330,700 ops, watts owed)
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2026-10-06 15:58:03 +00:00 |
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igneum-labs
|
e5e54a681f
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Counter ASIC 3.0 status: G1 AMD green on the candidate pack (interim, job 1 running)
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2026-10-06 15:52:47 +00:00 |
|
igneum-labs
|
2df45c43fb
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Counter ASIC 3.0 status: the Ember run 5 rows for the 5090 (the cap never binds, 0.41 MH per W flat)
|
2026-10-06 15:45:39 +00:00 |
|
igneum-labs
|
3c62a8a9c7
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Counter ASIC 3.0 status: the PC 1 AMD scripts ready (checks pass, kit verified)
|
2026-10-06 15:40:42 +00:00 |
|
igneum-labs
|
868c13b393
|
Counter ASIC 3.0 status: the gate run opened on mx8+sh256x27 (the project lead 16:50 UTC), the gate table
|
2026-10-06 15:38:44 +00:00 |
|
igneum-labs
|
0962364e03
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Counter ASIC 3.0 status: the PC 1 AMD job queue (prepared, not published)
|
2026-10-06 15:13:22 +00:00 |
|
igneum-labs
|
4bdf9af4c3
|
Counter ASIC 3.0 status: the close (items 6, 7 and 8 closed; the chip model before and after; the class v4 candidate mx8+sh256x27 ready for the gate run; nine decisions for the project lead; the owed list)
|
2026-10-06 08:48:18 +00:00 |
|
igneum-labs
|
f4478a8ee1
|
Merge branch 'ca3-reserve' into ca3-coord
|
2026-10-06 08:45:48 +00:00 |
|
igneum-labs
|
697b8833df
|
Counter ASIC 3.0 items 6 and 7: the RTX 5090 step-cost rows (PC 2 job run-ca3-family-pc2-20261006, every family bit-exact, mm8 included) in the bench-log and the reserve document
|
2026-10-06 08:45:02 +00:00 |
|
igneum-labs
|
aab9858068
|
Merge branch 'ca3-derive' into ca3-coord
# Conflicts:
# docs/bench-log.md
|
2026-10-06 08:31:10 +00:00 |
|
igneum-labs
|
c6e03662a6
|
Counter ASIC 3.0 item 2: the RTX 5090 rows from PC 2 (bit-exact on CUDA, +1.1 s NVRTC per pack, the card-off key finding)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 08:30:15 +00:00 |
|
igneum-labs
|
881ae59779
|
Counter ASIC 3.0 status: the detector's two calibration findings answered (ba4a995 merged; max r 0.10)
|
2026-10-06 08:29:28 +00:00 |
|
igneum-labs
|
5b0b08e17f
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Counter ASIC 3.0 status: PC 2 clear, the detector and vendor-share dry rows on the live tables, the restart constraint
|
2026-10-06 08:26:52 +00:00 |
|
igneum-labs
|
cb75491b31
|
Counter ASIC 3.0 status: the marker guard exists in CI already
|
2026-10-06 08:25:02 +00:00 |
|
igneum-labs
|
7c53b0545a
|
Counter ASIC 3.0 status: items 6 and 7 merged (5090 rows queued), the marker slip recorded
|
2026-10-06 08:24:50 +00:00 |
|
igneum-labs
|
e3ee3049bd
|
Merge branch 'ca3-reserve' into ca3-coord
# Conflicts:
# docs/bench-log.md
# tools/observer/observer.mjs
|
2026-10-06 08:24:29 +00:00 |
|
igneum-labs
|
3959d66e55
|
Merge ca3-shadow (item 8's Mac rows) into ca3-coord: LoadClass carries derive_len and shadow; igneum-pow suite 96 passed
|
2026-10-06 08:11:03 +00:00 |
|
igneum-labs
|
3e77f1adf5
|
Counter ASIC 3.0 status: the 5090 draws about 290 W at the hash, cap floor 400 W, clocks are the lever (item 8's job)
|
2026-10-06 07:59:42 +00:00 |
|
igneum-labs
|
1538c78141
|
Counter ASIC 3.0 status: item 2's verifier headroom table and the crate suite
|
2026-10-06 07:51:42 +00:00 |
|
igneum-labs
|
36202759eb
|
Merge branch 'ca3-derive' into ca3-coord
|
2026-10-06 07:51:42 +00:00 |
|
igneum-labs
|
dd08267df3
|
Counter ASIC 3.0 status: PC 2 clear about 08:35Z, the job order
|
2026-10-06 07:51:36 +00:00 |
|
igneum-labs
|
f2e79316fe
|
Counter ASIC 3.0 status: item 2 interim (GO as reserve, NO-GO genesis-live at dr736), PC 2 clear about 08:35Z
|
2026-10-06 07:51:15 +00:00 |
|
igneum-labs
|
5c2131c18e
|
Counter ASIC 3.0 item 2: the verifier headroom per class under the 10 ms gate (the budget item 8 shares)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 07:51:13 +00:00 |
|
igneum-labs
|
1c08438a12
|
Merge branch 'ca3-derive' into ca3-coord
# Conflicts:
# docs/analysis/chip-model-v3.md
|
2026-10-06 07:51:00 +00:00 |
|