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igneum-labs
5ae7e2c5a5 spec 01 1.4.7.6: the class v5 constants table (one row per igneum-pow pub const, for the spec-constants check); igneum-pow: the listed-programs (c''') reading as an ignored test (IGNEUM_V5_PROGRAMS file: epoch, era, attempt per line) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:21:24 +00:00
igneum-labs
c17ce3b287 spec 01: class v5 as 1.4.7 (the class, generator 5, (c''') with the census numbers, the verified last resort, the two draw rules, the activation object and signal, the test vectors) and 1.8.6 (the state leaves: stream, derivation, sample, leaf line, refresh, witness, cost) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:17:32 +00:00
igneum-labs
3109cb6bb6 fud ledger AP-F8-3: the unchecked last-resort program (adv-accept-3's finding), sub-version 3's recorded unreachable and unverified, class v5's verified at 19c60cf9 with the known-failed test; ledger page regenerated 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:11:19 +00:00
igneum-labs
9f67420a6a Merge remote-tracking branch 'build/v5-kits' into class-v5 
# Conflicts:
#	docs/design/class-v5-stored-state.md
 2026-10-07 22:09:37 +00:00
igneum-labs
5bfa9b45c4 class v5 design page: F8 on the freeze PASS with the known residue (the attack-pass lane's reading), F9/F1/F4 pending 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:06:37 +00:00
igneum-labs
e4a59a42ae class v5 design page: section 14's running total (adv-accept's seed 122960 refused; eight of eight live hot sets under the floor) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:42:03 +00:00
igneum-labs
4227a9c4f6 class v5 design page: the class-walk harness case's two readings (FAIL on the unfixed fork, PASS on the node lane's pair 4), the logs under the harness dir 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:10:55 +00:00
igneum-labs
19c60cf9a8 class v5 design page: the two known-failed readings of the post-freeze commit (day 29,337 at cost 203; adv3/steer/2 at instruction 47) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:02:27 +00:00
igneum-labs
0a5abe0634 class v5 harness: the class-walk case under the v5 object (v4 floor 0, v3 never: every epoch before the flip is class 4), a fork-binary override for the node lane's pair build; the page carries the node lane's branch list and the decide() fix 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:55:51 +00:00
igneum-labs
ea3a76e4c4 class v5: AP-F4-1 in the agreed form (adder cost at most 205 against the median 226, w32 without the position-32 digit, a two-adder multiplier or one rotation amount rejected; known-failed first on chain day 29,337) and the verified last resort (part (a) repaired by re-sourcing stale loads, then the whole rule over a 256-candidate scan; known-failed first on adv-accept-3's adv3/steer/2) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:55:03 +00:00
igneum-labs
dba17a0a4f class v5 FREEZE: the suite's green and the gate on the record (section 0), the shadow rule's measured trigger reading, the next commit named 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:53:07 +00:00
igneum-labs
7965f5bafa class v5 design page: section 14's final total from adv-accept (seven of seven live hot sets refused; the three mild concentrations at about 1.0004x) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:49:23 +00:00
igneum-labs
1fabc0842a class v5 design page: section 14's running total (adv-accept's seed 1738 refused; six of six live hot sets under the floor) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:39:15 +00:00
igneum-labs
03c3f88046 class v5 design page: section 14's record sentence is the defender's ruling (the hot-set half closed, the residual named with prevalence, gain and lever) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:38:42 +00:00
igneum-labs
7eb3ad69ce class v5 design page: section 14 carries the five programs' ratios and the record's sentence (the floor closes the class on every measured hot set by X_f >= f and misses the shadow-block-write residual, named with its instrument and bound); the residual as a gap row 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:38:29 +00:00
igneum-labs
0d5570e299 class v5 (c'''): the census number in the record (4,600 f8 seeds: 2.435 percent of sub-version 3 accepted programs under 0.995, attempts mean 2.174 to 2.248, 0 class v5 programs under the floor; 0.99 would pass the exemplar), the flip-stale PASS on the matched binaries 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:04:35 +00:00
igneum-labs
658f6b9195 class v5 design page: section 14 carries adv-accept's multiplicity reading at the acceptance sample 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:40:48 +00:00
igneum-labs
78714e59d5 class v5 design page: section 14 carries adv-accept's class v5 check of the exemplar (the hot set does not move under the state dataset) and the known-failed test's reading 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:39:16 +00:00
igneum-labs
d0939373b0 class v5 design page: section 14 (the acceptance rule's class v5 part on the residual hot-set class, the two fixes, the floor taken), the witness row done, the class-walk exception, the harness skew and override-field rows 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:07:32 +00:00
igneum-labs
ec1a751eea class v5 page, section 13: the CUDA row read from the kit on a fleet RTX 4090 (82b19cbde8557ea5 at 18:57:45Z and 18:57:50Z, 62.759 MH/s), the 5090 row left to the fleet when one frees 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:00:02 +00:00
igneum-labs
ac07fb8357 class v5 kits: the Intel row stated as not measured tonight (no B580 on PC 1 or PC 2, the Arc path needs a driver click no PC job may raise; the holder and a click-free path owed) in the kit README text and section 13 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:48:01 +00:00
igneum-labs
381a5745ab class v5 page, section 13: the kit rows closed by branch v5-kits (every host uploads the leaves; Metal and Apple OpenCL read 82b19cbde8557ea5 at 18:34Z under the measure lock; the kit zip packs-ca3-v5-20261007T183921Z sha256 e6c088bb...; the NVIDIA, AMD and Intel runs asked of their lanes) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:42:47 +00:00
igneum-labs
c569ed0783 class v5 harness: the accepted-after parser reads the miner's epoch-second line clock (it matched HH:MM:SS and counted nothing: the v5-fasttime lane's finding, 20:3x UK), with its own known-finished check (the honest miners must show accepted lines after the flip); the page's PASS rows say which two counts were parse misses and what they rest on until the re-run 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:38:42 +00:00
igneum-labs
3c7384c96f class v5 design page: section 13's wire row done by the node lane (class-v5-node-wire 7737ebd9, version 1 with the last-field fallback, 43 exec tests), the witness row in progress 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:34:55 +00:00
igneum-labs
db2f9e0f23 Merge remote-tracking branch 'build/master' into class-v5 2026-10-07 18:33:18 +00:00
igneum-labs
310e61b151 class v5 design page: the M5 Max rows (class v5 +0.23 ms per warp over class v4 on one core, interleaved three times under the measure lock, both a quarter of the 10 ms gate); the time line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:33:17 +00:00
igneum-labs
6fdd357434 Merge remote-tracking branch 'build/master' into v5-kits 2026-10-07 18:32:41 +00:00
igneum-labs
060eeb0df3 Merge build-server deae3803 into master on the box mirror (GitHub suspended since 18:02 BST; the box gate stamp stands in for CI; main's rule of 18:1x BST) 2026-10-07 18:23:34 +00:00
igneum-labs
deae3803ab Build boxes to near max (the project lead, 7 Oct 2026 19:4x BST): the bounded class is 88 of 96 cores with -j 88 (8 reserved for release builds, the seed and the observers), the jobs rule 88 alone / 44 shared, the spill line 80; checks updated. testnet-go.md: LG-2 waived by the owner, the new gate, the seeds held armed 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:23:14 +00:00
igneum-labs
bebb714dfa Merge ship-docs-0321 0b9a4da5 into master (gate: green on 0b9a4da5, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 18:21:29 +00:00
igneum-labs
0b9a4da58e release 0.3.22 section 7: the project lead moves the apps to Devnet 3 tonight (the clock), the pin 34a2dbaa with no heights and why, the app tree at 19:15 BST, PC 2's evening and the rules it added 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:17:15 +00:00
igneum-labs
3efd339786 class v5: the first class v5 pack, Devnet 3's epoch 0 (genesis 4020cb43... as epoch and era seed, day 20,733, the genesis state's 11 leaves under root 7e37a9fb...), generator 5, program id e5a4ac5978462156, exported on igneum-build-1 at 18:06:41Z; its Metal fingerprint 82b19cbde8557ea5 on the M5 Max at 18:07:09Z (vectors 3 of 3, cache and dataset PASS); the page's time line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:07:55 +00:00
igneum-labs
a6ac9f6d0a Merge build/master into ca3-coord (release-0.3.21.md keeps both sides); Counter ASIC 3.0 status: Devnet 3's proof window, the utilisation table, the bench table, the v5 gap list, the in-house pass, the PC 1 queue 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:05:34 +00:00
igneum-labs
3204af92dc class v5: the design-to-code gap as section 13 (every item without code, test or measurement, with owner and hours: about 40 agent hours, 17 this lane's); the Metal pack bench takes a class v5 pack's leaves.bin (buffers 2 and 3 on igneum_build, the pack's FNV checked first) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:58:17 +00:00
igneum-labs
fb7fbc9c27 Counter ASIC 3.0 status: the Devnet 3 epoch-0 pack, the project lead's three orders and the in-house correction (class v5 now, the internal adversarial pass, the PC 1 measurements) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:54:43 +00:00
igneum-labs
2911b1ce06 Site and evidence: the chip model's next test is the internal adversarial pass (three lanes new to the hash code, outsider inputs only, reports published whole), not external lots; the one outside check staged on its escrow and the publish word (the project lead's correction, 7 October 2026) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:54:43 +00:00
igneum-labs
8fbcd43520 Merge remote-tracking branch 'build/ca3-v4-amend' into class-v5 
# Conflicts:
#	igneum-pow/src/generator.rs
 2026-10-07 17:53:53 +00:00
igneum-labs
6e64565ad3 class v5: the harness records of the bytes-6 flip run (12:17 to 12:21Z) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:52:54 +00:00
igneum-labs
4ecb11d783 release 0.3.22: proving on Devnet 3 opens (first segment submitted 18:45 BST, the sizing), the 0.3.21 warm cases end and why the relay cell reads on Devnet 3 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:52:42 +00:00
igneum-labs
91b3fb81d5 release 0.3.21 section 7: the Mac entry LIVE 18:41:50 BST, Windows as its own entry, the parallel installer shapes, the testnet 6ed56f63 line, the 0.3.22 pin candidate 34a2dbaa, the signing bonus paragraph 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:42:54 +00:00
igneum-labs
f502ba52ce release 0.3.22 section 6: DN3 GATE PASS, the two clocks, the tree order (a) to (f) with main's floor-file ruling, the project lead's nine-switch ruling and main's height mechanics, the testnet re-arm, the 0.3.21 Windows toolchain finding 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:40:37 +00:00
igneum-labs
74d9c72e74 release plans: 0.3.21 ships as the app tree over c4459193 (section 6, the GitHub exception window from 18:02 BST, the Windows path without windows.yml, the DMG 490919d9); 0.3.22 section 5 the Devnet 3 genesis on 69d1b56e at 18:06:19 BST (gates, pairs, the program id correction, the seed left off the sweep); rule 5 names the seeds in the wave list with a read-back line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:25:23 +00:00
igneum-labs
a126800f5d Counter ASIC 3.0 status: Devnet 3's pair agrees since 17:18Z (702 blocks, 0 rejected; first lock about 19:10Z on the 7,200-DAA window); the no-GitHub rule 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:20:43 +00:00
igneum-labs
27d7d01660 Counter ASIC 3.0 status: Devnet 3's epoch-0 program id fce15bf61030be57 (the id follows the seed; the pairing pin unchanged) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:12:25 +00:00
igneum-labs
828313b4c3 Counter ASIC 3.0 status: GitHub suspended (the mirror is the record), Devnet 3 mines on 69d1b56e from 17:06:19Z, the Hetzner seed still on the old object 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:09:33 +00:00
igneum-labs
2109d0b6da Counter ASIC 3.0 status: the 0.3.22 kaspa-pow suite green, master green on the pow fix, the chip texts live (incl. /claims), Devnet 3's first go refused on the genesis timestamp (8 Oct 00:00Z) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:03:06 +00:00
igneum-labs
4633d2ab84 Counter ASIC 3.0 status: the pow stop-the-line executed (ca3-v4-amend on master as 3325ed43, igneum-pow byte-identical to c79f6d96) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:48:07 +00:00
igneum-labs
3325ed4334 Merge ca3-v4-amend e80978ad into master (gate: green on e80978ad, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 16:45:48 +00:00
igneum-labs
26433223eb Merge site-ui-5 5b43a6a2 into master (gate: green on 5b43a6a2, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 16:45:01 +00:00
igneum-labs
e80978adc1 Merge origin/master 0caa3cc5 into ca3-v4-amend (igneum-pow kept byte-identical to the frozen c79f6d96 per main's stop-the-line ruling; the ledger keeps both sides) 2026-10-07 16:40:29 +00:00