Commit graph

1210 commits

Author SHA1 Message Date
igneum-labs
52ea3f8bcd adv-cache-3: ledger records the 20:20 BST kill and the lease re-queue
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 19:21:58 +00:00
igneum-labs
0156c2345c adv-cache-3: report skeleton with the first skip row (internal adversarial pass, not an independent review)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 19:18:07 +00:00
igneum-labs
fa61c67060 adv-cache-3: attack plan for the chain break or skip (internal adversarial pass, not an independent review)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 18:49:24 +00:00
igneum-labs
5e41217735 Merge build-server 65fdd39d into master on the box mirror (GitHub suspended since 18:02 BST; the box gate stamp stands in for CI; main's rule of 18:1x BST) 2026-10-07 18:23:34 +00:00
igneum-labs
65fdd39d5b Build boxes to near max (the project lead, 7 Oct 2026 19:4x BST): the bounded class is 88 of 96 cores with -j 88 (8 reserved for release builds, the seed and the observers), the jobs rule 88 alone / 44 shared, the spill line 80; checks updated. testnet-go.md: LG-2 waived by the owner, the new gate, the seeds held armed
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 18:23:14 +00:00
igneum-labs
d21ca54a24 Merge ship-docs-0321 9ee93d78 into master (gate: green on 9ee93d78, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 18:21:29 +00:00
igneum-labs
9ee93d782a release 0.3.22 section 7: the project lead moves the apps to Devnet 3 tonight (the clock), the pin 34a2dbaa with no heights and why, the app tree at 19:15 BST, PC 2's evening and the rules it added
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 18:17:15 +00:00
igneum-labs
5114936edf Merge build/master into ca3-coord (release-0.3.21.md keeps both sides); Counter ASIC 3.0 status: Devnet 3's proof window, the utilisation table, the bench table, the v5 gap list, the in-house pass, the PC 1 queue
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 18:05:34 +00:00
igneum-labs
b35bf8f16f Counter ASIC 3.0 status: the Devnet 3 epoch-0 pack, the project lead's three orders and the in-house correction (class v5 now, the internal adversarial pass, the PC 1 measurements)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:54:43 +00:00
igneum-labs
f88783d09f Site and evidence: the chip model's next test is the internal adversarial pass (three lanes new to the hash code, outsider inputs only, reports published whole), not external lots; the one outside check staged on its escrow and the publish word (the project lead's correction, 7 October 2026)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:54:43 +00:00
igneum-labs
1a4ed8bb86 release 0.3.22: proving on Devnet 3 opens (first segment submitted 18:45 BST, the sizing), the 0.3.21 warm cases end and why the relay cell reads on Devnet 3
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:52:42 +00:00
igneum-labs
66190129a7 release 0.3.21 section 7: the Mac entry LIVE 18:41:50 BST, Windows as its own entry, the parallel installer shapes, the testnet 6ed56f63 line, the 0.3.22 pin candidate 34a2dbaa, the signing bonus paragraph
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:42:54 +00:00
igneum-labs
cfce2014fa release 0.3.22 section 6: DN3 GATE PASS, the two clocks, the tree order (a) to (f) with main's floor-file ruling, the project lead's nine-switch ruling and main's height mechanics, the testnet re-arm, the 0.3.21 Windows toolchain finding
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:40:37 +00:00
igneum-labs
31ca83daa1 release plans: 0.3.21 ships as the app tree over c4459193 (section 6, the GitHub exception window from 18:02 BST, the Windows path without windows.yml, the DMG 490919d9); 0.3.22 section 5 the Devnet 3 genesis on 69d1b56e at 18:06:19 BST (gates, pairs, the program id correction, the seed left off the sweep); rule 5 names the seeds in the wave list with a read-back line
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:25:23 +00:00
igneum-labs
ec3d55723c Counter ASIC 3.0 status: Devnet 3's pair agrees since 17:18Z (702 blocks, 0 rejected; first lock about 19:10Z on the 7,200-DAA window); the no-GitHub rule
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:20:43 +00:00
igneum-labs
e68b416f4b Counter ASIC 3.0 status: Devnet 3's epoch-0 program id fce15bf61030be57 (the id follows the seed; the pairing pin unchanged)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:12:25 +00:00
igneum-labs
7d9a81d8fb Counter ASIC 3.0 status: GitHub suspended (the mirror is the record), Devnet 3 mines on 69d1b56e from 17:06:19Z, the Hetzner seed still on the old object
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:09:33 +00:00
igneum-labs
4a2b7565e9 Counter ASIC 3.0 status: the 0.3.22 kaspa-pow suite green, master green on the pow fix, the chip texts live (incl. /claims), Devnet 3's first go refused on the genesis timestamp (8 Oct 00:00Z)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 17:03:06 +00:00
igneum-labs
0596574aa8 Counter ASIC 3.0 status: the pow stop-the-line executed (ca3-v4-amend on master as 2b9d50cc, igneum-pow byte-identical to c3d32437)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:48:07 +00:00
igneum-labs
2b9d50cc72 Merge ca3-v4-amend 6bb52c50 into master (gate: green on 6bb52c50, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 16:45:48 +00:00
igneum-labs
d960dc5cef Merge site-ui-5 70ddf80d into master (gate: green on 70ddf80d, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 16:45:01 +00:00
igneum-labs
6bb52c5007 Merge origin/master 90501503 into ca3-v4-amend (igneum-pow kept byte-identical to the frozen c3d32437 per main's stop-the-line ruling; the ledger keeps both sides) 2026-10-07 16:40:29 +00:00
igneum-labs
9b411c7ed8 Counter ASIC 3.0 status: the 0.3.22 re-pin staged (bd710a36, candidate fa7f854f, byte 7 from genesis)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:39:34 +00:00
igneum-labs
742ce2be53 Counter ASIC 3.0 status: the stop-the-line on master's pow suite (era-vdf's 61421005 against the pins), the hash lane's merge of 4f2f6097 ordered, the condition verified
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:39:05 +00:00
igneum-labs
4a5759e188 Merge remote-tracking branch 'origin/master' into site-ui-5 2026-10-07 16:37:57 +00:00
igneum-labs
5f9f9a4bbf site-ui-5: the capture set after the padding sweep and the launch-first chip text (every route at 390 and 1440 dark, the three bands, the full wallet page)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:37:57 +00:00
igneum-labs
e73fea9d8b site: the chip claim launch-first in the four public places (Counter ASIC lane, docs/plans/counter-asic-3-public-text-2026-10-07.md sections 1 to 4, on the project lead's "I thought we were making it 2.1 from launch?")
Home row 03, the litepaper's chip section at /litepaper#chip-model (paragraph and table; the class v3 row last, "never the launch
state"), the miner page's line and evidence.md row 17 in its eight columns: 2.1x to 3.9x under class v4 from the first block,
class v5 removing the stored-dataset chip as a category, the 5x to 9x only as the class v3 baseline, the devnet's activation
height as a devnet fact. The litepaper's abstract carried the same claim in the old form ("5x to 9x today; class v4, now on
the vote") and now reads launch-first too. tools/ci/ledger-text-check.mjs follows the sentences (X35 on the home page and the
litepaper). No disclosure prize anywhere.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:34:12 +00:00
igneum-labs
c12b6012e4 Counter ASIC 3.0 status: Devnet 3 now (0.3.22, genesis by 17:30Z), the frozen sub-version 3 handoff (c3d32437, byte 7, id a785001687d8688a, gates green, open items stated), the chip text rewritten launch-first
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:32:40 +00:00
igneum-labs
2f53150c5a The chip claim, public text: rewritten launch-first (2.1x to 3.9x under class v4 from genesis; class v5; the 5x to 9x only as the class v3 baseline; the devnet's height a devnet fact) on the project lead's word
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:25:18 +00:00
igneum-labs
f127ce5198 Counter ASIC 3.0 status: the four-seed tail ruled accepted (AP-F8-1 closes), 0.3.21's first candidate passes the node gates; the lane stops for tonight
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:17:54 +00:00
igneum-labs
ed1d2ed885 Counter ASIC 3.0 status: the 0.3.20 record (publish 14:54:17Z, floor 900,000, digest 4bbbe816, sweep complete 15:39Z, earliest flip about 14 Oct 23:00Z); sub-version 3 at c3d32437 passes both gates with the named tail, the frozen generator for 0.3.22
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:11:02 +00:00
igneum-labs
4f2f60975b Counter ASIC 3.0 gates (hash): ledger AP-F8-1, F8's 64-seed gate and exhaustion count on c3d32437 (60 of 64, the four over = the named tail; 0 exhausted of 24,631), the node's draw-cost line
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:03:13 +00:00
igneum-labs
8d22c8f8ff Counter ASIC 3.0 status: release-0.3.21-node staged at 96161037 (byte 5, no re-pin), the set green, the floor file's digest 4bbbe816
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 16:01:00 +00:00
igneum-labs
8617bd4585 release plans on master: 0.3.20 live and swept (sections 38 and 39), the rules file with 4c and 14, the 0.3.21 plan as staged
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 15:41:42 +00:00
igneum-labs
6e638cf6ef Merge era-vdf 61421005 into master (gate: green on 61421005, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:31:24 +00:00
igneum-labs
84e6c82fb4 Counter ASIC 3.0 status: the hash lane's 78b7915e on origin, CI success; nothing in flight on the hash side
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 15:25:27 +00:00
igneum-labs
9f543aa970 Era VDF lane (7 October 2026): spec 04 sections 4.2, 4.4, 4.5 and 4.6 completed for the era path (the scheme byte and the hash-chain fallback, the cut rule under the O-4.3 reading, the day-of-blues input, the delay, the seed, the era constants as measured), spec 01 section 1.13.1 and era-layout.md section 8 updated, open items O-4.8 closed and O-4.10 to O-4.12 added, FUD ledger F11 updated, two decisions for the project lead in ledger-decisions.md, the record docs/analysis/era-vdf-2026-10-07.md (what was built, the parameters and measured rates, the harness gate with both runs, the cut rule for the finality lane, the verify gate, the tiers), the F7 re-roll harness against the real era cut (tools/era-vdf/reroll.mjs: --vdf off fires 6 of 6, --vdf on silent 0 of 6; the adversary evaluates asynchronously with the node's own code and is found by the node's own log line), the fast-time file's era fields 2026-10-07 15:24:22 +00:00
igneum-labs
4b4e1bc12f Merge master-pin-0320 b9b37480 into master (gate: green on b9b37480, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:20:54 +00:00
igneum-labs
16403d488d Merge ca3-coord c724ed86 into master (gate: green on c724ed86, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:18:58 +00:00
igneum-labs
4402e51e45 Merge bench-5060ti 8c019aa2 into master (gate: green on 8c019aa2, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:17:18 +00:00
igneum-labs
c724ed8632 Counter ASIC 3.0 status: the census at c3d32437 (0 lossy sites, 0 exhaustions, mean 2.086 attempts), CI success, the class check moving 2.0 percent of attempts
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 15:15:23 +00:00
igneum-labs
b9b37480a4 master re-pinned to the published 0.3.20 node (c4459193): packaging/windows/node-source.pin against the live payload-inputs.json, so windows-ci's payload inputs step reads green; release rule 14, master re-pinned at every publish
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 15:13:10 +00:00
igneum-labs
78b7915e6e Counter ASIC 3.0 gates (hash): ledger AP-F8-1, the suite (103 of 103), CI and census lines at c3d32437; the census draws in parallel
Suite at c3d32437 on box 2: 103 passed, 0 failed (lib 140.8 s: every class v4 draw in the tests pays the 2^20 ratio pass). CI 37639406567 success. Census: 4,099 programs, 0 lossy sites of 65,584, 0 exhaustions, mean attempt 2.086 (af1b7c46 1.998), max 17; the ratio refuses about 4 percent of candidates that pass every other test. tools/ca3-v4-uniform draws the seeds across the available cores (the serial run became a four-hour job under the ratio pass); the analysis and the row order are unchanged.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 15:10:13 +00:00
igneum-labs
8c019aa259 RTX 5060 Ti (16 GB, Razer Core X V2 Thunderbolt) on PC 2: detection, G1 bit-exact on class v4 sub-version 1 and the v3 control, the 10-minute stock window, the bench-log entry, the card-picker entry and the public table row
The first 16 GB card and the first Thunderbolt card. The app's first poll listed it (vendor nvidia, 16,311 MiB,
driver 610.47 shared with the 5090, kind discrete: the app does not know it is an eGPU) and started a miner on
it by itself. Job run-5060ti-bench-20261007-b (tools/bench-5060ti/pc2-5060ti-bench.ps1, the card alone under
the runner's --cards-off, the 5090 mining, no power limit written: 180 W default read back unchanged, PC 2 lost
power twice that day): G1 PASS with 867dbc45cfb36b4d (sub-version 1) and 90f794dd556f7a3b equal to the Mac's;
the window 1,105 dispatches of 2^24 in 602 s at 30.882 MH/s, 114.8 W mean at utilisation 90 percent and over,
0.269 MH/W, PCIe 4.0 x4 through the enclosure (the hash is latency-bound, the link costs nothing measurable).
Owed: the efficient point (the app's Ember Tune; PC 2's Power Helper refuses every request since the restart)
and the prove-beside read (the shipped WSL2 host has no IGNEUM_CUDA_DEVICE selector; the floor server is on
PC 2; the prover-floor host is the cut). The kit (tools/bench-5060ti/make-kit.sh) takes the sub-version 1 packs
from ca3-v4-amend 0a62293a, since master's packs-ca3-v4 is the 6 October stream.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 15:05:47 +00:00
igneum-labs
3a6ab26e98 Merge site-ui-5 40ea28ae into master (gate: green on 40ea28ae, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:02:23 +00:00
igneum-labs
40ea28aea0 site-ui-5: /live's table-row click handler kept its opener (the Mark-my-key removal had taken the line that opened it; every inline script parses again)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 14:58:51 +00:00
igneum-labs
533e9c8e07 site-ui-5: captures after the phone-menu, pending-fold, dark-gallery and no-you fixes (home, miner, wallet, live, app, download at 390 and 1440 dark; the open sheet at 390; the pending home at 375)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 14:52:15 +00:00
igneum-labs
61496c4029 Counter ASIC 3.0 status: the suite at c3d32437 (103 of 103; the lib tests' 2^20 cost on CI time)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-07 14:51:30 +00:00
igneum-labs
a5ab07665a Merge ca3-coord 2c7c9f76 into master (gate: green on 2c7c9f76, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 14:50:54 +00:00
igneum-labs
38fd2c4cf8 Merge mf11-master 847211c7 into master (gate: green on 847211c7, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 14:49:42 +00:00