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igneum-labs
3e4fa7cab8 Merge remote-tracking branch 'build/v5-kits' into class-v5 
# Conflicts:
#	docs/design/class-v5-stored-state.md
 2026-10-07 22:09:37 +00:00
igneum-labs
a072decb4d class v5 design page: F8 on the freeze PASS with the known residue (the attack-pass lane's reading), F9/F1/F4 pending 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 22:06:37 +00:00
igneum-labs
87c5bef776 class v5 design page: section 14's running total (adv-accept's seed 122960 refused; eight of eight live hot sets under the floor) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:42:03 +00:00
igneum-labs
65f97a1ad5 class v5 design page: the class-walk harness case's two readings (FAIL on the unfixed fork, PASS on the node lane's pair 4), the logs under the harness dir 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:10:55 +00:00
igneum-labs
2c77a6bfff class v5 design page: the two known-failed readings of the post-freeze commit (day 29,337 at cost 203; adv3/steer/2 at instruction 47) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 21:02:27 +00:00
igneum-labs
b4433f7eaa class v5 harness: the class-walk case under the v5 object (v4 floor 0, v3 never: every epoch before the flip is class 4), a fork-binary override for the node lane's pair build; the page carries the node lane's branch list and the decide() fix 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:55:51 +00:00
igneum-labs
51a21ab3b1 class v5: AP-F4-1 in the agreed form (adder cost at most 205 against the median 226, w32 without the position-32 digit, a two-adder multiplier or one rotation amount rejected; known-failed first on chain day 29,337) and the verified last resort (part (a) repaired by re-sourcing stale loads, then the whole rule over a 256-candidate scan; known-failed first on adv-accept-3's adv3/steer/2) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:55:03 +00:00
igneum-labs
f2267bb621 class v5 FREEZE: the suite's green and the gate on the record (section 0), the shadow rule's measured trigger reading, the next commit named 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:53:07 +00:00
igneum-labs
32258dd9b5 class v5 design page: section 14's final total from adv-accept (seven of seven live hot sets refused; the three mild concentrations at about 1.0004x) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:49:23 +00:00
igneum-labs
65fa7067fa class v5 design page: section 14's running total (adv-accept's seed 1738 refused; six of six live hot sets under the floor) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:39:15 +00:00
igneum-labs
f9fb7d7044 class v5 design page: section 14's record sentence is the defender's ruling (the hot-set half closed, the residual named with prevalence, gain and lever) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:38:42 +00:00
igneum-labs
e0e7bd6870 class v5 design page: section 14 carries the five programs' ratios and the record's sentence (the floor closes the class on every measured hot set by X_f >= f and misses the shadow-block-write residual, named with its instrument and bound); the residual as a gap row 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:38:29 +00:00
igneum-labs
7a9cecc3b1 class v5 (c'''): the census number in the record (4,600 f8 seeds: 2.435 percent of sub-version 3 accepted programs under 0.995, attempts mean 2.174 to 2.248, 0 class v5 programs under the floor; 0.99 would pass the exemplar), the flip-stale PASS on the matched binaries 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 20:04:35 +00:00
igneum-labs
dd8f75437c class v5 design page: section 14 carries adv-accept's multiplicity reading at the acceptance sample 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:40:48 +00:00
igneum-labs
d0e9f62e5e class v5 design page: section 14 carries adv-accept's class v5 check of the exemplar (the hot set does not move under the state dataset) and the known-failed test's reading 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:39:16 +00:00
igneum-labs
58fccaa7e2 class v5 design page: section 14 (the acceptance rule's class v5 part on the residual hot-set class, the two fixes, the floor taken), the witness row done, the class-walk exception, the harness skew and override-field rows 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:07:32 +00:00
igneum-labs
6bee0980a5 class v5 page, section 13: the CUDA row read from the kit on a fleet RTX 4090 (82b19cbde8557ea5 at 18:57:45Z and 18:57:50Z, 62.759 MH/s), the 5090 row left to the fleet when one frees 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:00:02 +00:00
igneum-labs
29524d8998 class v5 kits: the Intel row stated as not measured tonight (no B580 on PC 1 or PC 2, the Arc path needs a driver click no PC job may raise; the holder and a click-free path owed) in the kit README text and section 13 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:48:01 +00:00
igneum-labs
e4dce45a9e class v5 page, section 13: the kit rows closed by branch v5-kits (every host uploads the leaves; Metal and Apple OpenCL read 82b19cbde8557ea5 at 18:34Z under the measure lock; the kit zip packs-ca3-v5-20261007T183921Z sha256 e6c088bb...; the NVIDIA, AMD and Intel runs asked of their lanes) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:42:47 +00:00
igneum-labs
a49dabad59 class v5 harness: the accepted-after parser reads the miner's epoch-second line clock (it matched HH:MM:SS and counted nothing: the v5-fasttime lane's finding, 20:3x UK), with its own known-finished check (the honest miners must show accepted lines after the flip); the page's PASS rows say which two counts were parse misses and what they rest on until the re-run 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:38:42 +00:00
igneum-labs
3994ed9097 class v5 design page: section 13's wire row done by the node lane (class-v5-node-wire 7737ebd9, version 1 with the last-field fallback, 43 exec tests), the witness row in progress 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:34:55 +00:00
igneum-labs
ed5cabcfa0 Merge remote-tracking branch 'build/master' into class-v5 2026-10-07 18:33:18 +00:00
igneum-labs
0ca66b114d class v5 design page: the M5 Max rows (class v5 +0.23 ms per warp over class v4 on one core, interleaved three times under the measure lock, both a quarter of the 10 ms gate); the time line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:33:17 +00:00
igneum-labs
056d1589e5 Merge remote-tracking branch 'build/master' into v5-kits 2026-10-07 18:32:41 +00:00
igneum-labs
63f4437f71 Merge build-server a8587452 into master on the box mirror (GitHub suspended since 18:02 BST; the box gate stamp stands in for CI; main's rule of 18:1x BST) 2026-10-07 18:23:34 +00:00
igneum-labs
a85874524f Build boxes to near max (the project lead, 7 Oct 2026 19:4x BST): the bounded class is 88 of 96 cores with -j 88 (8 reserved for release builds, the seed and the observers), the jobs rule 88 alone / 44 shared, the spill line 80; checks updated. testnet-go.md: LG-2 waived by the owner, the new gate, the seeds held armed 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:23:14 +00:00
igneum-labs
2cd6b2fade Merge ship-docs-0321 d646849f into master (gate: green on d646849f, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 18:21:29 +00:00
igneum-labs
d646849ffd release 0.3.22 section 7: the project lead moves the apps to Devnet 3 tonight (the clock), the pin 34a2dbaa with no heights and why, the app tree at 19:15 BST, PC 2's evening and the rules it added 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:17:15 +00:00
igneum-labs
956af151a6 class v5: the first class v5 pack, Devnet 3's epoch 0 (genesis 4020cb43... as epoch and era seed, day 20,733, the genesis state's 11 leaves under root 7e37a9fb...), generator 5, program id e5a4ac5978462156, exported on igneum-build-1 at 18:06:41Z; its Metal fingerprint 82b19cbde8557ea5 on the M5 Max at 18:07:09Z (vectors 3 of 3, cache and dataset PASS); the page's time line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:07:55 +00:00
igneum-labs
7fa7d22bb6 Merge build/master into ca3-coord (release-0.3.21.md keeps both sides); Counter ASIC 3.0 status: Devnet 3's proof window, the utilisation table, the bench table, the v5 gap list, the in-house pass, the PC 1 queue 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:05:34 +00:00
igneum-labs
eeaf55b5bb class v5: the design-to-code gap as section 13 (every item without code, test or measurement, with owner and hours: about 40 agent hours, 17 this lane's); the Metal pack bench takes a class v5 pack's leaves.bin (buffers 2 and 3 on igneum_build, the pack's FNV checked first) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:58:17 +00:00
igneum-labs
4794a8ef82 Counter ASIC 3.0 status: the Devnet 3 epoch-0 pack, the project lead's three orders and the in-house correction (class v5 now, the internal adversarial pass, the PC 1 measurements) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:54:43 +00:00
igneum-labs
c659b2c85c Site and evidence: the chip model's next test is the internal adversarial pass (three lanes new to the hash code, outsider inputs only, reports published whole), not external lots; the one outside check staged on its escrow and the publish word (the project lead's correction, 7 October 2026) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:54:43 +00:00
igneum-labs
788dc36978 Merge remote-tracking branch 'build/ca3-v4-amend' into class-v5 
# Conflicts:
#	igneum-pow/src/generator.rs
 2026-10-07 17:53:53 +00:00
igneum-labs
5fc4d5eee8 class v5: the harness records of the bytes-6 flip run (12:17 to 12:21Z) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:52:54 +00:00
igneum-labs
f078116c3b release 0.3.22: proving on Devnet 3 opens (first segment submitted 18:45 BST, the sizing), the 0.3.21 warm cases end and why the relay cell reads on Devnet 3 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:52:42 +00:00
igneum-labs
313dc1f16b release 0.3.21 section 7: the Mac entry LIVE 18:41:50 BST, Windows as its own entry, the parallel installer shapes, the testnet 6ed56f63 line, the 0.3.22 pin candidate 34a2dbaa, the signing bonus paragraph 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:42:54 +00:00
igneum-labs
59284364b5 release 0.3.22 section 6: DN3 GATE PASS, the two clocks, the tree order (a) to (f) with main's floor-file ruling, the project lead's nine-switch ruling and main's height mechanics, the testnet re-arm, the 0.3.21 Windows toolchain finding 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:40:37 +00:00
igneum-labs
a8753a60c0 release plans: 0.3.21 ships as the app tree over c4459193 (section 6, the GitHub exception window from 18:02 BST, the Windows path without windows.yml, the DMG 490919d9); 0.3.22 section 5 the Devnet 3 genesis on 69d1b56e at 18:06:19 BST (gates, pairs, the program id correction, the seed left off the sweep); rule 5 names the seeds in the wave list with a read-back line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:25:23 +00:00
igneum-labs
0370961489 Counter ASIC 3.0 status: Devnet 3's pair agrees since 17:18Z (702 blocks, 0 rejected; first lock about 19:10Z on the 7,200-DAA window); the no-GitHub rule 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:20:43 +00:00
igneum-labs
e1e5db0f70 Counter ASIC 3.0 status: Devnet 3's epoch-0 program id fce15bf61030be57 (the id follows the seed; the pairing pin unchanged) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:12:25 +00:00
igneum-labs
ff2c7470c1 Counter ASIC 3.0 status: GitHub suspended (the mirror is the record), Devnet 3 mines on 69d1b56e from 17:06:19Z, the Hetzner seed still on the old object 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:09:33 +00:00
igneum-labs
dae386ef46 Counter ASIC 3.0 status: the 0.3.22 kaspa-pow suite green, master green on the pow fix, the chip texts live (incl. /claims), Devnet 3's first go refused on the genesis timestamp (8 Oct 00:00Z) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:03:06 +00:00
igneum-labs
e67deba19e Counter ASIC 3.0 status: the pow stop-the-line executed (ca3-v4-amend on master as 363ec7ad, igneum-pow byte-identical to a5d735b2) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:48:07 +00:00
igneum-labs
363ec7ad8c Merge ca3-v4-amend c44b4416 into master (gate: green on c44b4416, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 16:45:48 +00:00
igneum-labs
39f13fca13 Merge site-ui-5 e5e6b517 into master (gate: green on e5e6b517, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 16:45:01 +00:00
igneum-labs
c44b4416d4 Merge origin/master f8344773 into ca3-v4-amend (igneum-pow kept byte-identical to the frozen a5d735b2 per main's stop-the-line ruling; the ledger keeps both sides) 2026-10-07 16:40:29 +00:00
igneum-labs
b94c8e9f76 Counter ASIC 3.0 status: the 0.3.22 re-pin staged (bd710a36, candidate fa7f854f, byte 7 from genesis) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:39:34 +00:00
igneum-labs
0324527e03 Counter ASIC 3.0 status: the stop-the-line on master's pow suite (era-vdf's be4db4f3 against the pins), the hash lane's merge of e9cfe6c1 ordered, the condition verified 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:39:05 +00:00
igneum-labs
b8a56fea1f Merge remote-tracking branch 'origin/master' into site-ui-5 2026-10-07 16:37:57 +00:00