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class v5 design page: F8 on the freeze PASS with the known residue (the attack-pass lane's reading), F9/F1/F4 pending

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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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igneum-labs 2026-10-07 22:06:37 +00:00
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docs/design/class-v5-stored-state.md
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@ -274,7 +274,7 @@ Every item of this page that has no code, no test or no measurement yet, with th
| The hot-set cache rule (AP-F8-1, 1.067x bound) | inherited by merge from sub-version 3 (the dataflow freshness rule, the shared-operand rule, the 256 cap and the last resort); the bound itself is the attack-pass lane's F8 gate on the v5 stream | attack-pass lane (a3832b1c3b274b310) for the gate; this lane for the v5 pack export it reads | 2 |
| The weak-day FPGA rule (AP-F4-1, NAF sum at least 163, at least 4 distinct rotations) | NO code, NO test: recorded in section 11 with the rule text; lands in `memhard.rs` `MixParams::with_shape` behind the v5 class (the mixer draw redrawn from the next stream values), with the known-failed case (the worst calendar day 29,337 at 1.121x redrawn) and the per-day rejection count (6.1e-4) | this lane | 3 |
| The shadow-redundancy rule (AP-F1-1, 3.0 percent) | NO code, NO test: recorded in section 11 with the fraction; lands in `generator.rs` beside the shadow draw behind the v5 class (a block whose peephole-removable share exceeds 3.0 percent redrawn), with the known-failed case (the census's 5.078 percent block redrawn) | this lane | 3 |
| The attack-pass families on v5 (F1, F4, F8's 64-seed gate at 2^24 with the 1.2x line, F9's exhaustion count) | NOT run on v5; the harnesses exist on branch attack-pass for v4 | attack-pass lane; this lane hands it the v5 stream (`--program-class v5 --state`) and the pinned pack | 4 (its) |
| The attack-pass families on v5 (F1, F4, F8's 64-seed gate at 2^24 with the 1.2x line, F9's exhaustion count) | F8 on the freeze 1c420786 PASS with the known residue (build-2, halves ended 22:58 and 23:03 UK; pairing e5a4ac5978462156 verified, 0 mismatches against the library on the Devnet 3 state): 61 of 64 seeds under 1.2x of the window model (0.9919x to 1.144x), 3 over, all in the four-seed tail (p10 1.5047x, p8 1.3787x, p4 1.2166x); p34 reads 0.9997x under the (c''') floor; p23, p19, p15, p18, p56 at 0.9997x to 1.0001x; the ratios equal sub-version 3's seed for seed within 0.001 except where the floor moved a draw. F9, F1 and F4 (F4 on 8ca66afa with the agreed w32 convention) follow from build-1 | attack-pass lane; this lane pairs the tip | 0 |
| The kit for every platform: Metal | the kernel text is emitted (the leaf buffer on `igneum_build`); the Metal pack bench takes `leaves.bin` as of 19:0x UK (this commit); the one-click worker's Metal host (`proto-metal/main.swift`) does NOT yet upload the leaves | this lane (packbench), the worker lane for main.swift | 2 |
| The kit: CUDA | the kernel text emitted and measured on the 4090 through `proto-newpow/class-v5/bench.cu` (section 7); the one-click NVRTC host (`proto-cuda/nvrtc`) does NOT yet upload the leaves | worker lane | 2 |
| The kit: OpenCL (AMD), Intel | the kernel text emitted; no host, no run | worker lane (host), fleet or PC 1 (the 9070 XT run) | 3 |