igneum-labs
|
17da4045b5
|
Counter ASIC 2.0 status 21:45: the PC 2 resume no-op defect, the miners off since 21:25
|
2026-10-05 21:45:43 +00:00 |
|
igneum-labs
|
978c430a8a
|
Counter ASIC 2.0 status 21:42: the era fast-forward 1558971, the cache rebase, the suites' tip
|
2026-10-05 21:42:41 +00:00 |
|
igneum-labs
|
5f125f5aee
|
Counter ASIC 2.0 status 21:41: the era draw's Mac spread 0.8%, the final package, the merges
|
2026-10-05 21:41:42 +00:00 |
|
igneum-labs
|
f394016bc3
|
Counter ASIC 2.0 status 21:41: the mixer timing session, x8 provisional
|
2026-10-05 21:41:15 +00:00 |
|
igneum-labs
|
208487c300
|
Counter ASIC 2.0 status 21:40: x8 built and bit-exact, the mixer PC job
|
2026-10-05 21:40:50 +00:00 |
|
igneum-labs
|
a61bbc4524
|
Counter ASIC 2.0: gate G4 run 1 PASS recorded; status 21:39
|
2026-10-05 21:39:01 +00:00 |
|
igneum-labs
|
29e1b28db4
|
Counter ASIC 2.0 status 21:38: ca2-cache final 2de19e5
|
2026-10-05 21:38:34 +00:00 |
|
igneum-labs
|
9eb6b5e654
|
Counter ASIC 2.0: layer 5 decided OUT on the PC rows; status 21:36
|
2026-10-05 21:36:30 +00:00 |
|
igneum-labs
|
030858063c
|
Counter ASIC 2.0 status 21:34: PC 2 timing, the suites after the restart
|
2026-10-05 21:34:16 +00:00 |
|
igneum-labs
|
d6a503ca93
|
Counter ASIC 2.0: the iGPU restart-per-epoch statement, dataset reuse on the next-cut list, the gate's script fix; status 21:32
|
2026-10-05 21:32:35 +00:00 |
|
igneum-labs
|
2432a01f6c
|
Counter ASIC 2.0 status 21:31: the runner recovered, the 0.3.10 rollout, the restart rule
|
2026-10-05 21:31:32 +00:00 |
|
igneum-labs
|
3791a29ebb
|
Counter ASIC 2.0 status 21:31: C23 and C24
|
2026-10-05 21:31:06 +00:00 |
|
igneum-labs
|
d8e6ad3341
|
Counter ASIC 2.0: the x8 refinement in the rollout plan; status 21:28: hot-table go, installer attempt 3 failed, PC 1 order
|
2026-10-05 21:28:07 +00:00 |
|
igneum-labs
|
52e41787ec
|
Counter ASIC 2.0: the x4/x8 decision rule recorded (delegated); status 21:27
|
2026-10-05 21:27:46 +00:00 |
|
igneum-labs
|
8981d15f59
|
Counter ASIC 2.0 status 21:27: installer attempt 3, the fast-failure rule
|
2026-10-05 21:27:00 +00:00 |
|
igneum-labs
|
e2be67fc3f
|
Counter ASIC 2.0: G6 state and the expected 0.3.11 digest; status 21:25
|
2026-10-05 21:25:28 +00:00 |
|
igneum-labs
|
48baa91575
|
Counter ASIC 2.0 status 21:25: the mixer x4 bit-exact on the Mac, the chip row 1.84x, the hot table's effect on the row
|
2026-10-05 21:25:03 +00:00 |
|
igneum-labs
|
c0c44cab39
|
Counter ASIC 2.0 status 21:24: the third eGPU drop, the miners are mining, the installer build running
|
2026-10-05 21:24:45 +00:00 |
|
igneum-labs
|
ec0c36f611
|
Counter ASIC 2.0 status 21:23: the era package, the V3_CLASS composition rule
|
2026-10-05 21:23:38 +00:00 |
|
igneum-labs
|
123af2d107
|
Counter ASIC 2.0 status 21:23: the installer build republished, PC 1 order
|
2026-10-05 21:23:10 +00:00 |
|
igneum-labs
|
877b45a116
|
Counter ASIC 2.0 status 21:22: the installer build job failed in 2 s, PC 1 decision pending
|
2026-10-05 21:22:37 +00:00 |
|
igneum-labs
|
ced3b703d4
|
Counter ASIC 2.0 status 21:22: Ember Tune queued
|
2026-10-05 21:22:20 +00:00 |
|
igneum-labs
|
e8547b1bcb
|
Counter ASIC 2.0 status 21:21: PC 2 to agg-cost-pc2-2 until 21:45, the PC 1 order
|
2026-10-05 21:21:27 +00:00 |
|
igneum-labs
|
41afd097cd
|
Counter ASIC 2.0 status 21:20: the added-form hot table on the Mac, the decision rule for layer 5
|
2026-10-05 21:20:53 +00:00 |
|
igneum-labs
|
8420f074d5
|
Counter ASIC 2.0 status 21:20: layer 9 complete with the compile-ahead table and the floor
|
2026-10-05 21:20:25 +00:00 |
|
igneum-labs
|
5a6c30560a
|
Counter ASIC 2.0: the proving v1 app branch final 6dc686a; the 0.3.11 tree composition; status 21:20
|
2026-10-05 21:20:13 +00:00 |
|
igneum-labs
|
451b02ea42
|
Counter ASIC 2.0 status 21:11: the 9070 XT back on the bus, PC 1 to the 0.3.10 build, the playbook parse-gate rule
|
2026-10-05 21:11:19 +00:00 |
|
igneum-labs
|
1319adf588
|
Counter ASIC 2.0 status 21:05: the node merge ba43cf0f, the hot-table package, unproven_daa at fast time
|
2026-10-05 21:05:20 +00:00 |
|
igneum-labs
|
006b2fe585
|
Counter ASIC 2.0: proving v1 handoff recorded in the rollout plan; status 21:04
|
2026-10-05 21:04:35 +00:00 |
|
igneum-labs
|
3c129fb7a9
|
Site, litepaper, miner page: the proving line (NVIDIA 24 GB from the fee switch, 32 GB today; AMD and Apple cards mine) replaces "the card mines and proves"
|
2026-10-05 21:04:11 +00:00 |
|
igneum-labs
|
594790b354
|
Merge branch 'amd-prove' into ca2-coord
# Conflicts:
# docs/bench-log.md
|
2026-10-05 21:03:58 +00:00 |
|
igneum-labs
|
ffa2633845
|
docs/analysis/amd-proving.md: no zkVM proves on AMD (SP1, RISC Zero, Jolt, OpenVM, ICICLE cited), the SP1 CPU prover measured on PC 1 beside the miners (282 s a shard at any size, 30 GB RSS: no CPU tier), the tier consequences and the public line; PC 1 job scripts with the bash -n gate; bench-log entry
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-05 21:02:59 +00:00 |
|
igneum-labs
|
4366c6ad90
|
Counter ASIC 2.0 status 21:02: the measure lock convoy, found by lsof
|
2026-10-05 21:02:13 +00:00 |
|
igneum-labs
|
64ab9ce8d0
|
Counter ASIC 2.0 status 21:01: the 0.3.10 installer build takes PC 1 after the repro run
|
2026-10-05 21:01:20 +00:00 |
|
igneum-labs
|
b93d1897eb
|
Counter ASIC 2.0 status 21:00: PC 1 to the repro run, PC 2 to agg-cost, the CPU fallback numbers, the S_p shard dropped
|
2026-10-05 21:00:58 +00:00 |
|
igneum-labs
|
2abdb56194
|
Counter ASIC 2.0 status 20:58: PC 1 and PC 2 occupancy
|
2026-10-05 20:58:57 +00:00 |
|
igneum-labs
|
b4e94a482d
|
Counter ASIC 2.0 status 20:57: the mixer construction committed, MX4 is V3_CLASS
|
2026-10-05 20:57:12 +00:00 |
|
igneum-labs
|
88740ce75e
|
Counter ASIC 2.0 status 20:56: PC 2 released, the proving fork tip, the S_p curve with the miner on
|
2026-10-05 20:56:23 +00:00 |
|
igneum-labs
|
3e237db050
|
counter-asic-2.md: layer 9 row and the decisions table of 5 October 2026 (night)
|
2026-10-05 20:53:45 +00:00 |
|
igneum-labs
|
f2c99cff95
|
Spec 01 1.4.5 and 1.4.6: generator 3, the class and era seed in the pack and on the job line, the refusal rule
|
2026-10-05 20:53:26 +00:00 |
|
igneum-labs
|
9eee20f97c
|
Counter ASIC 2.0 status 20:53: spec text applied for layers 6, 7, 9; what still lands from the branches
|
2026-10-05 20:53:12 +00:00 |
|
igneum-labs
|
ac0d7c1592
|
Spec 01 and 04: layer 9 epoch_len (1.12, 1.13.1, 4.3), reserve family R1 and the emulation rule (1.13.2), the cache growth rule option C and the step mapping (1.13.3), the mixer_mult row
|
2026-10-05 20:52:58 +00:00 |
|
igneum-labs
|
cf0839a231
|
Counter ASIC 2.0 status 20:51: chain_dataset_day wired in the node, evidence row 22
|
2026-10-05 20:51:52 +00:00 |
|
igneum-labs
|
b8f8105af4
|
evidence.md: the card-lifetime claim as a designed row under the step schedule
|
2026-10-05 20:51:38 +00:00 |
|
igneum-labs
|
4a7b72da9b
|
Litepaper hardware line on the step schedule; status 20:51: public copy applied, level 1 and the limits bullet wait for the chip row
|
2026-10-05 20:51:26 +00:00 |
|
igneum-labs
|
1e34c3a4e4
|
Site and litepaper: the level 2 chip-resistance copy (three ideas, the fourth paragraph), the latency correction, the card-lifetime lines under the step schedule
|
2026-10-05 20:51:13 +00:00 |
|
igneum-labs
|
949c4582e1
|
Counter ASIC 2.0 status: readwidth head hash corrected to 06dcb31
|
2026-10-05 20:50:30 +00:00 |
|
igneum-labs
|
4f042f37dc
|
Counter ASIC 2.0 status 20:50: the measure lock holder, the with-lock status defect
|
2026-10-05 20:50:05 +00:00 |
|
igneum-labs
|
4a1f872cb6
|
Counter ASIC 2.0 status 20:49: mixer construction, the lock cleared, PC 2 state, one merged-tree suite job
|
2026-10-05 20:49:39 +00:00 |
|
igneum-labs
|
27471633c7
|
Counter ASIC 2.0 status: heading times 20:42 to 20:47 corrected to the commit clock
|
2026-10-05 20:48:20 +00:00 |
|