igneum-labs
067ed9dfd9
Explorer: names its one source, the observer node (the chain the certificates follow), on the index, block and transaction pages
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:42:40 +00:00
igneum-labs
3c0915c5d9
Explorer: /tx and /proving carry the nav as master builds it after the swap route
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:34:36 +00:00
igneum-labs
ba4615ef56
Merge remote-tracking branch 'build/master' into explorer-dn3
2026-10-08 10:34:09 +00:00
igneum-labs
9cd3402516
Explorer: a chain block whose plan the observer has not read says so (the scene's wording rule of 7 October 2026)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:34:09 +00:00
igneum-labs
cd190d13c9
Merge dex-devnet3 d5dd6fa1 into master (gate: green on d5dd6fa1, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 10:32:52 +00:00
igneum-labs
836e97d061
Merge ca3-coord-record c4510485 into master (gate: green on c4510485, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 10:31:47 +00:00
igneum-labs
e096e381d9
Merge fast-time-decimals 32edc481 into master (gate: green on 32edc481, recorded by tools/ci/pre-push.sh; landed on the box mirror under the exception declared by main: main's ruling, 7 Oct 2026 19:5x UK: the GitHub account is suspended, lanes land on the box mirror's master, the box gate stamp is the verdict; GitHub gets the fast-forward when it answers)
2026-10-08 10:30:58 +00:00
igneum-labs
15c405373a
Merge spec-accept-23 ecf9ffec into master (gate: green on ecf9ffec, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 10:29:03 +00:00
igneum-labs
95c3a37483
Merge class-v6-history 49d7ff46 into master (gate: green on 49d7ff46, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 10:26:13 +00:00
igneum-labs
d5dd6fa112
Swap page: the RPC-syncing line (block N of at least 26,972) instead of unreadable reserves while the public Devnet 3 node is behind the pools
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:26:01 +00:00
igneum-labs
983d766481
Merge class-v6-hardware ffc3a54b into master (gate: green on ffc3a54b, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 10:24:52 +00:00
igneum-labs
32edc4818c
fast-time: override-60x.json taken whole from ca3-v4-node (81 keys: master's 75 plus base_unit_decimals, pool_split_activation_daa, program_class_v5_activation_daa, proving_base_fee_ceiling_multiple, proving_fee_ceiling_activation_daa, subsidy_per_block_activation_daa; no shared value differs), the file the 0.3.25 node line's test fast_time_60x_file_is_the_devnet_at_60x reads key by key; a single added field moved the red to the next key (8 October 2026, 11:2x UK)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:24:47 +00:00
igneum-labs
c45104856b
Counter ASIC 3.0 status: main's word on the two reds (the detach in 0.3.25 if green by 12:15), the day-key scan to 2^28 PASS, the sweep reruns read as none, the attack-pass branch merged and pushed, the family gate's first coverage (16 eras; the index-bit bias firing at address bit R on 7 of 16 drawn eras, a class v6 design row: load_index's form, not a floor; the bucket bound in sigma), the ota test literal fixed ( 36f7fefa, the detach rides 0.3.25)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:24:10 +00:00
igneum-labs
f05228a6a1
Devnet 3 explorer: transactions (/tx/<hash>), accounts (balance, nonce, code, 7 days of transactions), the proving view (/proving), the DAG picture and the verified badge (the covering certificate re-checked in the browser with site/verify) on /explorer and /block; class and lock state per block; /api/explorer gains ?tx, ?txs, ?proving, ?stats, ?dag; the dn3_ default for /api/explorer, /api/stats, /api/supply and /api/checkpoint (?index=N); replaced chain blocks read as such against the indexer
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:24:03 +00:00
igneum-labs
4611a23223
Merge fast-time-decimals 6006b920 into master (gate: green on 6006b920, recorded by tools/ci/pre-push.sh; landed on the box mirror under the exception declared by main: main's ruling, 7 Oct 2026 19:5x UK: the GitHub account is suspended, lanes land on the box mirror's master, the box gate stamp is the verdict; GitHub gets the fast-forward when it answers)
2026-10-08 10:23:58 +00:00
igneum-labs
dfad95e9f0
Site: the Devnet 3 swap page at /swap (MetaMask and any injected wallet by chain id 4463 and the public RPC; quotes, swaps, the faucets, add liquidity; every swap's block with its proof status from /api/live; Devnet 3, test tokens, no value on every view), Swap in the Mine panel and the sheet of every page
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:23:29 +00:00
igneum-labs
ecf9ffecec
Bench table: the fleet's watts are class v3 (the sweep lane's read of its pack, 8 October 2026: program_class v3, generator 3): every model-sweep row and every 7 October fleet row carries its watts as "(class v3)", its MH per watt hollow and unranked, the per-watt lede claims drawn from class v4 rows only, the sweep line stating the fact and the measured gap (a 5070 Ti at 141 W on v3 and 224 W on v4 at one rate); the rates stand (memory-bound, the same under both)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:22:49 +00:00
igneum-labs
3d0b673753
Merge ca3-coord-record c22a541d into master (gate: green on c22a541d, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 10:21:50 +00:00
igneum-labs
49d7ff462b
Class v6 history lane, first cut: every ASIC-resistant proof of work and its chips by mechanism, the four-layer mapping with a number per chip class, and the three lessons that bind on v6
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docs/analysis/class-v6/history.md: 21 chip rows by mechanism (what each chip specialised, what the design missed, the timeline, the v6 layer, closed or not, the per-joule number); in-depth sections for Ethash (the E3's DDR3, Linzhi's 4.4 GB beside 64 compute units, the Jasminer X4's DRAM hybrid-bonded onto a 40/45 nm die, the E9), ProgPoW (the Least Authority and Rao audits read from the PDFs, Kik, Linzhi's claim, the adopters), RandomX (the X5's RISC-V board at 1.46x, the X9 announced December 2025 and withdrawn May 2026 with zero units, RandomX v2 released 25 March 2026 with activation pending, the Qubic episode as the detector's lesson), Cuckoo (the GRN1's 512 MiB SRAM die, the G32, the iPollo G1, the 2025 bounty), Equihash (the Z9's single die, the Fudan parameter-following design), Scrypt and Argon2 (the BM1485's on-die scratchpads, Percival's lookup gap, MTP), the no-chip hashes, kHeavyHash, CryptoNight, X16R, Lyra2REv2, the compute rows. The four layers against the history layer by layer, with the E3's death dates, Autolykos's growth rule, the design-cycle and FPGA-compile clocks, and the honest verdict that the stored-dataset chip (class C) is not closed by any layer: 5.1x per joule at zero premium, 2.1x with the shadow at k = 1. Two corrections to the 5 October file (the X9, RandomX v2) and one claim marked unverified (the 5x fork-surviving chip). First cut for 15:00 UK; the full report by 09:00 UK on 9 October.
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:19:10 +00:00
igneum-labs
ffc3a54bdc
Class v6 research lane B: the hardware future, five years out (first cut and the full report in one file)
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docs/analysis/class-v6/hardware-future.md: one table over PIM and PNM (HBM-PIM, AiM, LPDDR5X-PIM, UPMEM), HBM3E, HBM4 and the custom HBM4E base die, fine-grained DRAM on logic, LPDDR6, 3D DRAM, RLDRAM 3 and Folded Banks, FPGA with HBM2e, wafer-scale, CXL, optical I/O, chiplets and UCIe, and SRAM at N2: energy per dependent read, latency, cost per GB, availability to a non-hyperscaler, the k_read and shadow k bands, the edge per joule at zero shadow against the 5090 and the M5 Max, and the one layer of the four that blunts each with a number. The three findings: a 2 GiB SRAM full store on one N2 reticle is the strongest five-year chip (13x to 17x per joule, about USD 0.3 per MH/s) and no layer reaches it (layer 2 moves its capex, not its joules; the shadow at k = 0.5 holds 4.8x); per-bank PIM is blind (1.6 percent of reads in-bank at 2 GiB) and the custom HBM4E base die is the f = 1 chip with its controller in the stack (6.5x to 14x), untouched by layers 1 to 4; the denominator is the wrong card (the M5 Max at 0.78 microjoules halves to thirds every chip edge). Section 5 carries the k bands for the research lane's chip rows; section 7 the four decisions with defaults and deadlines; section 9 the sources with URLs and dates. tools/ci/export-exclude.txt: docs/analysis/class-v6 is research, not public export.
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:17:50 +00:00
igneum-labs
6006b92091
fast-time: base_unit_decimals 8 in override-60x.json, the field the node line's test fast_time_60x_file_is_the_devnet_at_60x demands (0e4ec18a's change, added by hand after its cherry-pick conflicted; the 0.3.25 pre-pin matrix read core RED on every box without it, 8 October 2026, 11:1x UK)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:16:33 +00:00
igneum-labs
c22a541d12
Counter ASIC 3.0 status: the founder's load order on the four boxes and its placement (lane D's family sampling, the attack families at scale, lane C's packs, the pin matrix, the cross builds), the drift class settled by a fresh-walk node, the pin candidate e0644958 confirmed, the Windows installer class and the detach fix, the tiers' class-flip pair gated (081b3ba7), the rpc up, two reds on the release line from the first ten minutes of the load order (the missing 60x field; the detach's test literal) with their fixes and defaults
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:14:50 +00:00
igneum-labs
ad76e41174
DEX: the AMM live on Devnet 3 (factory 0x09FF42db, router 0x9a6fA842, WIGN 0x47447783, TTA, TTB, three seeded pools; docs/contracts/devnet-3.json), the faucet's first drip, the Seed script with the node's own gas estimates (Devnet 3 charges proving gas inside execution gas)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:14:48 +00:00
igneum-labs
0c548b60c7
Merge ship-docs-0321 2a4a828b into master (gate: green on 2a4a828b, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
2026-10-08 10:12:42 +00:00
igneum-labs
a7cec15ac3
Merge spec-accept-23 ec6d60b5 into master (gate: green on ec6d60b5, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 10:11:33 +00:00
igneum-labs
2aec3cd909
Explorer indexer: refuses a node that reports another network (EXPLORER_NETWORK, default igneum-devnet-3) and re-reads from the tip when the indexed number runs past it
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:10:54 +00:00
igneum-labs
559fc2e424
Explorer indexer: block hashes stored without 0x, the DAG convention of live_blocks, so a transaction joins its block
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:09:05 +00:00
igneum-labs
514ec64183
DEX: the AMM in the Uniswap v2 shape for Devnet 3 (factory, pairs, router, wrapped IGN, two faucet test tokens), its Foundry tests and the deploy script (8 October 2026)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:07:44 +00:00
igneum-labs
9398898335
Merge ca3-coord-record e62adc83 into master (gate: green on e62adc83, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 10:07:39 +00:00
igneum-labs
ec6d60b5bc
Bench table: the model sweep's last rows (RTX 4070 Ti 31.24 MH/s at 95.4 W; L40S 56.41 at 220.7 W in the datacentre table; RTX 4080 Super 42.60 at 134.9 W); the GTX 1080 Ti row's flag cleared by its second host (five of five self-tests pass, the failure was the first host's VRAM); the page carries the sweep's two findings as one line (class v4 cap-proof; class v5 level on uncapped cards and 17 to 18 percent under on two power-capped hosts, so a v5 rate needs the power state beside it)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:05:26 +00:00
igneum-labs
459795d4dd
Merge spec-accept-23 6f0fc170 into master (gate: green on 6f0fc170, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 10:03:42 +00:00
igneum-labs
2a4a828be0
release record section 24: the first lock on cc902690 (checkpoint 1931, 10:06:32 BST), the move's count and the three puller faults closed, 0.3.24 Windows take 2 (Inno stopped the app and copied nothing; the /IGNOTA=1 rule), 0.3.25 opened (tip 87d8862d, the ceiling cut e0644958, digest 1b37cb9d, the DMG 501ba293 staged, the clock), the tiers at the class flip, the signed apps pipeline (Igneum Labs LLC)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:03:40 +00:00
igneum-labs
5a20afd47b
Explorer indexer: the observer's EVM-side sibling for Devnet 3 (live_txs, live_accounts, explorer_blocks, explorer_state under the dn3_ prefix; receipts, logs, balances, nonces, code; the three-deep reorg re-read; 7-day retention; igneum_getNodeInfo kept for the class floor)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:03:34 +00:00
igneum-labs
e62adc83cf
Counter ASIC 3.0 status: the 0.3.25 pairs and app tip ( 87d8862d on the ceiling cut e0644958, its fast-time PASS at 10:54), the tiers' class-flip UI half (d949e274), the four builder lanes and the class v6 declaration with its four research lanes spawned and the outline on the mirror, the Arc re-read and v5lock jobs live, the held-push cause (the branch's own hook predating the per-process fix)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 10:01:24 +00:00
igneum-labs
71e80843a5
Merge ca3-coord-record 6443f921 into master (gate: green on 6443f921, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 09:58:13 +00:00
igneum-labs
6f0fc170c1
Bench table: the model sweep's rows 16 to 19 (RTX A6000 53.64 MH/s at 239.1 W in the datacentre table, v5 level with v4 on an uncapped sm_86; GTX 1080 Ti 16.26 at 124.3 W with the one-in-three cache self-test flag until a second host decides; RTX 4060 19.09 with no watts, the host has no power sensor; RTX 2060 14.13 at 120.6 W, the floor of the list; rented and untuned, 8 October 2026)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:57:36 +00:00
igneum-labs
ead4ab9488
Merge spec-accept-23 c6a072f2 into master (gate: green on c6a072f2, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 09:54:41 +00:00
igneum-labs
6443f921e9
Counter ASIC 3.0 status: the 0.3.25 pairs on 7bd2940f and the re-pointed app tip c68aea33 (every input green at 10:33 bar the pin's gates and the crossing), main's sweep finding (class v5 17 percent under v4 on a power-capped A4000; a knee-locked card may lose a few percent at the crossing until Ember re-tunes) and its two orders with their defaults
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:48:45 +00:00
igneum-labs
c6a072f2cd
Bench table: the model sweep's rows 11 to 15 (RTX 2080 Ti 26.01 MH/s at 224.6 W and RTX 2070 Super 19.09 at 166.0 W, the Turing per-watt floor; A100 SXM4 138.10 at 268.6 W and H100 SXM 248.30 at 411.7 W in the datacentre table; RTX A4000 31.41 at 112.8 W under a 114 W host cap, its class v5 reading held off the page until an uncapped card confirms it; rented and untuned, 8 October 2026)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:47:14 +00:00
igneum-labs
fe25f566df
Merge spec-accept-23 142d77eb into master (gate: green on 142d77eb, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 09:45:55 +00:00
igneum-labs
142d77eb06
Bench table: the model sweep's rows 5 to 10 (RTX 3070 37.09 MH/s at 142.3 W; RTX 3070 Ti 38.98 at 177.1 W; RTX 4060 Ti 16 GB 20.07 at 79.2 W; RTX 5070 51.81 at 110.8 W; RTX 4070 Super 31.24 at 100.2 W under a 110 W host cap; RTX 3060 Ti 31.70 at 100.4 W; rented and untuned, 8 October 2026, the class v5 kit's fingerprint matched on each)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:39:57 +00:00
igneum-labs
2de2606167
Merge spec-accept-23 387f27dc into master (gate: green on 387f27dc, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 09:38:41 +00:00
igneum-labs
7c56b1449f
Merge ca3-coord-record daba2e69 into master (gate: green on daba2e69, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 09:37:52 +00:00
igneum-labs
387f27dc48
Bench table: the model sweep's rows 2 to 4 (RTX 4070 Ti Super 41.24 MH/s at 142.6 W; RTX 3080 Ti 58.86 at 293.5 W; RTX 4080 40.71 at 128.6 W; rented and untuned, 8 October 2026, the class v5 kit's fingerprint matched on each, the hash at 0.99 to 1.00 of each card's read ceiling)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:32:03 +00:00
igneum-labs
daba2e69d2
Counter ASIC 3.0 status: the 10:05 move's read-back (36 of 36 on the pin by 10:12, the first lock 10:06:32, carrying resumed; three fault classes named), the tiers gated (d3d0704a), the knob's tip e2962b89, the 0.3.25 app line assembled at 10:29 (e0d4425f), the node line's tip 7bd2940f with the one-shot gossip fix and the drift item reclassified
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:31:37 +00:00
igneum-labs
b18d364006
Merge ca3-coord-record 01a16045 into master (gate: green on 01a16045, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 09:26:15 +00:00
igneum-labs
dca5878e5c
Bench table: the model sweep's RTX 5070 Ti row (78.45 MH/s at 135.9 W, 0.577 MH per wall watt, rented and untuned, 8 October 2026; the class v5 kit at the same rate, fingerprint matched; the hash at 0.99 of the card's read ceiling); the /miners lede recomputes from the data as three separate claims (best desktop card by rate, best stock MH per wall watt, best tuned), so a rented stock row never reads as tuned
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:25:32 +00:00
igneum-labs
01a160456e
Counter ASIC 3.0 status: the 0.3.25 plan (the shipper's), main's word (the tiers both halves, gated) and the founder's word (0.3.25 today: the app line by 12:30, the pin by 13:00, the move after the 68,400 crossing reads clean, about 13:30), card-in ready, the tiers' UI half merged, the second deploy ( a90fde64), the node line placeable ahead of its minute (c6629572), the knob's tip e2962b89, the Hetzner boxes on the founder's word
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:20:01 +00:00
igneum-labs
3ff6de36a4
Merge live-shards-8 1c1f90e8 into master (gate: green on 1c1f90e8, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 09:19:53 +00:00
igneum-labs
4d0fd00f4f
Merge ca3-coord-record 3f61c91d into master (gate: green on 3f61c91d, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 09:18:52 +00:00