igneum-labs
0276128177
Merge live-shards-8 2c589122 into master (gate: green on 2c589122, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 09:19:53 +00:00
igneum-labs
7fbf876ef9
Merge ca3-coord-record 01d2e123 into master (gate: green on 01d2e123, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 09:18:52 +00:00
igneum-labs
de6e5ae2e5
Merge build-server 103ceb0f into master on the box mirror: the site deploy checks (served links, the regrouped /miners count, the pipefail fixes)
2026-10-08 09:18:01 +00:00
igneum-labs
2c58912211
Live proving feed: the page says when its shard states are stale, and a chain block with an empty plan reads "no shards in this block" (8 October 2026, main's order: the project lead wants to watch proving and shards in real time; a stale snapshot must read as stale). Reading of the day: /api/live's proven and paid states come from the Devnet 3 observer's own node on igneum-build-1 (igneum-observer-node-dn3, EVM 26850), not from hub-1; that node stopped crediting payouts at 23:57Z on 7 October (paidShards frozen at 7,304 while blocks carried 8,457 proof records by 03:00Z and hub-1 counted 11,861 by 08:56Z), and the page kept showing the paid total as fresh. site/lib/proving-health.mjs (tests known-failed first: "Cannot find module", then 10 green on build-2): stale when the observer's last status read is over 60 s old (status_at, new in the observer's live_state.proving), when the node's tip trails the newest block by over 300 DAA, or when blocks carried proof records in the last 10 minutes and no shard moved to verified or paid for 10 minutes (the blind-to-records class); a quiet chain is not stale for lack of credits. /api/live carries stale, stale_reason, status_age_s, tip_lag_daa, records_10m and last_change_at on proving (two more indexed readings; scene/feed-contract.json lists the keys; the recorded fixture carries them). /live: the Proven tile's line reads "proving feed stale: ..." in ember, else "... last credit N s ago"; the inspector's count adds "feed stale". Scene 2.0.7: a chain block whose plan is known (block.number set, carried as plan on the normalised block) and empty reads "no shards in this block"; loading and late stay for an unread plan (shard-words test, known-failed on 2.0.6). Gate: the health test joins the site unit-test line.
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:12:56 +00:00
igneum-labs
01d2e123c0
Counter ASIC 3.0 status: the site deployed ( 1e21bbac at 10:00 BST), row 17's floor sentence and the Arc row restored ( 96c7c7db), the 0.3.25 node build's shape and main's word on the fee ceiling (no second object cut today), class-v5 8f481459 gated with the Intel fix, the per-process gh fix on master ( 12f6f9a8), the AMD knob for tonight's cut, the 0.3.24 move FIRED at 10:05:00 BST (the Mac entry and the hive live 10:08:35, the three nodes on the pin, class v5 at 68,400 about 12:54)
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:11:58 +00:00
igneum-labs
d12e0684c6
Merge ca3-coord-record 5ebeff23 into master (gate: green on 5ebeff23, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 09:07:55 +00:00
igneum-labs
9a2192c758
Merge spec-scrub 043a419c into master (gate: green on 043a419c, recorded by tools/ci/pre-push.sh; landed on the box mirror under the exception declared by main: main's ruling, 7 Oct 2026 19:5x UK: the GitHub account is suspended, lanes land on the box mirror's master, the box gate stamp is the verdict; GitHub gets the fast-forward when it answers)
2026-10-08 09:04:07 +00:00
igneum-labs
5ebeff2342
Counter ASIC 3.0 status: the gh switch owned by the attack-pass lane and the rule to every lane, the Intel fix on master ( 7616ccd4), the pairs on the pin, class-v5 a55fcc10 and the rebuilt kit (65b47211), the AMD grid prepared, the AP-F8-1 record line ( 4026be32) and the card-in job, the in-house pass's last landing ( 1bf68cdf), the attack-pass tail ( 8a2fc793), the signal-15 hook note
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 09:01:49 +00:00
igneum-labs
96c7c7db7e
Merge spec-accept-23 1ac664e3 into master (gate: green on 1ac664e3, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 08:59:34 +00:00
igneum-labs
1e21bbacea
Merge ca3-coord-record d0ea857d into master (gate: green on d0ea857d, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 08:58:40 +00:00
igneum-labs
12f6f9a8cd
Merge gh-igneum-dir 3d805feb into master (gate: green on 3d805feb, recorded by tools/ci/pre-push.sh; landed on the box mirror under the exception declared by main: main's ruling, 7 Oct 2026 19:5x UK: the GitHub account is suspended, lanes land on the box mirror's master, the box gate stamp is the verdict; GitHub gets the fast-forward when it answers)
2026-10-08 08:57:37 +00:00
igneum-labs
8a2fc79398
Merge attack-pass 29239a22 into master (gate: green on 29239a22, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
2026-10-08 08:55:29 +00:00
igneum-labs
1bf68cdf29
Merge crypto-engage f1c86098 into master (gate: green on f1c86098, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 08:54:42 +00:00
igneum-labs
4026be326d
Merge ca3-v4-amend 8a63248c into master (gate: green on 8a63248c, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 08:54:04 +00:00
igneum-labs
043a419cb4
fresh-repo.sh: IGNEUM_NEUTRAL_IDENTITIES keeps a neutral identity as it is (the public export's "Igneum contributors"), excepted from the mailmap and the verdict
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:53:52 +00:00
igneum-labs
1ac664e3b6
Merge build/master 7616ccd4 into spec-accept-23 (the Intel rotr worker fix taken; /miners rebuilt from the merged bench data)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:52:59 +00:00
igneum-labs
73941a02c1
fresh-repo.sh: the founder's names come from the private list only; a history identity is mailmapped, never mined for names (the public export's "Igneum contributors" would have become a first name to rewrite)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:52:39 +00:00
igneum-labs
3d805febb4
Every gate gh call reads Igneum's own gh directory, never the founder's (main's rule, 8 October 2026, 10:0x UK): tools/ci/gh-env.sh sets GH_CONFIG_DIR=~/.config/gh-igneum for the gate, the hook, the merge tool and the CI-state reader
...
At 09:46 UK the founder's gh had his other account active (his own work) and tools/ci/gh-account-check.sh refused every Igneum push from the Mac (the v5 lane's 56a50160 held local). The check now reads Igneum's directory: empty, it refuses naming the one step (the founder or main stores the Igneum token there with `GH_CONFIG_DIR=~/.config/gh-igneum gh auth login --with-token`; no lane does); another login, refused and named; the stored entry, passes; while tools/ci/github-suspended stands it skips with a line, because no gh call can succeed and the hook already refuses GitHub pushes, so the lanes land on the mirror meanwhile. Known-failed first: an empty directory, another login, the founder's directory never read (the fake gh records the directory it was given), the marker's skip, no gh. IGNEUM_GH_CONFIG_DIR overrides the path for the self-tests.
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:51:55 +00:00
igneum-labs
d0ea857d77
Counter ASIC 3.0 status: the move's readings and the pin line on 5b673577, the founder's standing rule (defaults and deadlines; the shipper's clocks mirrored) and its distribution, the Arc self-test read (the shipped workers right, the kit lacking the Intel rotate fix), the AMD knob opened (a002732a), the F8 tail attributed on the Mac (a per-site bucket concentration), the fast-time PASS and the minute 10:05:00 BST, the gh exception on the Mac, adv-accept closed (BOUND, no BREAK)
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:51:32 +00:00
igneum-labs
7616ccd48d
Merge intel-rotr-master f3d06b60 into master (gate: green on f3d06b60, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 08:51:15 +00:00
igneum-labs
29239a2296
attack-pass: the status board, F8 row, gate line and re-gate paragraph read the tail as attributed
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:49:21 +00:00
igneum-labs
f1c860983e
in-house-pass.md: adv-accept closed (15.1 box-hours, 796,042 accepted programs, BOUND, no BREAK); the pass's totals final
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:48:22 +00:00
igneum-labs
c7915d090b
Merge ca3-coord-record 645ddb20 into master (gate: green on 645ddb20, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 08:48:19 +00:00
igneum-labs
7ac25503ed
attack-pass: AP-F8-1 tail attributed (p4, p8, p10, p34 as per-site bucket concentration at a narrow-window site; the largest-bucket bound named for a next class)
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:48:03 +00:00
igneum-labs
8a63248c68
ledger AP-F8-1: the four-seed tail attributed (8 October 2026 Mac read at 2^24): one narrow-window site per seed, a quarter-bit bucket concentration from a mad, xor or sub writer, no lossy source, no chip consequence; the per-site bucket bound is a morning item
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:47:41 +00:00
igneum-labs
e1401ffd66
Bench table: the Intel Arc B580 row stands, with the 8 October re-read in its note (the installed 0.3.21 worker passes its self-test on this card, 96 of 96 lanes, 54 re-checked blocks at 10.58 MH/s; the kit build that failed lacked the Intel rotate-fold rewrite, a build fault and not an Arc result); /miners rebuilt
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:46:43 +00:00
igneum-labs
103ceb0f3c
Site deploy checks: grep -c in place of grep -q on every piped read (grep -q exits on the first match and the writer fails under pipefail)
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:44:32 +00:00
igneum-labs
f3d06b60fc
OpenCL worker: on an Intel platform rotr_var is rewritten to the shift form before the build (the Intel rotate fold, the Arc B580 bisect of 7 October 2026)
...
Intel's compiler turns rotate(x, (0u - n) & 31u) into a rotate LEFT by n: lane 0's register trace on the B580 diverged
at instruction 6 of iteration 0 (rotr) and nowhere before, in both exchange modes, with every other family and the
dataset kernels bit-exact. proto-opencl/intel_rotr.h rewrites the one helper line when the device's vendor or
platform string holds Intel (host.c's buildProgram and the prepare path), no other vendor sees a change, no pack or
consensus text moves. proto-opencl/test_intel_rotr.c (the pre-push gate runs it) feeds the line through the rewrite
under Intel, AMD and NVIDIA strings and asserts the outputs.
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
(cherry picked from commit 5f8abe10a6 )
2026-10-08 08:44:23 +00:00
igneum-labs
1ad79979c9
Site deploy checks: the /miners row count reads table#bench-current (the regrouped bench), known-failed first (an empty current table reads 0), floor 20
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:44:00 +00:00
igneum-labs
645ddb2014
Counter ASIC 3.0 status: main's morning words (the look landed, the floor sentence to row 17, CA4 parked, the Mac rule lifted for the F8 tail, route (A) at 10:45 BST), the build-server lane's honest state and the deploy and pairs plan, the fourth cut 5b673577 (floor 68,400), the Arc B580's self-test fault on both classes and the Intel kit held out of 0.3.24, the design pass on master ( d8459e79)
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:40:46 +00:00
igneum-labs
d8459e7918
Merge ca3-coord 3557bf9e into master (gate: green on 3557bf9e, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 08:39:08 +00:00
igneum-labs
28395fe5d8
Site deploy checks: pages read into a variable before grep (curl | grep -q under pipefail read false on a match: three false DEPLOY REDs)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:36:59 +00:00
igneum-labs
ca5151eef5
Evidence row 17: the in-house pass's floor reading beside its sentence (nine of nine hot sets refused; the diffuse era-stride excess, bounded under 0.1 percent of a hash's reads per site, is not caught by the floor and is the next class's test; measured 8 October 2026, ledger AP-F8-1 and AP-F8-6); /evidence rebuilt
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:33:21 +00:00
igneum-labs
3557bf9eb3
Site: the bench table's lead-cell width rule applies on desktop widths only (above 1,100 px); on the phone grid the lead cell has no max-width, so the rate cell no longer sits over the card name at 390 px (the box's sweep read the 360 px cap covering the lead text on a 390 px viewport)
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:32:43 +00:00
igneum-labs
3eb188c30d
Site: the bench table's lead cell wraps on desktop (the row rule's nowrap outranked the lead cell's normal by specificity, so the class v4 line ran under the rate cell at 1280 px and above; the overlap sweep on the box read it COVERED, the Mac's gate had skipped the sweep for want of a browser)
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:32:43 +00:00
igneum-labs
ea9b933662
Site: the bench table's desktop row is six columns (the class v4 cost and the date move under the card name as the muted second line), the card layout below 1100 px, the wrapper scrolls as a safety (the overlap gate read the eight-column row clipped at every desktop width)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:32:43 +00:00
igneum-labs
33549c3dcc
Site: the bench table's phone layout gives every cell its own grid area (the overlap gate read the quiet cells stacked under the Details button at 390 px)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:32:42 +00:00
igneum-labs
102cfa302e
Site: the GPU bench table's design pass in the site's own language (the founder, 7 October 2026): the vendor mark and name lead, the rate as the big tabular number, MH per wall watt in the ember tint for the best desktop card, watts and the class v4 cost quiet, the tuned state a pill, the date muted mono; the Hive values, the source and the note in a Details row; cards you can buy and datacentre under hairline headings, the datacentre collapsed; 56 px rows on desktop, a two-line card per row on a phone; the best desktop card as the lede, the rates note under a disclosure; header sort with the arrow and the ember underline
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 08:32:42 +00:00
igneum-labs
c569ebb90f
Merge ca3-coord-record 54adb48c into master (gate: green on 54adb48c, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 07:19:20 +00:00
igneum-labs
54adb48ce0
Counter ASIC 3.0 status: the 9070 XT bench row on master (the AMD watts no longer owed), the hot-table ldcs rows (a dead lever; the hot family latency-bound), the PC 1 list main set closed on measured rows
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 07:13:01 +00:00
igneum-labs
cf4d5c143c
Merge ca3-v4-amend 780b608d into master (gate: green on 780b608d, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 07:11:38 +00:00
igneum-labs
780b608d4d
bench-log: the hot-table packs on the RTX 5090, ldcs against base, unlocked and at the 1,300 MHz lock (36 rows, all PASS; ldcs dead, the hot packs lose 2 percent to the lock where mx8 loses 7.5)
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 07:05:19 +00:00
igneum-labs
3cde4b1980
Merge spec-accept-23 3c152ae1 into master (gate: green on 3c152ae1, recorded by tools/ci/pre-push.sh; landed on the box mirror)
2026-10-08 06:35:03 +00:00
igneum-labs
9065fd7057
CA4 hot-table job: the first kit flattened the eight hot packs into one folder (the job exited 2 in 0 s, pack hot32k4 missing); kit b carries packs/<name>/ for all nine, the fetch and run ids take a b suffix
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 06:30:27 +00:00
igneum-labs
a8b419ff64
Merge ca3-v4-amend 3b5bccae into master (gate: green on 3b5bccae, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 06:29:02 +00:00
igneum-labs
3c152ae10c
Bench table: the RX 9070 XT row takes the app's own power reading at the stock point (202 W at 18.9 MH/s, 0.093 MH/W; the G1 ladder's 18.8 to 19.2 as the rate; the status row of 8 October 2026), tune state "no lever" (no AMD knob in 0.3.20), the class v4 cost unchanged, Hive values none; /miners rebuilt
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 06:28:55 +00:00
igneum-labs
575c07c721
Merge ca3-coord-record 0cc932f3 into master (gate: green on 0cc932f3, recorded by tools/ci/pre-push.sh; landed on the build mirror)
2026-10-08 06:27:36 +00:00
igneum-labs
74865e3073
Merge ship-docs-0321 c67a3a77 into master (gate: green on c67a3a77, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
2026-10-08 06:25:18 +00:00
igneum-labs
0cc932f3b9
Counter ASIC 3.0 status: the 5080 Ember tune (the lock worth +40 percent per watt over the stock climb; the knob's case), the knob on release-0.3.24 ( 2caf39c1), the 9070 XT tune (no AMD knob in 0.3.20; 18.9 MH/s at 202 W; the AMD core-clock knob a morning item), the hot-table job the last on PC 1
...
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 06:21:16 +00:00
igneum-labs
c67a3a77f2
release 0.3.22 section 21: the core-clock knob cherry-picked onto release-0.3.24 (the union with the efficient-point ceiling), the measured Ember line from PC 1
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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-08 06:19:49 +00:00