docs/analysis/class-v6/history.md 4.2a: main's 6, 10 and 14 GiB steps checked against every tier's room under the standing 75 percent budget rule (the card-lifetime method, the bench table's 32 measured consumer cards as the population): 6 GiB does not fit the 8 GB tier under the rule (78 to 82 percent of the card; it fits only at a headless-rig reading of about 85 percent), 10 GiB retires the 10, 11 and 12 GB tiers and the Apple 16 GB laptop at year 2, 14 GiB retires the 16 GB tier at year 4, leaving 24 GB and above; beside it the schedule that drops the tiers in the order main named (5.5 GiB at the v6 epoch, 8 GiB at two years, 11 GiB at four) with the year each tier falls and its share of the measured cards (6 GB 3 percent at day one; 8 GB plus the 10 GB RTX 3080 plus Apple 16 GB 25 percent at year 2; 12 GB 22 percent at year 4; 16 GB 28 percent at the 16 GiB step; 24 GB and above hold). Against the chips: the hybrid-bonded or soldered chip sized at launch dies at the first step it cannot carry (the E3's shape, 20 to 27 months) but a maker reading a public consensus field sizes to the step it wants (USD 160 more of GDDR7 on a USD 470 part; about 3x the memory die area for the Jasminer shape); the f = 1 GDDR7 chip's 32 GB board pays USD 0 through 16 GiB and keeps 5.1x; the SRAM store pays capex only at the cache doubling (USD 46 to 111 per die) and keeps 0.92x and 1.86x. The fleet's hashrate-weighted card census is owed. The arithmetic is checked by script against the card-lifetime working sets.
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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