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igneum-labs bcc2db992e Counter ASIC 3.0 item 2: the design, the Mac measurements, the chip-model row and the PC 2 job 
docs/plans/counter-asic-3-derivation.md (the design, the acceptance test, the interpreter, the allowance argument,
the measurements, the PROPOSED reserve entry R0 for 1.13.2, what is owed), docs/analysis/chip-model-v3.md section 6
(the per-day derivation rows at 1.0x to 3x allowances), the bench-log entry, relay/playbooks/ca3-derive-pc2.ps1
(one PC 2 job: self-fetched packs zip, the installed worker through NVRTC, the card off only under test with its
key from settings.json). Verifier 4.875 / 4.944 ms per unit on one M5 Max core under the measure lock against
x8's 2.061 / 2.063; Metal build 29 ms against 22; hash rate equal; bit-exact on Metal and Apple OpenCL.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-06 07:50:01 +00:00
..
ca2-era-pc1.ps1 era layout (Counter ASIC 2.0 layers 4 and 8) behind the class flag, on the ca2-v3 seam: the 7-draw era stream from E_n (stride, interleave, width pinned at 4 B), per-site window draws (dataset, half, quarter at a 256 MiB floor), the strided windowed load address in the interpreter, the acceptance mirror and the three emitters, the interleaved dataset layout riding with the program (memhard::Layout, mh_t/mh_j/mh_addr, Epoch::dataset_word), V3_CLASS with the era drawn inside by generate_from_seed_bytes_program_class, --era / --era-widths on the CLI, six class v3 era packs (packs-ca2-era), tests, the design doc, host.cu/host.c deriving host words through the pack's mh_word, emu/test-layout.sh, the PC 1 playbook 2026-10-05 21:41:33 +00:00
ca2-hot-5090-bench.ps1 hot table (Counter ASIC 2.0 layer 5), measured and not adopted, on the ca2-v3 composed class (squash of tag ca2-cache-history-2026-10-05) 2026-10-05 21:57:39 +00:00
ca2-hot-9070-bench.ps1 hot table (Counter ASIC 2.0 layer 5), measured and not adopted, on the ca2-v3 composed class (squash of tag ca2-cache-history-2026-10-05) 2026-10-05 21:57:39 +00:00
ca3-derive-pc2.ps1 Counter ASIC 3.0 item 2: the design, the Mac measurements, the chip-model row and the PC 2 job 2026-10-06 07:50:01 +00:00
dot4-probe.ps1 Counter ASIC 2.0 layer 7: integer matrix family design (vendor primitives cited: PTX dp4a and mma .u8/.s8, AMD v_dot4_i32_iu8 and WMMA iu8 on RDNA 3 and 4 via LLVM and GPUOpen, CDNA 3 MFMA i8, Metal 4 matmul2d char x char -> int found in MSL 4.1 table 7.3; dot4 and mm8 semantics, reserve entry R1, emulation rule); M5 Max dot4 probe numbers in the bench log; PC playbook dot4-probe.ps1 prepared, not published 2026-10-05 20:12:53 +00:00
mac-smoke.sh Relay: text, files and runnable tasks between the Mac, the PCs and the phone (relay.igneum.network) 2026-10-04 10:04:30 +00:00
miner-v4.ps1 Relay: text, files and runnable tasks between the Mac, the PCs and the phone (relay.igneum.network) 2026-10-04 10:04:30 +00:00
mixer-x4-5090-bench.ps1 mixer x8 candidate beside x4 (coordinator's rule, 5 October 2026 21:30 UTC): LoadClass::MX8 ("mx8", same stream, keys (r m + j + 1) x 0x9E3779B9), the two candidate packs mx8-genesis and mx8-devnet-epoch0 (generator 2 with the class in the id; the vectors are re-cut through the seam after the x4/x8 choice), tests/mixer.rs fuzz takes IGNEUM_MIXER_CLASS, the PC playbooks carry the x8 packs and the gfx1036 fallback; mixer-x4.md: the Metal fuzz row 2026-10-05 22:02:23 +00:00
mixer-x4-9070-bench.ps1 mixer x8 candidate beside x4 (coordinator's rule, 5 October 2026 21:30 UTC): LoadClass::MX8 ("mx8", same stream, keys (r m + j + 1) x 0x9E3779B9), the two candidate packs mx8-genesis and mx8-devnet-epoch0 (generator 2 with the class in the id; the vectors are re-cut through the seam after the x4/x8 choice), tests/mixer.rs fuzz takes IGNEUM_MIXER_CLASS, the PC playbooks carry the x8 packs and the gfx1036 fallback; mixer-x4.md: the Metal fuzz row 2026-10-05 22:02:23 +00:00
mixer-x4-pc1-bench.ps1 mixer x4: the measure session (v2 / x4 / x8 verifier 1.33 / 1.94 / 2.79 ms per unit on a loaded core, 1.45x and 2.1x; the 256 MiB fill 172 to 175 ms; the Metal 1 GiB build flat at 21 ms, latency-bound), the verification-throughput consequences (C19), what is unverified and what is owed; the bench-log entry; the PC 1 two-card playbook; the measured verifier row in the chip model 2026-10-05 22:02:28 +00:00
oneclick-test.ps1 Relay: text, files and runnable tasks between the Mac, the PCs and the phone (relay.igneum.network) 2026-10-04 10:04:30 +00:00
prove-block.ps1 Relay: text, files and runnable tasks between the Mac, the PCs and the phone (relay.igneum.network) 2026-10-04 10:04:30 +00:00
prover-setup.ps1 Relay: text, files and runnable tasks between the Mac, the PCs and the phone (relay.igneum.network) 2026-10-04 10:04:30 +00:00
race-5090.ps1 Fleet learning for the kernel race: the TUNING record, the aggregator, the manifest's tuning object, the PC 1 race job 2026-10-04 19:08:45 +00:00
readwidth-5090-bench.ps1 read-width: packfile accepts a string-seed pack (any even-length hex epoch seed; the seed-word re-derivation still checks it); bench-only playbooks for the second PC round 2026-10-05 20:09:58 +00:00
readwidth-5090.ps1 read-width: CUDA worker --bench and --memprobe, scratch arena from the occupancy capacity; PC playbooks (card under test off in the app, restored after); harness arena label 2026-10-05 20:05:57 +00:00
readwidth-9070-bench.ps1 read-width: packfile accepts a string-seed pack (any even-length hex epoch seed; the seed-word re-derivation still checks it); bench-only playbooks for the second PC round 2026-10-05 20:09:58 +00:00
readwidth-9070.ps1 read-width: CUDA worker --bench and --memprobe, scratch arena from the occupancy capacity; PC playbooks (card under test off in the app, restored after); harness arena label 2026-10-05 20:05:57 +00:00
shard-test.ps1 Evidence: 4 October measurements (live hourly swap, first live lock and the 280 locks since, first GPU proof, one-click worker, generator v2, difficulty oscillation and v2 pending, 12-node propagation and partition, clock skew); rows 29 and 30 added; difficulty and floor claims softened 2026-10-04 13:52:45 +00:00
sweep-5090.ps1 Miner efficiency sweep: hash per watt per NVIDIA card (lever 3) 2026-10-04 20:38:07 +00:00
wsl-setup.ps1 Relay: text, files and runnable tasks between the Mac, the PCs and the phone (relay.igneum.network) 2026-10-04 10:04:30 +00:00