igneum/docs/analysis/class-v6
2026-10-08 19:35:50 +00:00
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floor Class v6 floor lane 4: the RX 7600 (8 GB) measured on PC 1 (13.88 MH/s at 113 W, 8.14 microjoules, the card-in job 15:50 UK) added to the tiers table and the AMD estimates re-based on it; 10 of 10 on build-3 2026-10-08 15:04:38 +00:00
logs Class v6 census: the post-review object's (c''') read (hl-v6-all 4de7b836cc40a4ea, generator 6, PASS: the rule with the floor, 256 of 256 at r 0.129, the window trace standing), with the a326de8ea read beside it 2026-10-08 19:35:50 +00:00
census-packs.md Class v6 census: the post-review object's (c''') read (hl-v6-all 4de7b836cc40a4ea, generator 6, PASS: the rule with the floor, 256 of 256 at r 0.129, the window trace standing), with the a326de8ea read beside it 2026-10-08 19:35:50 +00:00
census-w16-mix.md Class v6 census: the recommendation amended on the coordinator's close (W = 16 dead on energy by floor lane 5's card rows; the order is W = 8 pins, the index fold first, then the re-weight at W = 8 through this harness before it enters) 2026-10-08 13:09:44 +00:00
coexist-rows.md docs: class v6 coexistence rows on an RTX 3060 12 GB and an RTX 4060 8 GB (5.5 GiB miner beside the compressed shard prover, verbatim run-log rows, the reconciliation with the 6 October 8.9 GB row and the 16 GB rule) 2026-10-08 15:48:20 +00:00
coexistence-model.md Class v6 10.0m and 10.0n: the multi-family adversary's whole-machine rows (1.8x the 5090 node-for-node, the bank zero obsolescence credit, capex the larger half of the edge); the coexistence model landed (the board passes six conditions, the die fails five once sunk); the three statements re-read; the connected-state class killed; the window under 1 percent measured 2026-10-08 15:27:51 +00:00
connected-state.md Connected state: the chip rows (the k lane's re-optimised core: 4.4 pJ per lane-op at N5, k 0.71 at the lock), the score (3.3x node-for-node, 3.6x a node ahead; the window moves the chip's edge 1.10x against a 1.25x gate), verdict KILL as a class, what is kept and what v7 tests 2026-10-08 15:28:39 +00:00
family-gate.md Class v6 family gate, the full report: point B's row (0 hot sets at the 64 shape, 5 over 1.2x, the floor refusing 1 of 64) and the 18:00 amendment line (the best-mix genesis table under test) 2026-10-08 14:40:03 +00:00
hardware-future.md Class v6 research lane B: the hardware future, five years out (first cut and the full report in one file) 2026-10-08 10:17:50 +00:00
history.md Class v6 history lane, revision 3: the dataset-floor schedule priced per tier and against the chips (section 4.2a, main's ask of 11:2x UK) 2026-10-08 10:38:53 +00:00
invention.md Class v6 invention: the 5090 rows for the two per-load packs (the sound form costs the card 15 to 20 percent more per shadow instruction than the whole block, +19 W unlocked and +6.6 W at the knee at class v4's count; rank 1's GPU column corrected, the verdict restated with the honest sign) 2026-10-08 11:45:37 +00:00
mixed-fp32.md Class v6 mixed FP32: section 6.1, the k lane's synthesised FP32 rows (FMA lane 3.4 pJ at N3, k 0.65 on the unit, 0.15 blended at the lock); the score 3.2x / 3.5x; the verdict stands 2026-10-08 16:07:14 +00:00
multi-family-adversary.md multi-family adversary: clock stamps read from the Mac 2026-10-08 16:10:22 +00:00