igneum/docs/analysis/class-v6
2026-10-08 13:04:39 +00:00
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logs Class v6 invention: the drawn-era re-read on the fixed instrument b6799782 (the sound per-load form 254 of 256 seeds at 0.819 per candidate under eras, 234 of 256 at 0.927 no-era; the 16 x 27 form dead on both; class v4's shape at sub-version 3's 0.67 on the same binary), the two TSVs, sections 0, 2.1, 3.3 and 4 updated 2026-10-08 13:04:39 +00:00
family-gate.md Class v6 family gate (lane D), first cut: the parameter table with bands and margins, the sampling bound (rule of three, the union bound over the per-era tests' measured miss rates, the stratified corners), the three rings of per-era tests with known-failed shapes and clean-seed costs, the board over the testnet period and the proof-of-testing record format, the honest line; the harness running on the boxes and its first 16-era reading (the era-stride class at 130 to 511 sigma on one address bit in 7 of 16 drawn eras); docs/analysis/class-v6 excluded from the public export 2026-10-08 10:25:17 +00:00
hardware-future.md Class v6 research lane B: the hardware future, five years out (first cut and the full report in one file) 2026-10-08 10:17:50 +00:00
history.md Class v6 history lane, revision 3: the dataset-floor schedule priced per tier and against the chips (section 4.2a, main's ask of 11:2x UK) 2026-10-08 10:38:53 +00:00
invention.md Class v6 invention: the 5090 rows for the two per-load packs (the sound form costs the card 15 to 20 percent more per shadow instruction than the whole block, +19 W unlocked and +6.6 W at the knee at class v4's count; rank 1's GPU column corrected, the verdict restated with the honest sign) 2026-10-08 11:45:37 +00:00