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cryptanalysis
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adv-accept: sweep closed at 796,042 accepted programs, box-hours 15.1, shard logs and frontiers filed
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2026-10-08 08:47:33 +00:00 |
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horizon
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Horizon lane 5, network: block rate, propagation, node cost, bandwidth, pruning and the snapshot path, with the run A schedule and scripts
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2026-10-06 20:52:33 +00:00 |
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mission
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The Igneum Mission: the one page for the project lead and the closed list of twelve (five in flight, seven new, about 290 agent hours, no new consensus rule beyond the three cut branches), the rejected ideas with the line that killed each, what was not run, and the closing line: nothing is added without removing something
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2026-10-07 08:19:29 +00:00 |
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51-percent.md
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Horizon: lane 1 (consensus-security) lands, with the 51 percent paper
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2026-10-06 20:07:43 +00:00 |
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amd-proving.md
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docs/analysis/amd-proving.md: no zkVM proves on AMD (SP1, RISC Zero, Jolt, OpenVM, ICICLE cited), the SP1 CPU prover measured on PC 1 beside the miners (282 s a shard at any size, 30 GB RSS: no CPU tier), the tier consequences and the public line; PC 1 job scripts with the bash -n gate; bench-log entry
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2026-10-05 21:02:59 +00:00 |
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asic-resistance-history.md
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docs/analysis/asic-resistance-history.md: the 2011 to 2026 history of ASIC resistance (31 rows, chip, gain per joule, months held, response), the papers, the chip economics and the market-cap table, ten lessons, the audit of class v2 and the Counter ASIC 2.0 layers, seven ranked additions (partial-store chip row first), nine candidates placed nowhere
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2026-10-05 22:38:17 +00:00 |
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base-fee-floor.md
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Prover mirrors the fee switch: both tables and fees_v1_activation_daa in the shard input, guest re-pinned, devnet runbook for H = 210,000
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2026-10-05 16:24:35 +00:00 |
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block-rate-devnet2.md
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Horizon close: the one page for the project lead (597 words, every lane landed, each item marked done / in 0.3.16 / decision owed), the two standing decisions of 22:3x UK recorded in ledger-decisions.md, lane 5's experiment and ledger-decisions.md brought onto master
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2026-10-06 21:37:31 +00:00 |
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ca3-v4-uniform.md
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Counter ASIC 3.0 gates (hash): AP-F8-1 under the windows-union model. The window layer moves the null from 0.115 to 0.160 percent at f = 0.1 percent (1.39x, not 4.05x); the 153x item is the all-ones value of an or-written load source (site 15, or at 61, load at 63), which the era map sends to item 0xca5b92 exactly and whose next seven items are the seven surviving one-zero-bit sources; the popcount model at the measured bias predicts 77,348 reads against 78,479 and the program's S_0.1 percent at 0.58 against 0.52; a static census of 1,024 chain-shaped v4 programs (tools/ca3-v4-uniform, built and run on igneum-build-1): 96.6 percent carry a lossy-sourced load, 48.5 percent an or-sourced one, 4.9 percent an or chain (p3's class); F8's 1.2x gate fails 96.6 percent; the chip ceiling under rule (c) is 1.067x; the two flip options priced; the v5 bound defined
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2026-10-07 09:26:48 +00:00 |
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card-lifetime-2026-10-05.md
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CI on the merged 0.3.11 tree: MacBook reworded in the analysis prose (the identity check's hostname pattern), a presence check before the kit's first use in the three proving-v1 PC 2 scripts (C32), pc1-cpu-prove.ps1 on the socket check's allow list (the CPU path starts no GPU server)
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2026-10-05 22:44:09 +00:00 |
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chip-model-v3.md
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Public text: the era draw and the reserve are schedule changes, not chip defences; the FPGA ceiling is unmeasured; the stake sentence; the proving arithmetic (Horizon lanes 2 and 7)
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2026-10-06 19:49:15 +00:00 |
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ci-failures-2026-10-06.md
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Kill by exact command line or pid file, never by a name: tools/ci/kill-by-name-check.sh in the gate; the 36 pgrep/pkill literals in the tree fixed
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2026-10-06 22:10:31 +00:00 |
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difficulty-2026-10-03.md
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Difficulty: timestamp attack fixed in spec 2.3, simulator, analysis addendum, ledger M23
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2026-10-04 00:56:20 +00:00 |
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difficulty-2026-10-04-oscillation.md
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Difficulty: the live oscillation of 4 October, its cause, the DAG replay and rule v2 (reference window 600 behind a height switch)
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2026-10-04 13:26:23 +00:00 |
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economy-2026-10-04.md
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Economy: agent-based mining-versus-proving simulation, six stress scenarios, lever study, analysis and bench entry
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2026-10-03 23:16:46 +00:00 |
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era-vdf-2026-10-07.md
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Era VDF lane (7 October 2026): spec 04 sections 4.2, 4.4, 4.5 and 4.6 completed for the era path (the scheme byte and the hash-chain fallback, the cut rule under the O-4.3 reading, the day-of-blues input, the delay, the seed, the era constants as measured), spec 01 section 1.13.1 and era-layout.md section 8 updated, open items O-4.8 closed and O-4.10 to O-4.12 added, FUD ledger F11 updated, two decisions for the project lead in ledger-decisions.md, the record docs/analysis/era-vdf-2026-10-07.md (what was built, the parameters and measured rates, the harness gate with both runs, the cut rule for the finality lane, the verify gate, the tiers), the F7 re-roll harness against the real era cut (tools/era-vdf/reroll.mjs: --vdf off fires 6 of 6, --vdf on silent 0 of 6; the adversary evaluates asynchronously with the node's own code and is found by the node's own log line), the fast-time file's era fields
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2026-10-07 15:24:22 +00:00 |
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hashrate-decay-2026-10-03.md
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Hash-rate decay on the RTX 5090: diagnosis, Metal reproduction, proposed Seeder fix
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2026-10-03 23:31:23 +00:00 |
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hashrate-decay-2026-10-03.patch
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Hash-rate decay on the RTX 5090: diagnosis, Metal reproduction, proposed Seeder fix
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2026-10-03 23:31:23 +00:00 |
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horizon-2026-10.md
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Horizon: "Decisions ready for the project lead" section with the two one-page verdicts quoted verbatim (tail emission f66d210, ledger E22; vote or burn 5c7bdc8), each the project lead's decision owed, and the two open questions being implemented (the N ladder list, 18 decimals)
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2026-10-06 22:16:30 +00:00 |
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income-tiers.md
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Income per tier: the three tariffs are USD 0.05, 0.10 and 0.25 a kWh (cheap industrial, US retail, UK retail; the coordinator's answer, 7 October 2026), the table regenerated, the cost per mined IGN shown to three significant figures
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2026-10-07 08:54:44 +00:00 |
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int8-matrix-family.md
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Counter ASIC 2.0 layer 7: RTX 5090 and RX 9070 XT dot4 numbers from PC 1 (job run-dot4-20261005): dp4a 7.45 T/s on the 5090 via inline PTX, v_dot4_i32_iu8 0.66 T/s on the 9070 XT via the clang builtin in Adrenalin OpenCL C, signed emulation 7.1x / 1.46x / 4.7x the ALU step on NVIDIA / AMD / Apple; no PC platform lists cl_khr_integer_dot_product
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2026-10-05 20:31:33 +00:00 |
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latency-shadow-2026-10-06.md
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Counter ASIC 3.0 item 8: the RTX 5090 rows, the chip side on the measured 11 pJ per op, the verdict
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2026-10-06 08:44:57 +00:00 |
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m16-recompute-attacker-2026-10-05.md
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FUD sweep round 6 (evening, 5 October): eleven rolled-out fixes moved to Fixed with live measurement lines, F21/F22 shipped but switch not thrown, M20 closed on the 0.3.5 merge; P14 one base-fee definition in spec 05; M16 recompute-attacker cost model; C4 overlay-against-GHOSTDAG runner
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2026-10-05 16:02:02 +00:00 |
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prover-floor.md
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Prover floor: sweep 1 table and reading (the Setup-time keys bind at 12.7 GB)
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2026-10-05 22:42:17 +00:00 |
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prover-tiers-real-cards.md
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Prover tiers on real cards (eleven rented cards, patched SP1 server) and the rental cost of hash: the analysis file and its two bench-log entries, cut from gpu-fleet for the site
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2026-10-06 19:21:28 +00:00 |
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proving-methods.md
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CI on the merged 0.3.11 tree: MacBook reworded in the analysis prose (the identity check's hostname pattern), a presence check before the kit's first use in the three proving-v1 PC 2 scripts (C32), pc1-cpu-prove.ps1 on the socket check's allow list (the CPU path starts no GPU server)
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2026-10-05 22:44:09 +00:00 |
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scratch-soundness.md
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ca2-soundness: docs/analysis/scratch-soundness.md alone (its code is already in the tree through the mixer merge; the branch merge conflicted there); release-0.3.11 plan: C37 and C38
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2026-10-05 23:04:38 +00:00 |
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security-budget.md
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Evidence page, end-to-end proving standard, funding plan, security-budget stress, payment routes
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2026-10-03 22:35:03 +00:00 |
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sram-mirror.md
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Counter ASIC 2.0 layer 6, revision 2: shipped cache-die density (AMD V-Cache 64 MB on 41 mm^2 at 7 nm, Hot Chips 33) as the headline column beside the bit-cell lower bound; mirror 106 to 164 mm^2 and $30 to $56 per die at 256 MiB; year 0 to 10, hot-table and option tables redone; latency citations section (MEMSYS 2018, Chang 2017, mining-chip memory types)
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2026-10-05 20:20:46 +00:00 |
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weak-program-census-2026-10-03.md
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Mac app: dial the public seed node first, the home node second
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2026-10-03 22:28:58 +00:00 |
