660f0eb16c
Exporter writes kernel.cl next to kernel.cu (same instruction list; memory-hard core emitted in a third, OpenCL C dialect with the same literals as memhard.h). Pack headers are now C99-safe so a plain C host can include them. proto-opencl/host.c: C99 + OpenCL 1.2 API, device list, runtime build, cache fill and FNV check, dataset build and self-test, 3 vector warps standalone and in batch, bench and sweep as host.cu, whole-batch fingerprint. The 32-lane exchange is sub_group_shuffle_xor only when the queried sub-group size for a 32-item work-group is exactly 32; otherwise a local-memory exchange with one barrier per exchange, so wave64 hardware cannot change the hash (WAVEFRONT.md). build.sh (macOS, Linux), build.bat (MSVC), README with the exact AMD-rig commands. Proven without AMD silicon: Apple OpenCL 1.2 on the M5 Max 96/96 on all three packs (45.0 Mhash/s at 1 GiB, Apple number, not AMD); pocl 7.2 CPU device 96/96 on both exchange paths including the real sub_group_shuffle_xor text; CPU emulator 7 configurations incl. 64-wide sub-groups, identical fingerprint f99fb375b3abeaf5 everywhere. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
49 lines
2.4 KiB
C++
49 lines
2.4 KiB
C++
// CPU emulation shim: the slice of OpenCL C that the generated kernel.cl uses, as C++.
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// kernel.cl includes this file when __OPENCL_VERSION__ is not defined (its own prelude does that), so the exact
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// generated text compiles with clang++ or g++ and runs on host threads. emu_main.cpp supplies the runtime below.
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// The sub-group width is a runtime setting (32 or 64) so the kernel can be checked as a 64-wide hardware wave
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// (AMD GCN/CDNA, RDNA in wave64) would run it: two logical 32-lane units in one wave. Not part of any deliverable
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// that runs on a GPU, and it says nothing about AMD hardware; only PASS/FAIL matters, rates are noise.
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#pragma once
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#include <cstdint>
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#include <cstddef>
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typedef unsigned int uint;
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typedef unsigned long ulong;
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static_assert(sizeof(uint) == 4, "uint must be 32 bits");
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static_assert(sizeof(ulong) == 8, "ulong must be 64 bits (LP64 host: macOS or Linux)");
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// Address-space qualifiers and the kernel attribute mean nothing on the host.
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#define __kernel
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#define __global
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#define __constant
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#define __local
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#define __private
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#define CLK_LOCAL_MEM_FENCE 1
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#define CLK_GLOBAL_MEM_FENCE 2
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#define IGNEUM_KERNEL_HASH
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// Work-group local memory: one arena per work-group instance, shared by its work-items (emu_local_words).
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#define IGNEUM_LOCAL_WORDS(name, n) uint* name = emu_local_words((uint)(n))
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// Work-item functions (thread-local state set by emu_launch).
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size_t get_global_id(uint dim);
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size_t get_local_id(uint dim);
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size_t get_group_id(uint dim);
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size_t get_local_size(uint dim);
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size_t get_global_size(uint dim);
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uint get_sub_group_size(void);
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uint get_sub_group_local_id(void);
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uint get_sub_group_id(void);
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uint get_num_sub_groups(void);
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// Synchronisation and exchange.
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void barrier(int flags); // work-group barrier
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uint sub_group_shuffle_xor(uint v, uint mask); // cl_khr_subgroup_shuffle semantics over the emulated sub-group
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uint intel_sub_group_shuffle_xor(uint v, uint mask); // same semantics
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uint sub_group_broadcast(uint v, uint lane);
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uint* emu_local_words(uint n);
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// Integer built-ins with OpenCL semantics.
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static inline uint mul_hi(uint a, uint b) { return (uint)(((uint64_t)a * (uint64_t)b) >> 32); }
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// rotate(v, i): bits shifted left by i modulo the bit width (OpenCL C spec 6.3 and 6.12.3).
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static inline uint rotate(uint x, uint n) { n &= 31u; return n == 0u ? x : ((x << n) | (x >> (32u - n))); }
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