ccd5a366c1
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> Documents-only replay of9009ed0f4(bfccc26ed4) for the box mirror master
10 lines
419 B
Tcl
10 lines
419 B
Tcl
current_design scratch8k
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set clk_name core_clock
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set clk_port_name clk
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set clk_period 1500
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set clk_io_pct 0.2
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set clk_port [get_ports $clk_port_name]
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create_clock -name $clk_name -period $clk_period $clk_port
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set non_clock_inputs [all_inputs -no_clocks]
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set_input_delay [expr $clk_period * $clk_io_pct] -clock $clk_name $non_clock_inputs
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set_output_delay [expr $clk_period * $clk_io_pct] -clock $clk_name [all_outputs]
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