igneum/docs/analysis/class-v6
2026-10-08 10:26:13 +00:00
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hardware-future.md Class v6 research lane B: the hardware future, five years out (first cut and the full report in one file) 2026-10-08 10:17:50 +00:00
history.md Class v6 history lane, first cut: every ASIC-resistant proof of work and its chips by mechanism, the four-layer mapping with a number per chip class, and the three lessons that bind on v6 2026-10-08 10:19:10 +00:00