igneum-labs
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e4e4ea7cf4
|
Counter ASIC 3.0 status: the build-server rule passed to every lane
|
2026-10-06 17:53:17 +00:00 |
|
igneum-labs
|
ca36dd8f57
|
Counter ASIC 3.0 status: the RTX 4070 ladder (holds to 200,000 ops at its tune point; binds at 330,700 under the 160 W cap)
|
2026-10-06 17:49:44 +00:00 |
|
igneum-labs
|
6d0964bff9
|
Counter ASIC 3.0 status: item 6's RX 9070 XT column (the card alone; every family 0.75x to 1.30x except perm and mm8; R3 unmoved)
|
2026-10-06 17:36:21 +00:00 |
|
igneum-labs
|
38164cc0ce
|
Counter ASIC 3.0: item 2's 9070 XT rows (bit-exact, +2.0 s OpenCL compile per pack, no rate cost)
|
2026-10-06 17:30:00 +00:00 |
|
igneum-labs
|
e2e75945b7
|
Counter ASIC 3.0 status: G2 AMD green (1,024 of 1,024 on both packs, re-hashed here)
|
2026-10-06 17:23:43 +00:00 |
|
igneum-labs
|
e2cf561582
|
Counter ASIC 3.0 status: family run d (AMD compile answers; the loaded-card ratios unusable; run e with the card alone)
|
2026-10-06 17:21:43 +00:00 |
|
igneum-labs
|
44d13122bf
|
Counter ASIC 3.0 status: the 9070 XT back on 8 identities (rate unchanged)
|
2026-10-06 17:08:40 +00:00 |
|
igneum-labs
|
2448bd1903
|
Counter ASIC 3.0 status: the identities job's parse fault and the new CI guard
|
2026-10-06 17:03:46 +00:00 |
|
igneum-labs
|
22d98c7021
|
Counter ASIC 3.0 status: job 2 ran on gfx1036 (re-run owed), the reset and identities findings
|
2026-10-06 17:01:06 +00:00 |
|
igneum-labs
|
df91c1c094
|
Counter ASIC 3.0 status: PC 2 held for the 0.3.14 suite, PC 1's queue and the update order
|
2026-10-06 16:54:15 +00:00 |
|
igneum-labs
|
d7306e506a
|
Counter ASIC 3.0 status: the two cut preconditions (staging rehearsal, miner-signalled activation) as gates; the line for the project lead re-worded, no date until 0.3.14 runs a clean day
|
2026-10-06 16:47:12 +00:00 |
|
igneum-labs
|
3a23c97bcb
|
Counter ASIC 3.0 status: the blocker closed (G4 re-run with the id assertion green), every gate green, the line for the project lead confirmed
|
2026-10-06 16:45:52 +00:00 |
|
igneum-labs
|
4bcced89ac
|
Merge branch 'ca3-v4-node' into ca3-coord
|
2026-10-06 16:44:27 +00:00 |
|
igneum-labs
|
2e7a2278b6
|
Counter ASIC 3.0 gates (node): the program id carries the class: G4 re-run GREEN with the id assertion (every v4 epoch's id = the CLI's class v4 id, differs from the same-seed v3 id; the assertion's failed case fails on that one check), the seven re-exported packs' Metal fingerprints equal the hash lane's table, G5 workers rebuilt from the fix
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:43:46 +00:00 |
|
igneum-labs
|
6976a9337a
|
Counter ASIC 3.0 status: the hash lane green on the id fix (6514e2b merged)
|
2026-10-06 16:40:09 +00:00 |
|
igneum-labs
|
089d1083cc
|
Merge branch 'ca3-v4-hash' into ca3-coord
|
2026-10-06 16:39:24 +00:00 |
|
igneum-labs
|
6514e2b354
|
Counter ASIC 3.0 gates (hash): follow-up 1 on the program-id fix (ceaccac merged): crate suite 97 of 97, the seven v4 packs re-exported byte-identical (generator 4, id c120d7963abdcd96), fingerprints unchanged on Metal and Apple OpenCL, Mac G2 16 x 1,024 of 1,024 through the v4 class token, the harness 4 of 4 on the class and on the era with the id assert_ne holding; the job scripts take the class token from the pack
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:38:48 +00:00 |
|
igneum-labs
|
95f7bff65e
|
Counter ASIC 3.0 status: the program-id fix merged (ceaccac), the re-runs open
|
2026-10-06 16:26:11 +00:00 |
|
igneum-labs
|
2c71997e32
|
Counter ASIC 3.0 status: AMD G2 job ready (chain-seed packs, own kit)
|
2026-10-06 16:22:31 +00:00 |
|
igneum-labs
|
171a7ce45b
|
Counter ASIC 3.0 status: every gate green on the hash, the program-id blocker on the cut, the one line for the project lead
|
2026-10-06 16:18:08 +00:00 |
|
igneum-labs
|
dd104dbd4f
|
Merge branch 'ca3-v4-node' into ca3-coord
|
2026-10-06 16:16:21 +00:00 |
|
igneum-labs
|
e9e18f72ba
|
Merge branch 'ca3-v4-hash' into ca3-coord
|
2026-10-06 16:16:21 +00:00 |
|
igneum-labs
|
b65ff23d83
|
Counter ASIC 3.0 gates (hash): the RTX 5090 G1 and G2 JSON summaries
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:15:17 +00:00 |
|
igneum-labs
|
512f97784a
|
Counter ASIC 3.0 gates (hash): the RTX 5090 G1 and G2 evidence from the collected job.log (eight fingerprints equal to the Mac's, 8 x 1,024 of 1,024); hash-gates.md and the bench-log entry closed
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:14:08 +00:00 |
|
igneum-labs
|
d91ab26786
|
Counter ASIC 3.0 gates (node): G6 row, the two crates whose lines the relay upload does not carry
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:10:30 +00:00 |
|
igneum-labs
|
b3784aa9f7
|
Counter ASIC 3.0 gates (node): G4, G4b, G5 and G6 GREEN for class v4 (the three fast-time summaries incl. the known-failed case, node-gates.md, counter-asic-3-node.md)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:10:00 +00:00 |
|
igneum-labs
|
54b4c2f049
|
Counter ASIC 3.0 gates (hash): the gate directory (hash-gates.md, G1 Mac, G2 Mac, G3 and verifier JSON) and the bench-log entry; the RTX 5090 G1 rows pending the collected job.log
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 16:07:55 +00:00 |
|
igneum-labs
|
03060854f6
|
Counter ASIC 3.0 status: job 1 closed (G1 AMD green, the 9070 XT ladder flat to 330,700 ops, watts owed)
|
2026-10-06 15:58:03 +00:00 |
|
igneum-labs
|
c7af501e1a
|
Counter ASIC 3.0 status: G1 AMD green on the candidate pack (interim, job 1 running)
|
2026-10-06 15:52:47 +00:00 |
|
igneum-labs
|
2383cf6dc2
|
Counter ASIC 3.0 status: the Ember run 5 rows for the 5090 (the cap never binds, 0.41 MH per W flat)
|
2026-10-06 15:45:39 +00:00 |
|
igneum-labs
|
2b81f25c5f
|
Counter ASIC 3.0 status: the PC 1 AMD scripts ready (checks pass, kit verified)
|
2026-10-06 15:40:42 +00:00 |
|
igneum-labs
|
b58f8b5433
|
Counter ASIC 3.0 status: the gate run opened on mx8+sh256x27 (the project lead 16:50 UTC), the gate table
|
2026-10-06 15:38:44 +00:00 |
|
igneum-labs
|
b573311182
|
Counter ASIC 3.0 status: the PC 1 AMD job queue (prepared, not published)
|
2026-10-06 15:13:22 +00:00 |
|
igneum-labs
|
b417526556
|
Counter ASIC 3.0 status: the close (items 6, 7 and 8 closed; the chip model before and after; the class v4 candidate mx8+sh256x27 ready for the gate run; nine decisions for the project lead; the owed list)
|
2026-10-06 08:48:18 +00:00 |
|
igneum-labs
|
587f2bc92c
|
Merge branch 'ca3-reserve' into ca3-coord
|
2026-10-06 08:45:48 +00:00 |
|
igneum-labs
|
1423bf83f6
|
Counter ASIC 3.0 items 6 and 7: the RTX 5090 step-cost rows (PC 2 job run-ca3-family-pc2-20261006, every family bit-exact, mm8 included) in the bench-log and the reserve document
|
2026-10-06 08:45:02 +00:00 |
|
igneum-labs
|
2049989640
|
Merge branch 'ca3-derive' into ca3-coord
# Conflicts:
# docs/bench-log.md
|
2026-10-06 08:31:10 +00:00 |
|
igneum-labs
|
117dc0d162
|
Counter ASIC 3.0 item 2: the RTX 5090 rows from PC 2 (bit-exact on CUDA, +1.1 s NVRTC per pack, the card-off key finding)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 08:30:15 +00:00 |
|
igneum-labs
|
89a9e45604
|
Counter ASIC 3.0 status: the detector's two calibration findings answered (3150fc0 merged; max r 0.10)
|
2026-10-06 08:29:28 +00:00 |
|
igneum-labs
|
3250669bdb
|
Counter ASIC 3.0 status: PC 2 clear, the detector and vendor-share dry rows on the live tables, the restart constraint
|
2026-10-06 08:26:52 +00:00 |
|
igneum-labs
|
c6f803659a
|
Counter ASIC 3.0 status: the marker guard exists in CI already
|
2026-10-06 08:25:02 +00:00 |
|
igneum-labs
|
5c5090b3bf
|
Counter ASIC 3.0 status: items 6 and 7 merged (5090 rows queued), the marker slip recorded
|
2026-10-06 08:24:50 +00:00 |
|
igneum-labs
|
b324a0b9f1
|
Merge branch 'ca3-reserve' into ca3-coord
# Conflicts:
# docs/bench-log.md
# tools/observer/observer.mjs
|
2026-10-06 08:24:29 +00:00 |
|
igneum-labs
|
d51a74fc43
|
Merge ca3-shadow (item 8's Mac rows) into ca3-coord: LoadClass carries derive_len and shadow; igneum-pow suite 96 passed
|
2026-10-06 08:11:03 +00:00 |
|
igneum-labs
|
f1d64b2d67
|
Counter ASIC 3.0 status: the 5090 draws about 290 W at the hash, cap floor 400 W, clocks are the lever (item 8's job)
|
2026-10-06 07:59:42 +00:00 |
|
igneum-labs
|
248486e131
|
Counter ASIC 3.0 status: item 2's verifier headroom table and the crate suite
|
2026-10-06 07:51:42 +00:00 |
|
igneum-labs
|
13fde3b9e4
|
Merge branch 'ca3-derive' into ca3-coord
|
2026-10-06 07:51:42 +00:00 |
|
igneum-labs
|
c2e36ab0b7
|
Counter ASIC 3.0 status: PC 2 clear about 08:35Z, the job order
|
2026-10-06 07:51:36 +00:00 |
|
igneum-labs
|
e05b17e741
|
Counter ASIC 3.0 status: item 2 interim (GO as reserve, NO-GO genesis-live at dr736), PC 2 clear about 08:35Z
|
2026-10-06 07:51:15 +00:00 |
|
igneum-labs
|
bf625e5eb5
|
Counter ASIC 3.0 item 2: the verifier headroom per class under the 10 ms gate (the budget item 8 shares)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-06 07:51:13 +00:00 |
|