igneum-labs
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e2e75945b7
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Counter ASIC 3.0 status: G2 AMD green (1,024 of 1,024 on both packs, re-hashed here)
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2026-10-06 17:23:43 +00:00 |
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igneum-labs
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e2cf561582
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Counter ASIC 3.0 status: family run d (AMD compile answers; the loaded-card ratios unusable; run e with the card alone)
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2026-10-06 17:21:43 +00:00 |
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igneum-labs
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44d13122bf
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Counter ASIC 3.0 status: the 9070 XT back on 8 identities (rate unchanged)
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2026-10-06 17:08:40 +00:00 |
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igneum-labs
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2448bd1903
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Counter ASIC 3.0 status: the identities job's parse fault and the new CI guard
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2026-10-06 17:03:46 +00:00 |
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igneum-labs
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22d98c7021
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Counter ASIC 3.0 status: job 2 ran on gfx1036 (re-run owed), the reset and identities findings
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2026-10-06 17:01:06 +00:00 |
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igneum-labs
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df91c1c094
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Counter ASIC 3.0 status: PC 2 held for the 0.3.14 suite, PC 1's queue and the update order
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2026-10-06 16:54:15 +00:00 |
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igneum-labs
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d7306e506a
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Counter ASIC 3.0 status: the two cut preconditions (staging rehearsal, miner-signalled activation) as gates; the line for the project lead re-worded, no date until 0.3.14 runs a clean day
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2026-10-06 16:47:12 +00:00 |
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igneum-labs
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3a23c97bcb
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Counter ASIC 3.0 status: the blocker closed (G4 re-run with the id assertion green), every gate green, the line for the project lead confirmed
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2026-10-06 16:45:52 +00:00 |
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igneum-labs
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6976a9337a
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Counter ASIC 3.0 status: the hash lane green on the id fix (6514e2b merged)
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2026-10-06 16:40:09 +00:00 |
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igneum-labs
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95f7bff65e
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Counter ASIC 3.0 status: the program-id fix merged (ceaccac), the re-runs open
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2026-10-06 16:26:11 +00:00 |
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igneum-labs
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2c71997e32
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Counter ASIC 3.0 status: AMD G2 job ready (chain-seed packs, own kit)
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2026-10-06 16:22:31 +00:00 |
|
igneum-labs
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171a7ce45b
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Counter ASIC 3.0 status: every gate green on the hash, the program-id blocker on the cut, the one line for the project lead
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2026-10-06 16:18:08 +00:00 |
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igneum-labs
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03060854f6
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Counter ASIC 3.0 status: job 1 closed (G1 AMD green, the 9070 XT ladder flat to 330,700 ops, watts owed)
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2026-10-06 15:58:03 +00:00 |
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igneum-labs
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c7af501e1a
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Counter ASIC 3.0 status: G1 AMD green on the candidate pack (interim, job 1 running)
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2026-10-06 15:52:47 +00:00 |
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igneum-labs
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2383cf6dc2
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Counter ASIC 3.0 status: the Ember run 5 rows for the 5090 (the cap never binds, 0.41 MH per W flat)
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2026-10-06 15:45:39 +00:00 |
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igneum-labs
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2b81f25c5f
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Counter ASIC 3.0 status: the PC 1 AMD scripts ready (checks pass, kit verified)
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2026-10-06 15:40:42 +00:00 |
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igneum-labs
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b58f8b5433
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Counter ASIC 3.0 status: the gate run opened on mx8+sh256x27 (the project lead 16:50 UTC), the gate table
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2026-10-06 15:38:44 +00:00 |
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igneum-labs
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b573311182
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Counter ASIC 3.0 status: the PC 1 AMD job queue (prepared, not published)
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2026-10-06 15:13:22 +00:00 |
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igneum-labs
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b417526556
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Counter ASIC 3.0 status: the close (items 6, 7 and 8 closed; the chip model before and after; the class v4 candidate mx8+sh256x27 ready for the gate run; nine decisions for the project lead; the owed list)
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2026-10-06 08:48:18 +00:00 |
|
igneum-labs
|
2049989640
|
Merge branch 'ca3-derive' into ca3-coord
# Conflicts:
# docs/bench-log.md
|
2026-10-06 08:31:10 +00:00 |
|
igneum-labs
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89a9e45604
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Counter ASIC 3.0 status: the detector's two calibration findings answered (3150fc0 merged; max r 0.10)
|
2026-10-06 08:29:28 +00:00 |
|
igneum-labs
|
3250669bdb
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Counter ASIC 3.0 status: PC 2 clear, the detector and vendor-share dry rows on the live tables, the restart constraint
|
2026-10-06 08:26:52 +00:00 |
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igneum-labs
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c6f803659a
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Counter ASIC 3.0 status: the marker guard exists in CI already
|
2026-10-06 08:25:02 +00:00 |
|
igneum-labs
|
5c5090b3bf
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Counter ASIC 3.0 status: items 6 and 7 merged (5090 rows queued), the marker slip recorded
|
2026-10-06 08:24:50 +00:00 |
|
igneum-labs
|
d51a74fc43
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Merge ca3-shadow (item 8's Mac rows) into ca3-coord: LoadClass carries derive_len and shadow; igneum-pow suite 96 passed
|
2026-10-06 08:11:03 +00:00 |
|
igneum-labs
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f1d64b2d67
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Counter ASIC 3.0 status: the 5090 draws about 290 W at the hash, cap floor 400 W, clocks are the lever (item 8's job)
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2026-10-06 07:59:42 +00:00 |
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igneum-labs
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248486e131
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Counter ASIC 3.0 status: item 2's verifier headroom table and the crate suite
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2026-10-06 07:51:42 +00:00 |
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igneum-labs
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c2e36ab0b7
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Counter ASIC 3.0 status: PC 2 clear about 08:35Z, the job order
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2026-10-06 07:51:36 +00:00 |
|
igneum-labs
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e05b17e741
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Counter ASIC 3.0 status: item 2 interim (GO as reserve, NO-GO genesis-live at dr736), PC 2 clear about 08:35Z
|
2026-10-06 07:51:15 +00:00 |
|
igneum-labs
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8521002592
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Counter ASIC 3.0 status: items 4 and 5 closed, the owed list opened
|
2026-10-06 07:48:56 +00:00 |
|
igneum-labs
|
b9f314d8e8
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Counter ASIC 3.0 status: item 6's Mac step costs (interim)
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2026-10-06 07:36:58 +00:00 |
|
igneum-labs
|
89df0892b8
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Counter ASIC 3.0 status: the two claim drafts for the project lead with the rows that bound them (main's steering)
|
2026-10-06 07:35:09 +00:00 |
|
igneum-labs
|
522bc1d570
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Counter ASIC 3.0 status: item 1 closed (verdict over 2x, the f = 1 chip), item 8 (latency-shadow program work) opened
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2026-10-06 07:33:26 +00:00 |
|
igneum-labs
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25edaee1e4
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Counter ASIC 3.0: mixer_mult = 8 in spec 1.13.1 and mixer-x4.md section 2 (item 3's finding); item 3 closed in the status file
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2026-10-06 07:31:02 +00:00 |
|
igneum-labs
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dc83168fea
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Counter ASIC 3.0 status: the run opened 07:3x UTC, machines and rules, five workers
|
2026-10-06 07:20:17 +00:00 |
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