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igneum-labs
d76cd38bef Counter ASIC 3.0 status: the STOP on the pin at 13:29 (the fast-time pairing FAIL on an attempt-3 seed), its cause (the 0.3.25 worktree's pre-freeze igneum-pow copy under the paths override; the live network fingerprinted ON the freeze, cbc5bd0a), rule 19 (the build-time fingerprint refusal, packaging/pow-freeze.txt), the rebuilt shas 6ccaf9e9 and c9ad753a with the 90,000 ceiling and digest 2066aa57, the testnet re-cut 3ffcf83b, lane D's fan-out, the attack pass's twelve-chunk split, the explorer re-pointed at node1-dn3 and the 4464 chain id served, the counter-asic-4 docs landing 6af12f08 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 12:47:21 +00:00
igneum-labs
77cae33ee4 Counter ASIC 3.0 status: the pin's node sha d5b68fae (the admission height fix, the partition class) every gate green, the matrix six of six, the fast-time PASS on 42ce0f07; the epoch-19 reference block 28,462 as the fleet's census gate and the observer's drift; the founder's clock rule and every lane's clock pulled; the Forgejo landing rule; lane D's shape-256 exhaustion correction; the SRAM floor lane's row (13:18); the DEX lane's close (16cf71cd) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 12:27:47 +00:00
igneum-labs
02bc398552 Merge ca3-coord-record e159dd28 into master (gate: green on e159dd28, recorded by tools/ci/pre-push.sh; landed on the build mirror) 2026-10-08 12:13:44 +00:00
igneum-labs
e159dd28cc Counter ASIC 3.0 status: Devnet 3 stalled at the class v5 floor at 12:48 BST (the fleet's workers without the kit's generator-5 worker; --exec-rpc) and crossed clean at 12:57:40, the pairing checked three ways, the worker-smoke gate rule; the pin's node sha 5f316c21 (the chain-id answer) every gate green; the research lane's section 10 and the two floor rows; kit b's 5090 rows (the x16 draw free on the GPU, the size term real at the knee); the 9070 XT row served (5fd703f6); the attack pass's census split; the deploys 9100269f, 5fd703f6 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 12:06:07 +00:00
igneum-labs
40be3175af Merge master 5fd703f6 into wallet-bridge (master moved 24 commits during the landing's gate) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 11:59:16 +00:00
igneum-labs
92b42379dd Standing rule (main's word, 8 October 2026, 12:5x UK): no kill by name on the Mac, pid file only, ad-hoc shell lines included; Counter ASIC 3.0 status: the node lane's named commit 42ce0f07 (four node fixes incl. the proof-map window, the OOM class behind the seed outage), the fleet census (36 on population A, 21 stale re-walking), the research lane's 2ae69eb4 (chip-model 5.12, the class v6 document through section 9), lane D's move to build-3 and its lossy-share curve, the F8-256 PASS, the hash lane's v6 packs rows and the byte-seed export lesson, the shipper's 12:33 line, the pkill class 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 11:46:11 +00:00
igneum-labs
112c16fccc The wallet line's text under master's founder scrub: the name replaced in the README, updater.rs's comment, the three wallet plan documents and the capture script (the files predate the scrub; the facts stay) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 11:36:47 +00:00
igneum-labs
7a1fb95cb5 Merge master into wallet-bridge (the wallet's line meets master for the landing of the page bridge) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>

# Conflicts:
#	packaging/ota/publish-manifest.sh
#	site/index.html
#	site/wallet.html
 2026-10-08 11:33:30 +00:00
igneum-labs
bebb967029 Counter ASIC 3.0 status: the 3bb57640 deploy read back, the 0.3.25 pre-pin matrix green on four boxes, the 9070 XT grid on the AMD knob (run-ca3-pc1-amd-grid-9070-20261008-b: 149 W at 18.96 MH/s, both floors, the knob a watts lever only, the two 5090 denominators), the Arc default at 12:30 (pairing dba17a0a, kit 65b47211, Intel held out), the explorer deploys 43547048, 7dddf190 and af873d4b, the /build lane's close, lane D's 24,000-era coverage (61 of 5,000 at the lossy corner against 0 of 19,000), the node lane's missed 12:30 clock and the gate-priority lesson, main's census correction 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 11:30:51 +00:00
igneum-labs
43547048be Merge explorer-dn3 91b64b80 into master (gate: green on 91b64b80, recorded by tools/ci/pre-push.sh; landed on the build mirror) 2026-10-08 11:05:43 +00:00
igneum-labs
91b64b809a Merge remote-tracking branch 'build/master' into explorer-dn3 
# Conflicts:
#	site/build.mjs
 2026-10-08 10:58:52 +00:00
igneum-labs
af22135f6e Counter ASIC 3.0 status: the new gate on the pin (the reorg unwind), lane D's 12:00 coverage (the exhaustion break at the lossy corner; the bit-level era-stride class at half the family's epochs), the v6 cost rows, the drift class read from node1's log and its fix, main's words (the band, the fold, the served sentence corrected today, Apple split by size), the genesis gate answered on build-1 with the re-execution measured at 7 min 30 s, lane A's schedule flag and lane C's instrument finding (the per-load class reopened), the served corrections (0defaba7, 3bb57640), the 11:53 deploy, the four-box load line at 11:55 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 10:56:33 +00:00
igneum-labs
cb70a8fa60 Merge remote-tracking branch 'build/master' into explorer-dn3 2026-10-08 10:34:09 +00:00
igneum-labs
cf521c467d Counter ASIC 3.0 status: the whole 60x file (six keys) landed on both lines, the index fold as a class v6 design row, class v5 level with v4 at the 5090's knee (the knee stands, the note off, the A4000's loss a cap effect), lane B's SRAM-store and HBM4E readings and main's three orders on them, the shipper's three readings and the cut tip edf77203, lane A's cut and verdict (the stored-dataset chip closed by no layer; the floor and a per-tier ceiling the numbers) with main's schedule to price, the snapshot digest stamp and the genesis difference as a gate on the pin, main's words 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 10:32:55 +00:00
igneum-labs
6821b6862e Counter ASIC 3.0 status: main's word on the two reds (the detach in 0.3.25 if green by 12:15), the day-key scan to 2^28 PASS, the sweep reruns read as none, the attack-pass branch merged and pushed, the family gate's first coverage (16 eras; the index-bit bias firing at address bit R on 7 of 16 drawn eras, a class v6 design row: load_index's form, not a floor; the bucket bound in sigma), the ota test literal fixed (f1a8102a, the detach rides 0.3.25) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 10:24:10 +00:00
igneum-labs
960f081ad2 Devnet 3 explorer: transactions (/tx/<hash>), accounts (balance, nonce, code, 7 days of transactions), the proving view (/proving), the DAG picture and the verified badge (the covering certificate re-checked in the browser with site/verify) on /explorer and /block; class and lock state per block; /api/explorer gains ?tx, ?txs, ?proving, ?stats, ?dag; the dn3_ default for /api/explorer, /api/stats, /api/supply and /api/checkpoint (?index=N); replaced chain blocks read as such against the indexer 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 10:24:03 +00:00
igneum-labs
0d7ecc6432 Counter ASIC 3.0 status: the founder's load order on the four boxes and its placement (lane D's family sampling, the attack families at scale, lane C's packs, the pin matrix, the cross builds), the drift class settled by a fresh-walk node, the pin candidate e0644958 confirmed, the Windows installer class and the detach fix, the tiers' class-flip pair gated (081b3ba7), the rpc up, two reds on the release line from the first ten minutes of the load order (the missing 60x field; the detach's test literal) with their fixes and defaults 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 10:14:50 +00:00
igneum-labs
04074f5bdc Merge ship-docs-0321 dea360cc into master (gate: green on dea360cc, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-08 10:12:42 +00:00
igneum-labs
dea360cc65 release record section 24: the first lock on cc902690 (checkpoint 1931, 10:06:32 BST), the move's count and the three puller faults closed, 0.3.24 Windows take 2 (Inno stopped the app and copied nothing; the /IGNOTA=1 rule), 0.3.25 opened (tip 78dfe65e, the ceiling cut e0644958, digest 1b37cb9d, the DMG 501ba293 staged, the clock), the tiers at the class flip, the signed apps pipeline (Igneum Labs LLC) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 10:03:40 +00:00
igneum-labs
fe940213a6 Counter ASIC 3.0 status: the 0.3.25 pairs and app tip (78dfe65e on the ceiling cut e0644958, its fast-time PASS at 10:54), the tiers' class-flip UI half (d949e274), the four builder lanes and the class v6 declaration with its four research lanes spawned and the outline on the mirror, the Arc re-read and v5lock jobs live, the held-push cause (the branch's own hook predating the per-process fix) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 10:01:24 +00:00
igneum-labs
d96faddae4 Counter ASIC 3.0 status: the 0.3.25 pairs on 7bd2940f and the re-pointed app tip 9b1ec8dc (every input green at 10:33 bar the pin's gates and the crossing), main's sweep finding (class v5 17 percent under v4 on a power-capped A4000; a knee-locked card may lose a few percent at the crossing until Ember re-tunes) and its two orders with their defaults 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 09:48:45 +00:00
igneum-labs
25c0d75bab Counter ASIC 3.0 status: the 10:05 move's read-back (36 of 36 on the pin by 10:12, the first lock 10:06:32, carrying resumed; three fault classes named), the tiers gated (d3d0704a), the knob's tip e2962b89, the 0.3.25 app line assembled at 10:29 (e0d4425f), the node line's tip 7bd2940f with the one-shot gossip fix and the drift item reclassified 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 09:31:37 +00:00
igneum-labs
de551552dd Counter ASIC 3.0 status: the 0.3.25 plan (the shipper's), main's word (the tiers both halves, gated) and the founder's word (0.3.25 today: the app line by 12:30, the pin by 13:00, the move after the 68,400 crossing reads clean, about 13:30), card-in ready, the tiers' UI half merged, the second deploy (d12e0684), the node line placeable ahead of its minute (c6629572), the knob's tip e2962b89, the Hetzner boxes on the founder's word 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 09:20:01 +00:00
igneum-labs
01d2e123c0 Counter ASIC 3.0 status: the site deployed (1e21bbac at 10:00 BST), row 17's floor sentence and the Arc row restored (96c7c7db), the 0.3.25 node build's shape and main's word on the fee ceiling (no second object cut today), class-v5 8f481459 gated with the Intel fix, the per-process gh fix on master (12f6f9a8), the AMD knob for tonight's cut, the 0.3.24 move FIRED at 10:05:00 BST (the Mac entry and the hive live 10:08:35, the three nodes on the pin, class v5 at 68,400 about 12:54) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 09:11:58 +00:00
igneum-labs
8b0a5a8a40 release rules 11 extended (never a kill pattern the shell carries; a kept datadir's locks); release 0.3.22 section 23: the move executed, 0.3.24 Mac and HiveOS LIVE 10:08:35 BST, the Windows chain on PC 2 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 09:11:06 +00:00
igneum-labs
5ebeff2342 Counter ASIC 3.0 status: the gh switch owned by the attack-pass lane and the rule to every lane, the Intel fix on master (7616ccd4), the pairs on the pin, class-v5 a55fcc10 and the rebuilt kit (65b47211), the AMD grid prepared, the AP-F8-1 record line (4026be32) and the card-in job, the in-house pass's last landing (1bf68cdf), the attack-pass tail (8a2fc793), the signal-15 hook note 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 09:01:49 +00:00
igneum-labs
1e21bbacea Merge ca3-coord-record d0ea857d into master (gate: green on d0ea857d, recorded by tools/ci/pre-push.sh; landed on the build mirror) 2026-10-08 08:58:40 +00:00
igneum-labs
1bf68cdf29 Merge crypto-engage f1c86098 into master (gate: green on f1c86098, recorded by tools/ci/pre-push.sh; landed on the build mirror) 2026-10-08 08:54:42 +00:00
igneum-labs
d0ea857d77 Counter ASIC 3.0 status: the move's readings and the pin line on 5b673577, the founder's standing rule (defaults and deadlines; the shipper's clocks mirrored) and its distribution, the Arc self-test read (the shipped workers right, the kit lacking the Intel rotate fix), the AMD knob opened (a002732a), the F8 tail attributed on the Mac (a per-site bucket concentration), the fast-time PASS and the minute 10:05:00 BST, the gh exception on the Mac, adv-accept closed (BOUND, no BREAK) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 08:51:32 +00:00
igneum-labs
9b057c02ed release 0.3.22: THE MINUTE 10:05 BST set in m5b67-1, the pairs and the hive on the pin, what moves at the minute 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 08:49:41 +00:00
igneum-labs
f1c860983e in-house-pass.md: adv-accept closed (15.1 box-hours, 796,042 accepted programs, BOUND, no BREAK); the pass's totals final 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 08:48:22 +00:00
igneum-labs
33addc3f94 release 0.3.22 section 22: the morning (main's word, the founder's rule, the fifth cut 5b673577, the move staged, the fleet's reading, the Arc answer) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 08:46:22 +00:00
igneum-labs
645ddb2014 Counter ASIC 3.0 status: main's morning words (the look landed, the floor sentence to row 17, CA4 parked, the Mac rule lifted for the F8 tail, route (A) at 10:45 BST), the build-server lane's honest state and the deploy and pairs plan, the fourth cut 5b673577 (floor 68,400), the Arc B580's self-test fault on both classes and the Intel kit held out of 0.3.24, the design pass on master (d8459e79) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 08:40:46 +00:00
igneum-labs
54adb48ce0 Counter ASIC 3.0 status: the 9070 XT bench row on master (the AMD watts no longer owed), the hot-table ldcs rows (a dead lever; the hot family latency-bound), the PC 1 list main set closed on measured rows 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 07:13:01 +00:00
igneum-labs
575c07c721 Merge ca3-coord-record 0cc932f3 into master (gate: green on 0cc932f3, recorded by tools/ci/pre-push.sh; landed on the build mirror) 2026-10-08 06:27:36 +00:00
igneum-labs
74865e3073 Merge ship-docs-0321 c67a3a77 into master (gate: green on c67a3a77, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-08 06:25:18 +00:00
igneum-labs
0cc932f3b9 Counter ASIC 3.0 status: the 5080 Ember tune (the lock worth +40 percent per watt over the stock climb; the knob's case), the knob on release-0.3.24 (2caf39c1), the 9070 XT tune (no AMD knob in 0.3.20; 18.9 MH/s at 202 W; the AMD core-clock knob a morning item), the hot-table job the last on PC 1 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 06:21:16 +00:00
igneum-labs
c67a3a77f2 release 0.3.22 section 21: the core-clock knob cherry-picked onto release-0.3.24 (the union with the efficient-point ceiling), the measured Ember line from PC 1 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 06:19:49 +00:00
igneum-labs
b7ea50ef69 Chip model 5.11 and new-pow 5.1: the per-MAC figures corrected by the per-lane tile count (32 MACs per tile, not 1,024; the 4090's 0.056 pJ is 1.8 pJ, the 5090 reads 2.9 and 1.5 at the shadow's premium), the tensor-tile column withdrawn (a chip's k on tile work 0.03 to 0.3, below the ALU shadow's); Counter ASIC 3.0 status: the microbench's correction, the night's closing sentence on measured rows, the CA4 file's commits 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 06:08:07 +00:00
igneum-labs
16ca6329d0 Counter ASIC 3.0 status: the microbench on the 5090 (20 probes at both states; shfl 55.8 pJ, mul 13.9, mulhi 39.6 against the ARX op's 11.3; int8 mma 1.36): the re-weight's re-opening condition not met on measured rows, the tile block's case in measured picojoules 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 06:00:29 +00:00
igneum-labs
fd3b79eb1b Counter ASIC 3.0 status: rank 2 closed in the CA4 file (the premium is the ops' energy whatever carries them), the op-mix re-weight's case to main as HOLD with its four-line basis and the condition that re-opens it 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 05:23:57 +00:00
igneum-labs
e9b289d5cf Counter ASIC 3.0 status: the SM-sparse reading exists (a quarter of the SMs holds 98.2 percent of the class v4 rate at the same draw; the premium is the shadow's ALU work, the SM-sparse candidate dead; the op-mix re-weight's case to main) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 05:16:37 +00:00
igneum-labs
d505302c07 Counter ASIC 3.0 status: F1's record on master (62475f87; lane (d) complete with its box-hours), the v5 lane's night closed (class-v5 1095eaa8 gated GREEN, 72 checks) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 04:37:03 +00:00
igneum-labs
94a2e4bc9f Counter ASIC 3.0 status: class-v5's F1 row on both mirrors, the CA4 packs on the 5090 (the tile premium 0.103 W per tile unlocked, 0.050 at the lock; every sound pack memory-bound), the prototypes' first sentence on measured rows (neither beats class v4's premium; the per-load class dead; the tile block at parity with the ALU shadow and worse at the chip's k), the k column's basis measured 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 04:29:48 +00:00
igneum-labs
26d65185a9 Merge ca3-coord-record aeeedf3b into master (gate: green on aeeedf3b, recorded by tools/ci/pre-push.sh; landed on the build mirror) 2026-10-08 04:28:50 +00:00
igneum-labs
5c4beaa476 Merge ship-docs-0321 8e0345db into master (gate: green on 8e0345db, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-08 04:27:46 +00:00
igneum-labs
aeeedf3b19 Counter ASIC 3.0 status: the census harness's progress line and flushed partial (known-failed PASS), F1 PASS on class v5 (100,000 programs, max 4.688 percent saved, 0 soundness mismatches, 05:20 BST); the attack board on class v5 complete 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 04:22:26 +00:00
igneum-labs
8e0345db35 release 0.3.22: the attack-pass record lines (F9 and F1 PASS on the full 10^5), PC 1 overnight 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 04:22:12 +00:00
igneum-labs
4b81802099 Counter ASIC 3.0 status: the pass's close at master 4b2d8c8f, the fourth --variant fix (the capture's off-by-one, ca4sparse5), adv-accept off build-1 for F1's census and one holder yielded to the flush test, adv-cache-2 closed (2^36 reads at the control's values) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 04:02:45 +00:00
igneum-labs
a22aeff3ec in-house-pass.md: adv-cache-2 closed (s2c PASS; 2.35 box-hours; the line census at 2^36 reads) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-08 04:00:29 +00:00