igneum-labs
|
8225655999
|
Counter ASIC 3.0 status: the 0.3.25 pin named c9ad753a at 14:08 (every gate green, the fast-time PASS on the freeze-paired pair, the v5 read-back PASS, the FAIL seed re-read at the exact freeze, the minute 14:30 to 14:40, the fleet's census gate at 28,462), the testnet re-cut 0d05e795, the F8-256 attributions (p212 the bucket tail, p225 the value-level class), lane C's drawn-era re-read, the floor-sram and floor-invention landings, the PC 1 order and the 7600 card-in plan, the chain-id deploys
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 13:07:05 +00:00 |
|
igneum-labs
|
bbb7bfcb32
|
Counter ASIC 3.0 status: the STOP on the pin at 13:29 (the fast-time pairing FAIL on an attempt-3 seed), its cause (the 0.3.25 worktree's pre-freeze igneum-pow copy under the paths override; the live network fingerprinted ON the freeze, cbc5bd0a), rule 19 (the build-time fingerprint refusal, packaging/pow-freeze.txt), the rebuilt shas 6ccaf9e9 and c9ad753a with the 90,000 ceiling and digest 2066aa57, the testnet re-cut 3ffcf83b, lane D's fan-out, the attack pass's twelve-chunk split, the explorer re-pointed at node1-dn3 and the 4464 chain id served, the counter-asic-4 docs landing 2db1ba3b
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 12:47:21 +00:00 |
|
igneum-labs
|
6393afab23
|
Counter ASIC 3.0 status: the pin's node sha d5b68fae (the admission height fix, the partition class) every gate green, the matrix six of six, the fast-time PASS on 42ce0f07; the epoch-19 reference block 28,462 as the fleet's census gate and the observer's drift; the founder's clock rule and every lane's clock pulled; the Forgejo landing rule; lane D's shape-256 exhaustion correction; the SRAM floor lane's row (13:18); the DEX lane's close (4e815cc8)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 12:27:47 +00:00 |
|
igneum-labs
|
17cc15dc5e
|
Merge ca3-coord-record 68008678 into master (gate: green on 68008678, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 12:13:44 +00:00 |
|
igneum-labs
|
6800867884
|
Counter ASIC 3.0 status: Devnet 3 stalled at the class v5 floor at 12:48 BST (the fleet's workers without the kit's generator-5 worker; --exec-rpc) and crossed clean at 12:57:40, the pairing checked three ways, the worker-smoke gate rule; the pin's node sha 5f316c21 (the chain-id answer) every gate green; the research lane's section 10 and the two floor rows; kit b's 5090 rows (the x16 draw free on the GPU, the size term real at the knee); the 9070 XT row served (023b9bee); the attack pass's census split; the deploys 773c56f9, 023b9bee
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 12:06:07 +00:00 |
|
igneum-labs
|
f64d866e1f
|
Merge master 023b9bee into wallet-bridge (master moved 24 commits during the landing's gate)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 11:59:16 +00:00 |
|
igneum-labs
|
367b70788e
|
Standing rule (main's word, 8 October 2026, 12:5x UK): no kill by name on the Mac, pid file only, ad-hoc shell lines included; Counter ASIC 3.0 status: the node lane's named commit 42ce0f07 (four node fixes incl. the proof-map window, the OOM class behind the seed outage), the fleet census (36 on population A, 21 stale re-walking), the research lane's b6799782 (chip-model 5.12, the class v6 document through section 9), lane D's move to build-3 and its lossy-share curve, the F8-256 PASS, the hash lane's v6 packs rows and the byte-seed export lesson, the shipper's 12:33 line, the pkill class
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 11:46:11 +00:00 |
|
igneum-labs
|
967ebc555a
|
The wallet line's text under master's founder scrub: the name replaced in the README, updater.rs's comment, the three wallet plan documents and the capture script (the files predate the scrub; the facts stay)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 11:36:47 +00:00 |
|
igneum-labs
|
ba9319f84b
|
Merge master into wallet-bridge (the wallet's line meets master for the landing of the page bridge)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
# Conflicts:
# packaging/ota/publish-manifest.sh
# site/index.html
# site/wallet.html
|
2026-10-08 11:33:30 +00:00 |
|
igneum-labs
|
2d3da3010a
|
Counter ASIC 3.0 status: the 8a217427 deploy read back, the 0.3.25 pre-pin matrix green on four boxes, the 9070 XT grid on the AMD knob (run-ca3-pc1-amd-grid-9070-20261008-b: 149 W at 18.96 MH/s, both floors, the knob a watts lever only, the two 5090 denominators), the Arc default at 12:30 (pairing f2267bb6, kit 65b47211, Intel held out), the explorer deploys 3b21d002, e3efb38b and 4b8712eb, the /build lane's close, lane D's 24,000-era coverage (61 of 5,000 at the lossy corner against 0 of 19,000), the node lane's missed 12:30 clock and the gate-priority lesson, main's census correction
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 11:30:51 +00:00 |
|
igneum-labs
|
3b21d002c7
|
Merge explorer-dn3 ace058e5 into master (gate: green on ace058e5, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 11:05:43 +00:00 |
|
igneum-labs
|
ace058e521
|
Merge remote-tracking branch 'build/master' into explorer-dn3
# Conflicts:
# site/build.mjs
|
2026-10-08 10:58:52 +00:00 |
|
igneum-labs
|
7c62e25edb
|
Counter ASIC 3.0 status: the new gate on the pin (the reorg unwind), lane D's 12:00 coverage (the exhaustion break at the lossy corner; the bit-level era-stride class at half the family's epochs), the v6 cost rows, the drift class read from node1's log and its fix, main's words (the band, the fold, the served sentence corrected today, Apple split by size), the genesis gate answered on build-1 with the re-execution measured at 7 min 30 s, lane A's schedule flag and lane C's instrument finding (the per-load class reopened), the served corrections (8a9c89f5, 8a217427), the 11:53 deploy, the four-box load line at 11:55
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 10:56:33 +00:00 |
|
igneum-labs
|
ba4615ef56
|
Merge remote-tracking branch 'build/master' into explorer-dn3
|
2026-10-08 10:34:09 +00:00 |
|
igneum-labs
|
849797c3a4
|
Counter ASIC 3.0 status: the whole 60x file (six keys) landed on both lines, the index fold as a class v6 design row, class v5 level with v4 at the 5090's knee (the knee stands, the note off, the A4000's loss a cap effect), lane B's SRAM-store and HBM4E readings and main's three orders on them, the shipper's three readings and the cut tip b36b7200, lane A's cut and verdict (the stored-dataset chip closed by no layer; the floor and a per-tier ceiling the numbers) with main's schedule to price, the snapshot digest stamp and the genesis difference as a gate on the pin, main's words
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 10:32:55 +00:00 |
|
igneum-labs
|
c45104856b
|
Counter ASIC 3.0 status: main's word on the two reds (the detach in 0.3.25 if green by 12:15), the day-key scan to 2^28 PASS, the sweep reruns read as none, the attack-pass branch merged and pushed, the family gate's first coverage (16 eras; the index-bit bias firing at address bit R on 7 of 16 drawn eras, a class v6 design row: load_index's form, not a floor; the bucket bound in sigma), the ota test literal fixed (36f7fefa, the detach rides 0.3.25)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 10:24:10 +00:00 |
|
igneum-labs
|
f05228a6a1
|
Devnet 3 explorer: transactions (/tx/<hash>), accounts (balance, nonce, code, 7 days of transactions), the proving view (/proving), the DAG picture and the verified badge (the covering certificate re-checked in the browser with site/verify) on /explorer and /block; class and lock state per block; /api/explorer gains ?tx, ?txs, ?proving, ?stats, ?dag; the dn3_ default for /api/explorer, /api/stats, /api/supply and /api/checkpoint (?index=N); replaced chain blocks read as such against the indexer
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 10:24:03 +00:00 |
|
igneum-labs
|
c22a541d12
|
Counter ASIC 3.0 status: the founder's load order on the four boxes and its placement (lane D's family sampling, the attack families at scale, lane C's packs, the pin matrix, the cross builds), the drift class settled by a fresh-walk node, the pin candidate e0644958 confirmed, the Windows installer class and the detach fix, the tiers' class-flip pair gated (081b3ba7), the rpc up, two reds on the release line from the first ten minutes of the load order (the missing 60x field; the detach's test literal) with their fixes and defaults
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 10:14:50 +00:00 |
|
igneum-labs
|
0c548b60c7
|
Merge ship-docs-0321 2a4a828b into master (gate: green on 2a4a828b, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 10:12:42 +00:00 |
|
igneum-labs
|
2a4a828be0
|
release record section 24: the first lock on cc902690 (checkpoint 1931, 10:06:32 BST), the move's count and the three puller faults closed, 0.3.24 Windows take 2 (Inno stopped the app and copied nothing; the /IGNOTA=1 rule), 0.3.25 opened (tip 87d8862d, the ceiling cut e0644958, digest 1b37cb9d, the DMG 501ba293 staged, the clock), the tiers at the class flip, the signed apps pipeline (Igneum Labs LLC)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 10:03:40 +00:00 |
|
igneum-labs
|
e62adc83cf
|
Counter ASIC 3.0 status: the 0.3.25 pairs and app tip (87d8862d on the ceiling cut e0644958, its fast-time PASS at 10:54), the tiers' class-flip UI half (d949e274), the four builder lanes and the class v6 declaration with its four research lanes spawned and the outline on the mirror, the Arc re-read and v5lock jobs live, the held-push cause (the branch's own hook predating the per-process fix)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 10:01:24 +00:00 |
|
igneum-labs
|
6443f921e9
|
Counter ASIC 3.0 status: the 0.3.25 pairs on 7bd2940f and the re-pointed app tip c68aea33 (every input green at 10:33 bar the pin's gates and the crossing), main's sweep finding (class v5 17 percent under v4 on a power-capped A4000; a knee-locked card may lose a few percent at the crossing until Ember re-tunes) and its two orders with their defaults
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:48:45 +00:00 |
|
igneum-labs
|
daba2e69d2
|
Counter ASIC 3.0 status: the 10:05 move's read-back (36 of 36 on the pin by 10:12, the first lock 10:06:32, carrying resumed; three fault classes named), the tiers gated (d3d0704a), the knob's tip e2962b89, the 0.3.25 app line assembled at 10:29 (e0d4425f), the node line's tip 7bd2940f with the one-shot gossip fix and the drift item reclassified
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:31:37 +00:00 |
|
igneum-labs
|
01a160456e
|
Counter ASIC 3.0 status: the 0.3.25 plan (the shipper's), main's word (the tiers both halves, gated) and the founder's word (0.3.25 today: the app line by 12:30, the pin by 13:00, the move after the 68,400 crossing reads clean, about 13:30), card-in ready, the tiers' UI half merged, the second deploy (a90fde64), the node line placeable ahead of its minute (c6629572), the knob's tip e2962b89, the Hetzner boxes on the founder's word
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:20:01 +00:00 |
|
igneum-labs
|
3f61c91d04
|
Counter ASIC 3.0 status: the site deployed (cbd29023 at 10:00 BST), row 17's floor sentence and the Arc row restored (85ad7421), the 0.3.25 node build's shape and main's word on the fee ceiling (no second object cut today), class-v5 8f481459 gated with the Intel fix, the per-process gh fix on master (1db6b438), the AMD knob for tonight's cut, the 0.3.24 move FIRED at 10:05:00 BST (the Mac entry and the hive live 10:08:35, the three nodes on the pin, class v5 at 68,400 about 12:54)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:11:58 +00:00 |
|
igneum-labs
|
798c74c4bb
|
release rules 11 extended (never a kill pattern the shell carries; a kept datadir's locks); release 0.3.22 section 23: the move executed, 0.3.24 Mac and HiveOS LIVE 10:08:35 BST, the Windows chain on PC 2
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:11:06 +00:00 |
|
igneum-labs
|
6ff93415fc
|
Counter ASIC 3.0 status: the gh switch owned by the attack-pass lane and the rule to every lane, the Intel fix on master (dabd0fea), the pairs on the pin, class-v5 a55fcc10 and the rebuilt kit (65b47211), the AMD grid prepared, the AP-F8-1 record line (59572d37) and the card-in job, the in-house pass's last landing (96262264), the attack-pass tail (2f1ce097), the signal-15 hook note
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:01:49 +00:00 |
|
igneum-labs
|
cbd290232b
|
Merge ca3-coord-record 1cf233f6 into master (gate: green on 1cf233f6, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 08:58:40 +00:00 |
|
igneum-labs
|
962622640c
|
Merge crypto-engage 48b5525a into master (gate: green on 48b5525a, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 08:54:42 +00:00 |
|
igneum-labs
|
1cf233f66b
|
Counter ASIC 3.0 status: the move's readings and the pin line on 5b673577, the founder's standing rule (defaults and deadlines; the shipper's clocks mirrored) and its distribution, the Arc self-test read (the shipped workers right, the kit lacking the Intel rotate fix), the AMD knob opened (a002732a), the F8 tail attributed on the Mac (a per-site bucket concentration), the fast-time PASS and the minute 10:05:00 BST, the gh exception on the Mac, adv-accept closed (BOUND, no BREAK)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:51:32 +00:00 |
|
igneum-labs
|
41a1440113
|
release 0.3.22: THE MINUTE 10:05 BST set in m5b67-1, the pairs and the hive on the pin, what moves at the minute
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:49:41 +00:00 |
|
igneum-labs
|
48b5525a1f
|
in-house-pass.md: adv-accept closed (15.1 box-hours, 796,042 accepted programs, BOUND, no BREAK); the pass's totals final
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:48:22 +00:00 |
|
igneum-labs
|
049cf90901
|
release 0.3.22 section 22: the morning (main's word, the founder's rule, the fifth cut 5b673577, the move staged, the fleet's reading, the Arc answer)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:46:22 +00:00 |
|
igneum-labs
|
978ea619e6
|
Counter ASIC 3.0 status: main's morning words (the look landed, the floor sentence to row 17, CA4 parked, the Mac rule lifted for the F8 tail, route (A) at 10:45 BST), the build-server lane's honest state and the deploy and pairs plan, the fourth cut 5b673577 (floor 68,400), the Arc B580's self-test fault on both classes and the Intel kit held out of 0.3.24, the design pass on master (e59b127a)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:40:46 +00:00 |
|
igneum-labs
|
8e4eb37b2e
|
Counter ASIC 3.0 status: the 9070 XT bench row on master (the AMD watts no longer owed), the hot-table ldcs rows (a dead lever; the hot family latency-bound), the PC 1 list main set closed on measured rows
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 07:13:01 +00:00 |
|
igneum-labs
|
41f90af1b6
|
Merge ca3-coord-record 14c453b4 into master (gate: green on 14c453b4, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 06:27:36 +00:00 |
|
igneum-labs
|
489f4ff5bd
|
Merge ship-docs-0321 b8e0772d into master (gate: green on b8e0772d, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 06:25:18 +00:00 |
|
igneum-labs
|
14c453b4ca
|
Counter ASIC 3.0 status: the 5080 Ember tune (the lock worth +40 percent per watt over the stock climb; the knob's case), the knob on release-0.3.24 (8bb0e288), the 9070 XT tune (no AMD knob in 0.3.20; 18.9 MH/s at 202 W; the AMD core-clock knob a morning item), the hot-table job the last on PC 1
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:21:16 +00:00 |
|
igneum-labs
|
b8e0772d1d
|
release 0.3.22 section 21: the core-clock knob cherry-picked onto release-0.3.24 (the union with the efficient-point ceiling), the measured Ember line from PC 1
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:19:49 +00:00 |
|
igneum-labs
|
544e4037b5
|
Chip model 5.11 and new-pow 5.1: the per-MAC figures corrected by the per-lane tile count (32 MACs per tile, not 1,024; the 4090's 0.056 pJ is 1.8 pJ, the 5090 reads 2.9 and 1.5 at the shadow's premium), the tensor-tile column withdrawn (a chip's k on tile work 0.03 to 0.3, below the ALU shadow's); Counter ASIC 3.0 status: the microbench's correction, the night's closing sentence on measured rows, the CA4 file's commits
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:08:07 +00:00 |
|
igneum-labs
|
89ef71e6c0
|
Counter ASIC 3.0 status: the microbench on the 5090 (20 probes at both states; shfl 55.8 pJ, mul 13.9, mulhi 39.6 against the ARX op's 11.3; int8 mma 1.36): the re-weight's re-opening condition not met on measured rows, the tile block's case in measured picojoules
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:00:29 +00:00 |
|
igneum-labs
|
db91345e43
|
Counter ASIC 3.0 status: rank 2 closed in the CA4 file (the premium is the ops' energy whatever carries them), the op-mix re-weight's case to main as HOLD with its four-line basis and the condition that re-opens it
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 05:23:57 +00:00 |
|
igneum-labs
|
a86e62e5be
|
Counter ASIC 3.0 status: the SM-sparse reading exists (a quarter of the SMs holds 98.2 percent of the class v4 rate at the same draw; the premium is the shadow's ALU work, the SM-sparse candidate dead; the op-mix re-weight's case to main)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 05:16:37 +00:00 |
|
igneum-labs
|
7c4a74fd90
|
Counter ASIC 3.0 status: F1's record on master (7d22bc0b; lane (d) complete with its box-hours), the v5 lane's night closed (class-v5 1095eaa8 gated GREEN, 72 checks)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:37:03 +00:00 |
|
igneum-labs
|
abda374a41
|
Counter ASIC 3.0 status: class-v5's F1 row on both mirrors, the CA4 packs on the 5090 (the tile premium 0.103 W per tile unlocked, 0.050 at the lock; every sound pack memory-bound), the prototypes' first sentence on measured rows (neither beats class v4's premium; the per-load class dead; the tile block at parity with the ALU shadow and worse at the chip's k), the k column's basis measured
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:29:48 +00:00 |
|
igneum-labs
|
0730ff1fa8
|
Merge ca3-coord-record 1be7ba27 into master (gate: green on 1be7ba27, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 04:28:50 +00:00 |
|
igneum-labs
|
4559fcc200
|
Merge ship-docs-0321 a5ddc127 into master (gate: green on a5ddc127, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 04:27:46 +00:00 |
|
igneum-labs
|
1be7ba2776
|
Counter ASIC 3.0 status: the census harness's progress line and flushed partial (known-failed PASS), F1 PASS on class v5 (100,000 programs, max 4.688 percent saved, 0 soundness mismatches, 05:20 BST); the attack board on class v5 complete
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:22:26 +00:00 |
|
igneum-labs
|
a5ddc1270f
|
release 0.3.22: the attack-pass record lines (F9 and F1 PASS on the full 10^5), PC 1 overnight
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:22:12 +00:00 |
|
igneum-labs
|
595b0a7bd2
|
Counter ASIC 3.0 status: the pass's close at master 4b45b2bd, the fourth --variant fix (the capture's off-by-one, ca4sparse5), adv-accept off build-1 for F1's census and one holder yielded to the flush test, adv-cache-2 closed (2^36 reads at the control's values)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:02:45 +00:00 |
|