igneum-labs
|
bc14ca7474
|
attack-pass lane (d): F8 hot-set gate to 256 seeds on dba17a0a, 245 of 256 within 1.2x, no hot set on any seed, PASS at the gate's reading (the strengthening line)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 11:39:15 +00:00 |
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igneum-labs
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983908b255
|
Merge remote-tracking branch 'build/master' into attack-pass
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2026-10-08 10:17:33 +00:00 |
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igneum-labs
|
1670be7671
|
attack-pass lane (d): F4 day-key scan to 2^28 on 19c60cf9, 0 of 2^28 days over 1.1x, PASS (the strengthening line)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 10:17:06 +00:00 |
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igneum-labs
|
04074f5bdc
|
Merge ship-docs-0321 dea360cc into master (gate: green on dea360cc, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
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2026-10-08 10:12:42 +00:00 |
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igneum-labs
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dea360cc65
|
release record section 24: the first lock on cc902690 (checkpoint 1931, 10:06:32 BST), the move's count and the three puller faults closed, 0.3.24 Windows take 2 (Inno stopped the app and copied nothing; the /IGNOTA=1 rule), 0.3.25 opened (tip 78dfe65e, the ceiling cut e0644958, digest 1b37cb9d, the DMG 501ba293 staged, the clock), the tiers at the class flip, the signed apps pipeline (Igneum Labs LLC)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 10:03:40 +00:00 |
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igneum-labs
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fe940213a6
|
Counter ASIC 3.0 status: the 0.3.25 pairs and app tip (78dfe65e on the ceiling cut e0644958, its fast-time PASS at 10:54), the tiers' class-flip UI half (d949e274), the four builder lanes and the class v6 declaration with its four research lanes spawned and the outline on the mirror, the Arc re-read and v5lock jobs live, the held-push cause (the branch's own hook predating the per-process fix)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 10:01:24 +00:00 |
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igneum-labs
|
d96faddae4
|
Counter ASIC 3.0 status: the 0.3.25 pairs on 7bd2940f and the re-pointed app tip 9b1ec8dc (every input green at 10:33 bar the pin's gates and the crossing), main's sweep finding (class v5 17 percent under v4 on a power-capped A4000; a knee-locked card may lose a few percent at the crossing until Ember re-tunes) and its two orders with their defaults
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 09:48:45 +00:00 |
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igneum-labs
|
25c0d75bab
|
Counter ASIC 3.0 status: the 10:05 move's read-back (36 of 36 on the pin by 10:12, the first lock 10:06:32, carrying resumed; three fault classes named), the tiers gated (d3d0704a), the knob's tip e2962b89, the 0.3.25 app line assembled at 10:29 (e0d4425f), the node line's tip 7bd2940f with the one-shot gossip fix and the drift item reclassified
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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2026-10-08 09:31:37 +00:00 |
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igneum-labs
|
de551552dd
|
Counter ASIC 3.0 status: the 0.3.25 plan (the shipper's), main's word (the tiers both halves, gated) and the founder's word (0.3.25 today: the app line by 12:30, the pin by 13:00, the move after the 68,400 crossing reads clean, about 13:30), card-in ready, the tiers' UI half merged, the second deploy (d12e0684), the node line placeable ahead of its minute (c6629572), the knob's tip e2962b89, the Hetzner boxes on the founder's word
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:20:01 +00:00 |
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igneum-labs
|
01d2e123c0
|
Counter ASIC 3.0 status: the site deployed (1e21bbac at 10:00 BST), row 17's floor sentence and the Arc row restored (96c7c7db), the 0.3.25 node build's shape and main's word on the fee ceiling (no second object cut today), class-v5 8f481459 gated with the Intel fix, the per-process gh fix on master (12f6f9a8), the AMD knob for tonight's cut, the 0.3.24 move FIRED at 10:05:00 BST (the Mac entry and the hive live 10:08:35, the three nodes on the pin, class v5 at 68,400 about 12:54)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:11:58 +00:00 |
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igneum-labs
|
8b0a5a8a40
|
release rules 11 extended (never a kill pattern the shell carries; a kept datadir's locks); release 0.3.22 section 23: the move executed, 0.3.24 Mac and HiveOS LIVE 10:08:35 BST, the Windows chain on PC 2
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:11:06 +00:00 |
|
igneum-labs
|
d12e0684c6
|
Merge ca3-coord-record 5ebeff23 into master (gate: green on 5ebeff23, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 09:07:55 +00:00 |
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igneum-labs
|
5ebeff2342
|
Counter ASIC 3.0 status: the gh switch owned by the attack-pass lane and the rule to every lane, the Intel fix on master (7616ccd4), the pairs on the pin, class-v5 a55fcc10 and the rebuilt kit (65b47211), the AMD grid prepared, the AP-F8-1 record line (4026be32) and the card-in job, the in-house pass's last landing (1bf68cdf), the attack-pass tail (8a2fc793), the signal-15 hook note
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:01:49 +00:00 |
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igneum-labs
|
96c7c7db7e
|
Merge spec-accept-23 1ac664e3 into master (gate: green on 1ac664e3, recorded by tools/ci/pre-push.sh; landed on the box mirror)
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2026-10-08 08:59:34 +00:00 |
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igneum-labs
|
1e21bbacea
|
Merge ca3-coord-record d0ea857d into master (gate: green on d0ea857d, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 08:58:40 +00:00 |
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igneum-labs
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8a2fc79398
|
Merge attack-pass 29239a22 into master (gate: green on 29239a22, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
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2026-10-08 08:55:29 +00:00 |
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igneum-labs
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1bf68cdf29
|
Merge crypto-engage f1c86098 into master (gate: green on f1c86098, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 08:54:42 +00:00 |
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igneum-labs
|
4026be326d
|
Merge ca3-v4-amend 8a63248c into master (gate: green on 8a63248c, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 08:54:04 +00:00 |
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igneum-labs
|
1ac664e3b6
|
Merge build/master 7616ccd4 into spec-accept-23 (the Intel rotr worker fix taken; /miners rebuilt from the merged bench data)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:52:59 +00:00 |
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igneum-labs
|
d0ea857d77
|
Counter ASIC 3.0 status: the move's readings and the pin line on 5b673577, the founder's standing rule (defaults and deadlines; the shipper's clocks mirrored) and its distribution, the Arc self-test read (the shipped workers right, the kit lacking the Intel rotate fix), the AMD knob opened (a002732a), the F8 tail attributed on the Mac (a per-site bucket concentration), the fast-time PASS and the minute 10:05:00 BST, the gh exception on the Mac, adv-accept closed (BOUND, no BREAK)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:51:32 +00:00 |
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igneum-labs
|
9b057c02ed
|
release 0.3.22: THE MINUTE 10:05 BST set in m5b67-1, the pairs and the hive on the pin, what moves at the minute
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:49:41 +00:00 |
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igneum-labs
|
29239a2296
|
attack-pass: the status board, F8 row, gate line and re-gate paragraph read the tail as attributed
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:49:21 +00:00 |
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igneum-labs
|
f1c860983e
|
in-house-pass.md: adv-accept closed (15.1 box-hours, 796,042 accepted programs, BOUND, no BREAK); the pass's totals final
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:48:22 +00:00 |
|
igneum-labs
|
7ac25503ed
|
attack-pass: AP-F8-1 tail attributed (p4, p8, p10, p34 as per-site bucket concentration at a narrow-window site; the largest-bucket bound named for a next class)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:48:03 +00:00 |
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igneum-labs
|
8a63248c68
|
ledger AP-F8-1: the four-seed tail attributed (8 October 2026 Mac read at 2^24): one narrow-window site per seed, a quarter-bit bucket concentration from a mad, xor or sub writer, no lossy source, no chip consequence; the per-site bucket bound is a morning item
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:47:41 +00:00 |
|
igneum-labs
|
33addc3f94
|
release 0.3.22 section 22: the morning (main's word, the founder's rule, the fifth cut 5b673577, the move staged, the fleet's reading, the Arc answer)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:46:22 +00:00 |
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igneum-labs
|
645ddb2014
|
Counter ASIC 3.0 status: main's morning words (the look landed, the floor sentence to row 17, CA4 parked, the Mac rule lifted for the F8 tail, route (A) at 10:45 BST), the build-server lane's honest state and the deploy and pairs plan, the fourth cut 5b673577 (floor 68,400), the Arc B580's self-test fault on both classes and the Intel kit held out of 0.3.24, the design pass on master (d8459e79)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:40:46 +00:00 |
|
igneum-labs
|
ca5151eef5
|
Evidence row 17: the in-house pass's floor reading beside its sentence (nine of nine hot sets refused; the diffuse era-stride excess, bounded under 0.1 percent of a hash's reads per site, is not caught by the floor and is the next class's test; measured 8 October 2026, ledger AP-F8-1 and AP-F8-6); /evidence rebuilt
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:33:21 +00:00 |
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igneum-labs
|
54adb48ce0
|
Counter ASIC 3.0 status: the 9070 XT bench row on master (the AMD watts no longer owed), the hot-table ldcs rows (a dead lever; the hot family latency-bound), the PC 1 list main set closed on measured rows
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 07:13:01 +00:00 |
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igneum-labs
|
cf4d5c143c
|
Merge ca3-v4-amend 780b608d into master (gate: green on 780b608d, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 07:11:38 +00:00 |
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igneum-labs
|
780b608d4d
|
bench-log: the hot-table packs on the RTX 5090, ldcs against base, unlocked and at the 1,300 MHz lock (36 rows, all PASS; ldcs dead, the hot packs lose 2 percent to the lock where mx8 loses 7.5)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 07:05:19 +00:00 |
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igneum-labs
|
575c07c721
|
Merge ca3-coord-record 0cc932f3 into master (gate: green on 0cc932f3, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 06:27:36 +00:00 |
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igneum-labs
|
74865e3073
|
Merge ship-docs-0321 c67a3a77 into master (gate: green on c67a3a77, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
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2026-10-08 06:25:18 +00:00 |
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igneum-labs
|
0cc932f3b9
|
Counter ASIC 3.0 status: the 5080 Ember tune (the lock worth +40 percent per watt over the stock climb; the knob's case), the knob on release-0.3.24 (2caf39c1), the 9070 XT tune (no AMD knob in 0.3.20; 18.9 MH/s at 202 W; the AMD core-clock knob a morning item), the hot-table job the last on PC 1
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:21:16 +00:00 |
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igneum-labs
|
c67a3a77f2
|
release 0.3.22 section 21: the core-clock knob cherry-picked onto release-0.3.24 (the union with the efficient-point ceiling), the measured Ember line from PC 1
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:19:49 +00:00 |
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igneum-labs
|
b7ea50ef69
|
Chip model 5.11 and new-pow 5.1: the per-MAC figures corrected by the per-lane tile count (32 MACs per tile, not 1,024; the 4090's 0.056 pJ is 1.8 pJ, the 5090 reads 2.9 and 1.5 at the shadow's premium), the tensor-tile column withdrawn (a chip's k on tile work 0.03 to 0.3, below the ALU shadow's); Counter ASIC 3.0 status: the microbench's correction, the night's closing sentence on measured rows, the CA4 file's commits
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:08:07 +00:00 |
|
igneum-labs
|
16ca6329d0
|
Counter ASIC 3.0 status: the microbench on the 5090 (20 probes at both states; shfl 55.8 pJ, mul 13.9, mulhi 39.6 against the ARX op's 11.3; int8 mma 1.36): the re-weight's re-opening condition not met on measured rows, the tile block's case in measured picojoules
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:00:29 +00:00 |
|
igneum-labs
|
fd3b79eb1b
|
Counter ASIC 3.0 status: rank 2 closed in the CA4 file (the premium is the ops' energy whatever carries them), the op-mix re-weight's case to main as HOLD with its four-line basis and the condition that re-opens it
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 05:23:57 +00:00 |
|
igneum-labs
|
e9b289d5cf
|
Counter ASIC 3.0 status: the SM-sparse reading exists (a quarter of the SMs holds 98.2 percent of the class v4 rate at the same draw; the premium is the shadow's ALU work, the SM-sparse candidate dead; the op-mix re-weight's case to main)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 05:16:37 +00:00 |
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igneum-labs
|
d505302c07
|
Counter ASIC 3.0 status: F1's record on master (62475f87; lane (d) complete with its box-hours), the v5 lane's night closed (class-v5 1095eaa8 gated GREEN, 72 checks)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:37:03 +00:00 |
|
igneum-labs
|
744ca62c76
|
Merge ca3-coord-record 94a2e4bc into master (gate: green on 94a2e4bc, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 04:36:04 +00:00 |
|
igneum-labs
|
94a2e4bc9f
|
Counter ASIC 3.0 status: class-v5's F1 row on both mirrors, the CA4 packs on the 5090 (the tile premium 0.103 W per tile unlocked, 0.050 at the lock; every sound pack memory-bound), the prototypes' first sentence on measured rows (neither beats class v4's premium; the per-load class dead; the tile block at parity with the ALU shadow and worse at the chip's k), the k column's basis measured
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:29:48 +00:00 |
|
igneum-labs
|
62475f87f7
|
Merge attack-pass 15e70626 into master (gate: green on 15e70626, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 04:29:30 +00:00 |
|
igneum-labs
|
26d65185a9
|
Merge ca3-coord-record aeeedf3b into master (gate: green on aeeedf3b, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 04:28:50 +00:00 |
|
igneum-labs
|
5c4beaa476
|
Merge ship-docs-0321 8e0345db into master (gate: green on 8e0345db, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 04:27:46 +00:00 |
|
igneum-labs
|
15e70626fb
|
attack-pass lane (d): F1 shadow redundancy on the frozen class v5 tip dba17a0a, 10^5 programs, max 4.688 percent, 0 mismatches, PASS (the 0.3.24 gate line; AP-F1-1 FIXED-AND-PASSED on v5)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:22:29 +00:00 |
|
igneum-labs
|
aeeedf3b19
|
Counter ASIC 3.0 status: the census harness's progress line and flushed partial (known-failed PASS), F1 PASS on class v5 (100,000 programs, max 4.688 percent saved, 0 soundness mismatches, 05:20 BST); the attack board on class v5 complete
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:22:26 +00:00 |
|
igneum-labs
|
8e0345db35
|
release 0.3.22: the attack-pass record lines (F9 and F1 PASS on the full 10^5), PC 1 overnight
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:22:12 +00:00 |
|
igneum-labs
|
7c1784e64c
|
attack-pass: F1 record section 12, the census flush and its known-failed test (2,000 rows after a kill at 2,000, PASS)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:08:52 +00:00 |
|
igneum-labs
|
4b81802099
|
Counter ASIC 3.0 status: the pass's close at master 4b2d8c8f, the fourth --variant fix (the capture's off-by-one, ca4sparse5), adv-accept off build-1 for F1's census and one holder yielded to the flush test, adv-cache-2 closed (2^36 reads at the control's values)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:02:45 +00:00 |
|