igneum-network/igneum
1
0
Fork 0
Code Issues Pull requests Releases Activity
1039 commits 218 branches 0 tags 1.1 GiB
Commit graph

490 commits

Author SHA1 Message Date
igneum-labs
7f4874ff24 Counter ASIC 3.0 status: PC 1 free, the 9070 XT restored (confirmed off at 17:55Z, mining from 17:57Z), the amd:1 flag back 2026-10-06 18:02:01 +00:00
igneum-labs
c5a50995c1 Counter ASIC 3.0 status: P2 green (miner-signalled activation, three runs and the failed case, G6), P1's plan and objects written; the line for the project lead re-read 2026-10-06 17:57:35 +00:00
igneum-labs
b8b1a72185 Merge branch 'ca3-v4-node' into ca3-coord 2026-10-06 17:56:58 +00:00
igneum-labs
ddfef6b526 Counter ASIC 3.0 status: the cards-off rule from main (runner flag + CI check tonight), the 4070 consequence 2026-10-06 17:56:13 +00:00
igneum-labs
6a57c69580 Counter ASIC 3.0 gates (node): G6 on the signalling fork change GREEN (jobs build-20261006-173017, -174027, -174823: the 2.0 flake re-run alone, the five crates and the app, the relay upload fault noted) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 17:56:11 +00:00
igneum-labs
e6e3bd1954 Counter ASIC 3.0 status: the watts job's failure and the 9070 XT restore in flight; the 4070 came back 2026-10-06 17:55:18 +00:00
igneum-labs
d4aa127041 Counter ASIC 3.0 status: the build-server rule passed to every lane 2026-10-06 17:53:17 +00:00
igneum-labs
6a0d4eb59f Counter ASIC 3.0 status: the RTX 4070 ladder (holds to 200,000 ops at its tune point; binds at 330,700 under the 160 W cap) 2026-10-06 17:49:44 +00:00
igneum-labs
f35cf492bf Counter ASIC 3.0 gates (node): the signalling gate GREEN (two of three never flips, all three flips at the first full window, nobody flips at the floor; the failed case fails on eight checks), the four summaries, the preconditions rows 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 17:47:31 +00:00
igneum-labs
1fbdf1008e Counter ASIC 3.0 status: item 6's RX 9070 XT column (the card alone; every family 0.75x to 1.30x except perm and mm8; R3 unmoved) 2026-10-06 17:36:21 +00:00
igneum-labs
7704ed1181 Counter ASIC 3.0: item 2's 9070 XT rows (bit-exact, +2.0 s OpenCL compile per pack, no rate cost) 2026-10-06 17:30:00 +00:00
igneum-labs
2439d18c03 Counter ASIC 3.0 gates (node): the two cut preconditions: the fleet rehearsal plan (counter-asic-3-rehearsal.md, the publish and rehearsal override objects with their digests ac8e60ce... and bc2142b1...), the PROPOSED miner-signalled activation (node doc section 6), the fast-time signal gate class-v4-signal.mjs, the signal window in override-60x.json (120) and the README 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 17:27:50 +00:00
igneum-labs
0f4dbe602d Counter ASIC 3.0 status: G2 AMD green (1,024 of 1,024 on both packs, re-hashed here) 2026-10-06 17:23:43 +00:00
igneum-labs
899abc8a21 Counter ASIC 3.0 status: family run d (AMD compile answers; the loaded-card ratios unusable; run e with the card alone) 2026-10-06 17:21:43 +00:00
igneum-labs
fcb9ab1198 Counter ASIC 3.0 status: the 9070 XT back on 8 identities (rate unchanged) 2026-10-06 17:08:40 +00:00
igneum-labs
40ced7759f Counter ASIC 3.0 status: the identities job's parse fault and the new CI guard 2026-10-06 17:03:46 +00:00
igneum-labs
21de1d0a26 Counter ASIC 3.0 status: job 2 ran on gfx1036 (re-run owed), the reset and identities findings 2026-10-06 17:01:06 +00:00
igneum-labs
43cf0dac88 Counter ASIC 3.0 status: PC 2 held for the 0.3.14 suite, PC 1's queue and the update order 2026-10-06 16:54:15 +00:00
igneum-labs
5db68a99ec Counter ASIC 3.0 status: the two cut preconditions (staging rehearsal, miner-signalled activation) as gates; the line for the project lead re-worded, no date until 0.3.14 runs a clean day 2026-10-06 16:47:12 +00:00
igneum-labs
52a3491af0 Counter ASIC 3.0 status: the blocker closed (G4 re-run with the id assertion green), every gate green, the line for the project lead confirmed 2026-10-06 16:45:52 +00:00
igneum-labs
f1938c3357 Merge branch 'ca3-v4-node' into ca3-coord 2026-10-06 16:44:27 +00:00
igneum-labs
78634555f4 Counter ASIC 3.0 gates (node): the program id carries the class: G4 re-run GREEN with the id assertion (every v4 epoch's id = the CLI's class v4 id, differs from the same-seed v3 id; the assertion's failed case fails on that one check), the seven re-exported packs' Metal fingerprints equal the hash lane's table, G5 workers rebuilt from the fix 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 16:43:46 +00:00
igneum-labs
d022e5ef76 Counter ASIC 3.0 status: the hash lane green on the id fix (4366418 merged) 2026-10-06 16:40:09 +00:00
igneum-labs
551198d864 Merge branch 'ca3-v4-hash' into ca3-coord 2026-10-06 16:39:24 +00:00
igneum-labs
43664184ed Counter ASIC 3.0 gates (hash): follow-up 1 on the program-id fix (e05eb0c merged): crate suite 97 of 97, the seven v4 packs re-exported byte-identical (generator 4, id c120d7963abdcd96), fingerprints unchanged on Metal and Apple OpenCL, Mac G2 16 x 1,024 of 1,024 through the v4 class token, the harness 4 of 4 on the class and on the era with the id assert_ne holding; the job scripts take the class token from the pack 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 16:38:48 +00:00
igneum-labs
eef181124f Counter ASIC 3.0 status: the program-id fix merged (e05eb0c), the re-runs open 2026-10-06 16:26:11 +00:00
igneum-labs
329d256202 Counter ASIC 3.0 status: AMD G2 job ready (chain-seed packs, own kit) 2026-10-06 16:22:31 +00:00
igneum-labs
480c0518f6 Counter ASIC 3.0 status: every gate green on the hash, the program-id blocker on the cut, the one line for the project lead 2026-10-06 16:18:08 +00:00
igneum-labs
e029091c3d Merge branch 'ca3-v4-node' into ca3-coord 2026-10-06 16:16:21 +00:00
igneum-labs
3521d9a002 Merge branch 'ca3-v4-hash' into ca3-coord 2026-10-06 16:16:21 +00:00
igneum-labs
d2237cc566 Counter ASIC 3.0 gates (hash): the RTX 5090 G1 and G2 JSON summaries 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 16:15:17 +00:00
igneum-labs
85c267971c Counter ASIC 3.0 gates (hash): the RTX 5090 G1 and G2 evidence from the collected job.log (eight fingerprints equal to the Mac's, 8 x 1,024 of 1,024); hash-gates.md and the bench-log entry closed 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 16:14:08 +00:00
igneum-labs
ed53e96fd8 Counter ASIC 3.0 gates (node): G6 row, the two crates whose lines the relay upload does not carry 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 16:10:30 +00:00
igneum-labs
f0b3355a7a Counter ASIC 3.0 gates (node): G4, G4b, G5 and G6 GREEN for class v4 (the three fast-time summaries incl. the known-failed case, node-gates.md, counter-asic-3-node.md) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 16:10:00 +00:00
igneum-labs
fa857683be Counter ASIC 3.0 gates (hash): the gate directory (hash-gates.md, G1 Mac, G2 Mac, G3 and verifier JSON) and the bench-log entry; the RTX 5090 G1 rows pending the collected job.log 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 16:07:55 +00:00
igneum-labs
179443499d Counter ASIC 3.0 status: job 1 closed (G1 AMD green, the 9070 XT ladder flat to 330,700 ops, watts owed) 2026-10-06 15:58:03 +00:00
igneum-labs
e5e54a681f Counter ASIC 3.0 status: G1 AMD green on the candidate pack (interim, job 1 running) 2026-10-06 15:52:47 +00:00
igneum-labs
2df45c43fb Counter ASIC 3.0 status: the Ember run 5 rows for the 5090 (the cap never binds, 0.41 MH per W flat) 2026-10-06 15:45:39 +00:00
igneum-labs
3c62a8a9c7 Counter ASIC 3.0 status: the PC 1 AMD scripts ready (checks pass, kit verified) 2026-10-06 15:40:42 +00:00
igneum-labs
868c13b393 Counter ASIC 3.0 status: the gate run opened on mx8+sh256x27 (the project lead 16:50 UTC), the gate table 2026-10-06 15:38:44 +00:00
igneum-labs
0962364e03 Counter ASIC 3.0 status: the PC 1 AMD job queue (prepared, not published) 2026-10-06 15:13:22 +00:00
igneum-labs
4bdf9af4c3 Counter ASIC 3.0 status: the close (items 6, 7 and 8 closed; the chip model before and after; the class v4 candidate mx8+sh256x27 ready for the gate run; nine decisions for the project lead; the owed list) 2026-10-06 08:48:18 +00:00
igneum-labs
f4478a8ee1 Merge branch 'ca3-reserve' into ca3-coord 2026-10-06 08:45:48 +00:00
igneum-labs
697b8833df Counter ASIC 3.0 items 6 and 7: the RTX 5090 step-cost rows (PC 2 job run-ca3-family-pc2-20261006, every family bit-exact, mm8 included) in the bench-log and the reserve document 2026-10-06 08:45:02 +00:00
igneum-labs
aab9858068 Merge branch 'ca3-derive' into ca3-coord 
# Conflicts:
#	docs/bench-log.md
 2026-10-06 08:31:10 +00:00
igneum-labs
c6e03662a6 Counter ASIC 3.0 item 2: the RTX 5090 rows from PC 2 (bit-exact on CUDA, +1.1 s NVRTC per pack, the card-off key finding) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-06 08:30:15 +00:00
igneum-labs
881ae59779 Counter ASIC 3.0 status: the detector's two calibration findings answered (ba4a995 merged; max r 0.10) 2026-10-06 08:29:28 +00:00
igneum-labs
5b0b08e17f Counter ASIC 3.0 status: PC 2 clear, the detector and vendor-share dry rows on the live tables, the restart constraint 2026-10-06 08:26:52 +00:00
igneum-labs
cb75491b31 Counter ASIC 3.0 status: the marker guard exists in CI already 2026-10-06 08:25:02 +00:00
igneum-labs
7c53b0545a Counter ASIC 3.0 status: items 6 and 7 merged (5090 rows queued), the marker slip recorded 2026-10-06 08:24:50 +00:00