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igneum-labs
7606c1cccd adv-mixer-3 report: day 20733 Q2 k=2, Q4b, Q5 complete; Q1 k=7; Q2b 2^28 at k=3 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:10:51 +00:00
igneum-labs
a3da5fa512 adv-mixer-3 report: Q1 k=5,6; Q4 complete on day 20733 (k=1..8 inside the band); Q2 k=3 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:06:42 +00:00
igneum-labs
8d2e4d0bc6 adv-mixer-3 report: Q5 rows (no RX property from k=1), Q2 day 20733, Q2b 2^28 at k=2, Q4 day 20733, the lowest-bit trail mechanism, queue 07 run by a sibling 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 19:00:15 +00:00
igneum-labs
755b1f8958 adv-mixer-3 report: Q2 k=2 clean (margin 1 of 8 on random states), Q4b lin0 k=1..8, Q5 plant, Q4 k=7, the one-sweep-per-box rule 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:58:14 +00:00
igneum-labs
6a344663bb adv-mixer-3 report: Q2b k=1..8 (margin 1 of 8 on the round-0 input), Q3 both days, Q1 k=4 and day 20733, Q4 k=5..6, log copies 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:55:14 +00:00
igneum-labs
d89ad596e6 adv-mixer-3: times in UTC (identity grep) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:52:43 +00:00
igneum-labs
0a5cff1139 adv-mixer-3 report: header, status board, first rows (Q1 k=1..3 uniform, Q2 k=1, Q2b k=1, Q4 k=1..4 inside the band, SAT k=1 bound) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:51:42 +00:00
igneum-labs
f04358ee8a adv-mixer-3 plan: base commit and box routing noted 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:30:37 +00:00
igneum-labs
ce4b732d66 Merge remote-tracking branch 'build/master' into adv-mixer-3 2026-10-07 18:30:37 +00:00
igneum-labs
6fbcf0f542 adv-mixer-3: attack plan for the statistical distinguisher and the round margin of M_r 
Internal adversarial pass, not an independent review. Target a5d735b2 (class v4 sub-version 3). Seven questions:
exhaustive round-0 line-index census, high-N avalanche, differential, linear, rotational-XOR, SAT on the round-0
input, per-day runs. Known-failed shape per method, box-hours, the complete read set.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:29:55 +00:00
igneum-labs
63f4437f71 Merge build-server a8587452 into master on the box mirror (GitHub suspended since 18:02 BST; the box gate stamp stands in for CI; main's rule of 18:1x BST) 2026-10-07 18:23:34 +00:00
igneum-labs
a85874524f Build boxes to near max (the project lead, 7 Oct 2026 19:4x BST): the bounded class is 88 of 96 cores with -j 88 (8 reserved for release builds, the seed and the observers), the jobs rule 88 alone / 44 shared, the spill line 80; checks updated. testnet-go.md: LG-2 waived by the owner, the new gate, the seeds held armed 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:23:14 +00:00
igneum-labs
2cd6b2fade Merge ship-docs-0321 d646849f into master (gate: green on d646849f, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 18:21:29 +00:00
igneum-labs
d646849ffd release 0.3.22 section 7: the project lead moves the apps to Devnet 3 tonight (the clock), the pin 34a2dbaa with no heights and why, the app tree at 19:15 BST, PC 2's evening and the rules it added 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:17:15 +00:00
igneum-labs
7fa7d22bb6 Merge build/master into ca3-coord (release-0.3.21.md keeps both sides); Counter ASIC 3.0 status: Devnet 3's proof window, the utilisation table, the bench table, the v5 gap list, the in-house pass, the PC 1 queue 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 18:05:34 +00:00
igneum-labs
4794a8ef82 Counter ASIC 3.0 status: the Devnet 3 epoch-0 pack, the project lead's three orders and the in-house correction (class v5 now, the internal adversarial pass, the PC 1 measurements) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:54:43 +00:00
igneum-labs
c659b2c85c Site and evidence: the chip model's next test is the internal adversarial pass (three lanes new to the hash code, outsider inputs only, reports published whole), not external lots; the one outside check staged on its escrow and the publish word (the project lead's correction, 7 October 2026) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:54:43 +00:00
igneum-labs
f078116c3b release 0.3.22: proving on Devnet 3 opens (first segment submitted 18:45 BST, the sizing), the 0.3.21 warm cases end and why the relay cell reads on Devnet 3 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:52:42 +00:00
igneum-labs
313dc1f16b release 0.3.21 section 7: the Mac entry LIVE 18:41:50 BST, Windows as its own entry, the parallel installer shapes, the testnet 6ed56f63 line, the 0.3.22 pin candidate 34a2dbaa, the signing bonus paragraph 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:42:54 +00:00
igneum-labs
59284364b5 release 0.3.22 section 6: DN3 GATE PASS, the two clocks, the tree order (a) to (f) with main's floor-file ruling, the project lead's nine-switch ruling and main's height mechanics, the testnet re-arm, the 0.3.21 Windows toolchain finding 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:40:37 +00:00
igneum-labs
a8753a60c0 release plans: 0.3.21 ships as the app tree over c4459193 (section 6, the GitHub exception window from 18:02 BST, the Windows path without windows.yml, the DMG 490919d9); 0.3.22 section 5 the Devnet 3 genesis on 69d1b56e at 18:06:19 BST (gates, pairs, the program id correction, the seed left off the sweep); rule 5 names the seeds in the wave list with a read-back line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:25:23 +00:00
igneum-labs
0370961489 Counter ASIC 3.0 status: Devnet 3's pair agrees since 17:18Z (702 blocks, 0 rejected; first lock about 19:10Z on the 7,200-DAA window); the no-GitHub rule 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:20:43 +00:00
igneum-labs
e1e5db0f70 Counter ASIC 3.0 status: Devnet 3's epoch-0 program id fce15bf61030be57 (the id follows the seed; the pairing pin unchanged) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:12:25 +00:00
igneum-labs
ff2c7470c1 Counter ASIC 3.0 status: GitHub suspended (the mirror is the record), Devnet 3 mines on 69d1b56e from 17:06:19Z, the Hetzner seed still on the old object 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:09:33 +00:00
igneum-labs
dae386ef46 Counter ASIC 3.0 status: the 0.3.22 kaspa-pow suite green, master green on the pow fix, the chip texts live (incl. /claims), Devnet 3's first go refused on the genesis timestamp (8 Oct 00:00Z) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 17:03:06 +00:00
igneum-labs
e67deba19e Counter ASIC 3.0 status: the pow stop-the-line executed (ca3-v4-amend on master as 363ec7ad, igneum-pow byte-identical to a5d735b2) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:48:07 +00:00
igneum-labs
363ec7ad8c Merge ca3-v4-amend c44b4416 into master (gate: green on c44b4416, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 16:45:48 +00:00
igneum-labs
39f13fca13 Merge site-ui-5 e5e6b517 into master (gate: green on e5e6b517, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 16:45:01 +00:00
igneum-labs
c44b4416d4 Merge origin/master f8344773 into ca3-v4-amend (igneum-pow kept byte-identical to the frozen a5d735b2 per main's stop-the-line ruling; the ledger keeps both sides) 2026-10-07 16:40:29 +00:00
igneum-labs
b94c8e9f76 Counter ASIC 3.0 status: the 0.3.22 re-pin staged (bd710a36, candidate fa7f854f, byte 7 from genesis) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:39:34 +00:00
igneum-labs
0324527e03 Counter ASIC 3.0 status: the stop-the-line on master's pow suite (era-vdf's be4db4f3 against the pins), the hash lane's merge of e9cfe6c1 ordered, the condition verified 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:39:05 +00:00
igneum-labs
b8a56fea1f Merge remote-tracking branch 'origin/master' into site-ui-5 2026-10-07 16:37:57 +00:00
igneum-labs
157aeeef0e site-ui-5: the capture set after the padding sweep and the launch-first chip text (every route at 390 and 1440 dark, the three bands, the full wallet page) 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:37:57 +00:00
igneum-labs
3f5d6d3f7c site: the chip claim launch-first in the four public places (Counter ASIC lane, docs/plans/counter-asic-3-public-text-2026-10-07.md sections 1 to 4, on the project lead's "I thought we were making it 2.1 from launch?") 
Home row 03, the litepaper's chip section at /litepaper#chip-model (paragraph and table; the class v3 row last, "never the launch
state"), the miner page's line and evidence.md row 17 in its eight columns: 2.1x to 3.9x under class v4 from the first block,
class v5 removing the stored-dataset chip as a category, the 5x to 9x only as the class v3 baseline, the devnet's activation
height as a devnet fact. The litepaper's abstract carried the same claim in the old form ("5x to 9x today; class v4, now on
the vote") and now reads launch-first too. tools/ci/ledger-text-check.mjs follows the sentences (X35 on the home page and the
litepaper). No disclosure prize anywhere.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:34:12 +00:00
igneum-labs
b6d99aff16 Counter ASIC 3.0 status: Devnet 3 now (0.3.22, genesis by 17:30Z), the frozen sub-version 3 handoff (a5d735b2, byte 7, id a785001687d8688a, gates green, open items stated), the chip text rewritten launch-first 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:32:40 +00:00
igneum-labs
0aedcfb52f The chip claim, public text: rewritten launch-first (2.1x to 3.9x under class v4 from genesis; class v5; the 5x to 9x only as the class v3 baseline; the devnet's height a devnet fact) on the project lead's word 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:25:18 +00:00
igneum-labs
12dfedab35 Counter ASIC 3.0 status: the four-seed tail ruled accepted (AP-F8-1 closes), 0.3.21's first candidate passes the node gates; the lane stops for tonight 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:17:54 +00:00
igneum-labs
6ee5619fd8 Counter ASIC 3.0 status: the 0.3.20 record (publish 14:54:17Z, floor 900,000, digest 4bbbe816, sweep complete 15:39Z, earliest flip about 14 Oct 23:00Z); sub-version 3 at a5d735b2 passes both gates with the named tail, the frozen generator for 0.3.22 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:11:02 +00:00
igneum-labs
e9cfe6c1a6 Counter ASIC 3.0 gates (hash): ledger AP-F8-1, F8's 64-seed gate and exhaustion count on a5d735b2 (60 of 64, the four over = the named tail; 0 exhausted of 24,631), the node's draw-cost line 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:03:13 +00:00
igneum-labs
4e83245506 Counter ASIC 3.0 status: release-0.3.21-node staged at 96161037 (byte 5, no re-pin), the set green, the floor file's digest 4bbbe816 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 16:01:00 +00:00
igneum-labs
f74059e05b release plans on master: 0.3.20 live and swept (sections 38 and 39), the rules file with 4c and 14, the 0.3.21 plan as staged 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 15:41:42 +00:00
igneum-labs
c84bd7504b Merge era-vdf be4db4f3 into master (gate: green on be4db4f3, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:31:24 +00:00
igneum-labs
2a2ffd263b Counter ASIC 3.0 status: the hash lane's e0c77761 on origin, CI success; nothing in flight on the hash side 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 15:25:27 +00:00
igneum-labs
c88b00f578 Era VDF lane (7 October 2026): spec 04 sections 4.2, 4.4, 4.5 and 4.6 completed for the era path (the scheme byte and the hash-chain fallback, the cut rule under the O-4.3 reading, the day-of-blues input, the delay, the seed, the era constants as measured), spec 01 section 1.13.1 and era-layout.md section 8 updated, open items O-4.8 closed and O-4.10 to O-4.12 added, FUD ledger F11 updated, two decisions for the project lead in ledger-decisions.md, the record docs/analysis/era-vdf-2026-10-07.md (what was built, the parameters and measured rates, the harness gate with both runs, the cut rule for the finality lane, the verify gate, the tiers), the F7 re-roll harness against the real era cut (tools/era-vdf/reroll.mjs: --vdf off fires 6 of 6, --vdf on silent 0 of 6; the adversary evaluates asynchronously with the node's own code and is found by the node's own log line), the fast-time file's era fields 2026-10-07 15:24:22 +00:00
igneum-labs
9983f9cf6d Merge master-pin-0320 6cb15004 into master (gate: green on 6cb15004, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:20:54 +00:00
igneum-labs
bf526104e1 Merge ca3-coord f9321c88 into master (gate: green on f9321c88, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:18:58 +00:00
igneum-labs
05ee47db79 Merge bench-5060ti dfb2e621 into master (gate: green on dfb2e621, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge) 2026-10-07 15:17:18 +00:00
igneum-labs
f9321c8895 Counter ASIC 3.0 status: the census at a5d735b2 (0 lossy sites, 0 exhaustions, mean 2.086 attempts), CI success, the class check moving 2.0 percent of attempts 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 15:15:23 +00:00
igneum-labs
6cb1500410 master re-pinned to the published 0.3.20 node (c4459193): packaging/windows/node-source.pin against the live payload-inputs.json, so windows-ci's payload inputs step reads green; release rule 14, master re-pinned at every publish 
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 15:13:10 +00:00
igneum-labs
e0c77761da Counter ASIC 3.0 gates (hash): ledger AP-F8-1, the suite (103 of 103), CI and census lines at a5d735b2; the census draws in parallel 
Suite at a5d735b2 on box 2: 103 passed, 0 failed (lib 140.8 s: every class v4 draw in the tests pays the 2^20 ratio pass). CI 37639406567 success. Census: 4,099 programs, 0 lossy sites of 65,584, 0 exhaustions, mean attempt 2.086 (a3859c1f 1.998), max 17; the ratio refuses about 4 percent of candidates that pass every other test. tools/ca3-v4-uniform draws the seeds across the available cores (the serial run became a four-hour job under the ratio pass); the analysis and the row order are unchanged.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-10-07 15:10:13 +00:00