Commit graph

465 commits

Author SHA1 Message Date
igneum-josh
5cbb796051 Merge commit '22c2363' into release-0.3.11
# Conflicts:
#	docs/bench-log.md
#	docs/evidence.md
#	site/litepaper.html
2026-10-05 23:39:34 +01:00
igneum-josh
18605f425c Merge branch 'ca2-coord' into release-0.3.11
# Conflicts:
#	docs/bench-log.md
2026-10-05 23:39:12 +01:00
igneum-josh
c9b0b2c813 Merge branch 'ca2-v3' into release-0.3.11 2026-10-05 23:38:59 +01:00
igneum-josh
b38f3de386 release-0.3.10 plan: PC 2's prover restored at 22:01Z (a socket fix), the open item closed
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 23:38:37 +01:00
igneum-josh
acec0a173a Counter ASIC 2.0 status 22:38: the merged tip fa3c932, the 0.3.11 ship assigned with its inputs 2026-10-05 22:38:33 +00:00
igneum-josh
22c23639e2 prover loop: a PermissionDenied from the host names the root-owned GPU-server socket and the fix (the root-socket class); the plan's two times
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 23:38:22 +01:00
igneum-josh
fa3c93223e counter-asic-2-node.md: the integration checks on 49c7e78 (igneum-pow, packfile, the CUDA emulation, test-generic on Apple OpenCL, the fork check) all green
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 22:36:56 +00:00
igneum-josh
1d7cb94830 counter-asic-2-node.md: the integration merges (readwidth 30ff674, origin/master 1f0d62c) and how each conflict was kept
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 22:34:28 +00:00
igneum-josh
49c7e78307 Merge remote-tracking branch 'origin/master' into ca2-v3
# Conflicts:
#	docs/bench-log.md
#	proto-opencl/host.c
2026-10-05 22:34:07 +00:00
igneum-josh
076c0ab9c1 Counter ASIC 2.0: H at about 18:45Z, the G4b row's state text, the floor build green and the sweep go; status 22:33 2026-10-05 22:33:42 +00:00
igneum-josh
3566afd69c Merge branch 'readwidth' into ca2-v3
# Conflicts:
#	docs/bench-log.md
#	docs/plans/read-width.md
#	igneum-pow/src/emit.rs
#	proto-metal/packbench.swift
2026-10-05 22:33:39 +00:00
igneum-josh
430f66aa4e Counter ASIC 2.0: gate G4b green (the Metal miner across a v3 boundary; the serveDataset outage fixed); status 22:33 2026-10-05 22:33:15 +00:00
igneum-josh
6f7518ca7a counter-asic-2-node.md: gate run 4, a real Metal miner across the v3 boundary (3 v3 prepares and prepared lines, swap with no pause, 124 blocks on v3, 0 re-check mismatches); class-v3.mjs judges the Metal checks from the first v3 prepare on
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 22:32:45 +00:00
igneum-josh
9ade96f4b5 Counter ASIC 2.0: C32 rules (PC 2's update-now after the floor build; re-fetch after every app update); status 22:32 2026-10-05 22:32:44 +00:00
igneum-josh
f9a8d0c998 Counter ASIC 2.0 status 22:30: C31, Ember's run, floor-build-3 2026-10-05 22:30:56 +00:00
igneum-josh
a7be43f95d C31: the litepaper's 12 GB clause struck, the dataset schedule written as the gate 1 proposal on the site and litepaper, the merge rule for evidence row 16 and the proving sentences 2026-10-05 22:30:41 +00:00
igneum-josh
dadbcf42f4 C1: H = 210,000 lands about 19:00Z on 6 October (18:50 to 19:35), not 19:50 2026-10-05 22:27:36 +00:00
igneum-josh
d73894218e Counter ASIC 2.0 status 22:27: the integration merge plan and the ship order 2026-10-05 22:27:04 +00:00
igneum-josh
f4e57d2fde Counter ASIC 2.0: the fourth eGPU drop in the hardware events, the era branch final, PC 1 to Ember; status 22:25 2026-10-05 22:25:24 +00:00
igneum-josh
7e6f77c8f9 C29 and D11: the verifier line on the fixed crate, the bounty struck until escrowed, the final-class rates in the public tables; status 22:25 2026-10-05 22:25:02 +00:00
igneum-josh
608d74a1e4 Counter ASIC 2.0: gates G1 and G2 green on the final class; spec 1.17 fingerprints; status 22:24 2026-10-05 22:24:19 +00:00
igneum-josh
6ada41fe31 Counter ASIC 2.0 status 22:23: floor-build-1 failed on its log path, floor-build-2 running 2026-10-05 22:23:46 +00:00
igneum-josh
033c4f310a Counter ASIC 2.0: G4b (a) done, app e0de2ab; status 22:23 2026-10-05 22:23:07 +00:00
igneum-josh
ac9f978c4b Counter ASIC 2.0: gate G4b (the Mac mines v3: the app's --prepare-packs gap and the Metal gate run); status 22:21 2026-10-05 22:21:57 +00:00
igneum-josh
32f4ddd3fa Counter ASIC 2.0: gate G4 run 3 green on the final class; status 22:20 2026-10-05 22:20:42 +00:00
igneum-josh
8e65696ce9 Litepaper: the verifier figures on class v3; status 22:20 2026-10-05 22:20:18 +00:00
igneum-josh
5eb2331567 counter-asic-2-node.md: gate G4 run 3 PASS on the final class (x8 with the era, d233fa1): 182 / 122 blocks, 0 rejected, 0 forks; suite job 4 green (G6)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 22:20:16 +00:00
igneum-josh
939ded01c8 Bench log: Counter ASIC 2.0, the numbers (the level 3 page section); litepaper anchor 2026-10-05 22:20:05 +00:00
igneum-josh
00f0fae4ca Counter ASIC 2.0 status 22:19: proving-methods recorded 2026-10-05 22:19:18 +00:00
igneum-josh
ba8379dd72 evidence.md rows 17, 18, 19 on the measured class v3: the chip model, the latency bound, the soundness and bit-exactness 2026-10-05 22:19:12 +00:00
igneum-josh
cabec3b8bb Site and litepaper: level 1 on the hero and abstract, the chip bullet on the measured row; the level 3 table filled; status 22:18 2026-10-05 22:18:39 +00:00
igneum-josh
f1c0584d1f Spec 01 1.13.1: the class v3 era draw (stride, interleave, windows) as decided, with the devnet stand-in and the measured spread 2026-10-05 22:17:59 +00:00
igneum-josh
2e367afea5 Spec 01: class v3's mixer x8 form in 1.8.5 with the measured costs, the class v3 vectors in 1.17, the cache note in 1.5 2026-10-05 22:17:33 +00:00
igneum-josh
dc9cbfdd8d Counter ASIC 2.0: gate G6 green; status 22:16 2026-10-05 22:16:50 +00:00
igneum-josh
b874b8a9b9 Counter ASIC 2.0 status 22:16: the 5090 power sweep, the G2 job go 2026-10-05 22:16:15 +00:00
igneum-josh
fc9b07dae9 counter-asic-2-node.md: the verifier before/after table (the mixer fix), class v3 = x8, the merges and checks on d233fa1
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 22:15:18 +00:00
igneum-josh
357fa52494 Counter ASIC 2.0: the final-vectors package, the bash-body-check branch in the 0.3.11 tree; status 22:15 2026-10-05 22:15:07 +00:00
igneum-josh
9881c885d1 Counter ASIC 2.0 status 22:13: suite job 4 published on the final tree 2026-10-05 22:13:25 +00:00
igneum-josh
684aa510f2 Counter ASIC 2.0: the verifier fix and the x8 class committed; status 22:11 2026-10-05 22:11:49 +00:00
igneum-josh
d233fa1990 Merge branch 'ca2-mixer' into ca2-v3 2026-10-05 23:11:29 +01:00
igneum-josh
26fedaf7f7 Counter ASIC 2.0 status 22:11: the toolchain check, the build held behind job 4, C26 and C27 2026-10-05 22:11:10 +00:00
igneum-josh
4173a0ef65 plan: the self-built CUDA server's packaging row before 0.3.12 (arch list, builder, signing, DMG and WSL2 placement, evidence note, rebuild at each SP1 upgrade, the verifying keys unchanged)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 23:10:55 +01:00
igneum-josh
1ab8b2113e verifier regression of 0fc0ad1 fixed (derive_items out of line, one instance per cache size with the line mask a constant: v2 0.609 ms per unit against readwidth's 0.607, was 1.33); x8 into class v3 under the delegated rule (V3_CLASS = MX8; mx8-genesis and mx8-devnet-epoch0 re-exported through the seam, the devnet one with the era inside; the mx4 packs kept as the x4 record, generator 2); tests/packs.rs and tests/mixer.rs on the x8 class; mixer-x4.md 6.2a, 6.4a, 6.5 decision, 6.6 the regression; chip-model-v3.md headline x8 (0.92x with the factor); bench-log addendum with the PC 1 build rows
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 22:10:55 +00:00
igneum-josh
45f7c2e919 Counter ASIC 2.0 status 22:09: the fork test fixed at 89dfcb95 2026-10-05 22:09:59 +00:00
igneum-josh
6a705a2db8 counter-asic-2-node.md: suite job 3's result (kaspa-pow test rewritten for the era-in-class rule), the G6 reading corrected (the PC runs the feature-gated tests)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 22:08:44 +00:00
igneum-josh
dbe94761f2 Counter ASIC 2.0: G6 job 3 failed on a stale fork test, job 4 on the final tree; status 22:08 2026-10-05 22:08:07 +00:00
igneum-josh
aa977932eb Counter ASIC 2.0: mixer x8 decided into v3 on the PC build rows; status 22:06 2026-10-05 22:06:59 +00:00
igneum-josh
4e733bbd55 Merge branch 'ca2-mixer' into ca2-v3 2026-10-05 23:05:05 +01:00
igneum-josh
84e999aefb counter-asic-2-node.md: the three PC 2 suite jobs (the flake, the kaspa-consensus rerun passed, job 3 pending)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-10-05 22:04:29 +00:00
igneum-josh
5f05b89f9a Counter ASIC 2.0 status 22:03: the PC 2 prover back, suite job 3 published 2026-10-05 22:03:35 +00:00