igneum-labs
|
6443f921e9
|
Counter ASIC 3.0 status: the 0.3.25 pairs on 7bd2940f and the re-pointed app tip c68aea33 (every input green at 10:33 bar the pin's gates and the crossing), main's sweep finding (class v5 17 percent under v4 on a power-capped A4000; a knee-locked card may lose a few percent at the crossing until Ember re-tunes) and its two orders with their defaults
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:48:45 +00:00 |
|
igneum-labs
|
daba2e69d2
|
Counter ASIC 3.0 status: the 10:05 move's read-back (36 of 36 on the pin by 10:12, the first lock 10:06:32, carrying resumed; three fault classes named), the tiers gated (d3d0704a), the knob's tip e2962b89, the 0.3.25 app line assembled at 10:29 (e0d4425f), the node line's tip 7bd2940f with the one-shot gossip fix and the drift item reclassified
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:31:37 +00:00 |
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igneum-labs
|
01a160456e
|
Counter ASIC 3.0 status: the 0.3.25 plan (the shipper's), main's word (the tiers both halves, gated) and the founder's word (0.3.25 today: the app line by 12:30, the pin by 13:00, the move after the 68,400 crossing reads clean, about 13:30), card-in ready, the tiers' UI half merged, the second deploy (a90fde64), the node line placeable ahead of its minute (c6629572), the knob's tip e2962b89, the Hetzner boxes on the founder's word
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:20:01 +00:00 |
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igneum-labs
|
3f61c91d04
|
Counter ASIC 3.0 status: the site deployed (cbd29023 at 10:00 BST), row 17's floor sentence and the Arc row restored (85ad7421), the 0.3.25 node build's shape and main's word on the fee ceiling (no second object cut today), class-v5 8f481459 gated with the Intel fix, the per-process gh fix on master (1db6b438), the AMD knob for tonight's cut, the 0.3.24 move FIRED at 10:05:00 BST (the Mac entry and the hive live 10:08:35, the three nodes on the pin, class v5 at 68,400 about 12:54)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:11:58 +00:00 |
|
igneum-labs
|
a90fde6446
|
Merge ca3-coord-record 6ff93415 into master (gate: green on 6ff93415, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 09:07:55 +00:00 |
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igneum-labs
|
6ff93415fc
|
Counter ASIC 3.0 status: the gh switch owned by the attack-pass lane and the rule to every lane, the Intel fix on master (dabd0fea), the pairs on the pin, class-v5 a55fcc10 and the rebuilt kit (65b47211), the AMD grid prepared, the AP-F8-1 record line (59572d37) and the card-in job, the in-house pass's last landing (96262264), the attack-pass tail (2f1ce097), the signal-15 hook note
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 09:01:49 +00:00 |
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igneum-labs
|
85ad74213c
|
Merge spec-accept-23 a4efbc46 into master (gate: green on a4efbc46, recorded by tools/ci/pre-push.sh; landed on the box mirror)
|
2026-10-08 08:59:34 +00:00 |
|
igneum-labs
|
cbd290232b
|
Merge ca3-coord-record 1cf233f6 into master (gate: green on 1cf233f6, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 08:58:40 +00:00 |
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igneum-labs
|
2f1ce097ca
|
Merge attack-pass 278e75e7 into master (gate: green on 278e75e7, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 08:55:29 +00:00 |
|
igneum-labs
|
962622640c
|
Merge crypto-engage 48b5525a into master (gate: green on 48b5525a, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 08:54:42 +00:00 |
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igneum-labs
|
59572d3796
|
Merge ca3-v4-amend ed85185a into master (gate: green on ed85185a, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 08:54:04 +00:00 |
|
igneum-labs
|
a4efbc4657
|
Merge build/master dabd0fea into spec-accept-23 (the Intel rotr worker fix taken; /miners rebuilt from the merged bench data)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:52:59 +00:00 |
|
igneum-labs
|
1cf233f66b
|
Counter ASIC 3.0 status: the move's readings and the pin line on 5b673577, the founder's standing rule (defaults and deadlines; the shipper's clocks mirrored) and its distribution, the Arc self-test read (the shipped workers right, the kit lacking the Intel rotate fix), the AMD knob opened (a002732a), the F8 tail attributed on the Mac (a per-site bucket concentration), the fast-time PASS and the minute 10:05:00 BST, the gh exception on the Mac, adv-accept closed (BOUND, no BREAK)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:51:32 +00:00 |
|
igneum-labs
|
278e75e74f
|
attack-pass: the status board, F8 row, gate line and re-gate paragraph read the tail as attributed
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:49:21 +00:00 |
|
igneum-labs
|
48b5525a1f
|
in-house-pass.md: adv-accept closed (15.1 box-hours, 796,042 accepted programs, BOUND, no BREAK); the pass's totals final
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:48:22 +00:00 |
|
igneum-labs
|
4d193c31cb
|
attack-pass: AP-F8-1 tail attributed (p4, p8, p10, p34 as per-site bucket concentration at a narrow-window site; the largest-bucket bound named for a next class)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:48:03 +00:00 |
|
igneum-labs
|
ed85185abf
|
ledger AP-F8-1: the four-seed tail attributed (8 October 2026 Mac read at 2^24): one narrow-window site per seed, a quarter-bit bucket concentration from a mad, xor or sub writer, no lossy source, no chip consequence; the per-site bucket bound is a morning item
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:47:41 +00:00 |
|
igneum-labs
|
978ea619e6
|
Counter ASIC 3.0 status: main's morning words (the look landed, the floor sentence to row 17, CA4 parked, the Mac rule lifted for the F8 tail, route (A) at 10:45 BST), the build-server lane's honest state and the deploy and pairs plan, the fourth cut 5b673577 (floor 68,400), the Arc B580's self-test fault on both classes and the Intel kit held out of 0.3.24, the design pass on master (e59b127a)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:40:46 +00:00 |
|
igneum-labs
|
e8da833a16
|
Evidence row 17: the in-house pass's floor reading beside its sentence (nine of nine hot sets refused; the diffuse era-stride excess, bounded under 0.1 percent of a hash's reads per site, is not caught by the floor and is the next class's test; measured 8 October 2026, ledger AP-F8-1 and AP-F8-6); /evidence rebuilt
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 08:33:21 +00:00 |
|
igneum-labs
|
8e4eb37b2e
|
Counter ASIC 3.0 status: the 9070 XT bench row on master (the AMD watts no longer owed), the hot-table ldcs rows (a dead lever; the hot family latency-bound), the PC 1 list main set closed on measured rows
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 07:13:01 +00:00 |
|
igneum-labs
|
4b603b28f5
|
Merge ca3-v4-amend 2fa54cc6 into master (gate: green on 2fa54cc6, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 07:11:38 +00:00 |
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igneum-labs
|
2fa54cc664
|
bench-log: the hot-table packs on the RTX 5090, ldcs against base, unlocked and at the 1,300 MHz lock (36 rows, all PASS; ldcs dead, the hot packs lose 2 percent to the lock where mx8 loses 7.5)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 07:05:19 +00:00 |
|
igneum-labs
|
41f90af1b6
|
Merge ca3-coord-record 14c453b4 into master (gate: green on 14c453b4, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 06:27:36 +00:00 |
|
igneum-labs
|
489f4ff5bd
|
Merge ship-docs-0321 b8e0772d into master (gate: green on b8e0772d, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 06:25:18 +00:00 |
|
igneum-labs
|
14c453b4ca
|
Counter ASIC 3.0 status: the 5080 Ember tune (the lock worth +40 percent per watt over the stock climb; the knob's case), the knob on release-0.3.24 (8bb0e288), the 9070 XT tune (no AMD knob in 0.3.20; 18.9 MH/s at 202 W; the AMD core-clock knob a morning item), the hot-table job the last on PC 1
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:21:16 +00:00 |
|
igneum-labs
|
b8e0772d1d
|
release 0.3.22 section 21: the core-clock knob cherry-picked onto release-0.3.24 (the union with the efficient-point ceiling), the measured Ember line from PC 1
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:19:49 +00:00 |
|
igneum-labs
|
544e4037b5
|
Chip model 5.11 and new-pow 5.1: the per-MAC figures corrected by the per-lane tile count (32 MACs per tile, not 1,024; the 4090's 0.056 pJ is 1.8 pJ, the 5090 reads 2.9 and 1.5 at the shadow's premium), the tensor-tile column withdrawn (a chip's k on tile work 0.03 to 0.3, below the ALU shadow's); Counter ASIC 3.0 status: the microbench's correction, the night's closing sentence on measured rows, the CA4 file's commits
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:08:07 +00:00 |
|
igneum-labs
|
89ef71e6c0
|
Counter ASIC 3.0 status: the microbench on the 5090 (20 probes at both states; shfl 55.8 pJ, mul 13.9, mulhi 39.6 against the ARX op's 11.3; int8 mma 1.36): the re-weight's re-opening condition not met on measured rows, the tile block's case in measured picojoules
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 06:00:29 +00:00 |
|
igneum-labs
|
db91345e43
|
Counter ASIC 3.0 status: rank 2 closed in the CA4 file (the premium is the ops' energy whatever carries them), the op-mix re-weight's case to main as HOLD with its four-line basis and the condition that re-opens it
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 05:23:57 +00:00 |
|
igneum-labs
|
a86e62e5be
|
Counter ASIC 3.0 status: the SM-sparse reading exists (a quarter of the SMs holds 98.2 percent of the class v4 rate at the same draw; the premium is the shadow's ALU work, the SM-sparse candidate dead; the op-mix re-weight's case to main)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 05:16:37 +00:00 |
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igneum-labs
|
7c4a74fd90
|
Counter ASIC 3.0 status: F1's record on master (7d22bc0b; lane (d) complete with its box-hours), the v5 lane's night closed (class-v5 1095eaa8 gated GREEN, 72 checks)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:37:03 +00:00 |
|
igneum-labs
|
004738ac5a
|
Merge ca3-coord-record abda374a into master (gate: green on abda374a, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 04:36:04 +00:00 |
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igneum-labs
|
abda374a41
|
Counter ASIC 3.0 status: class-v5's F1 row on both mirrors, the CA4 packs on the 5090 (the tile premium 0.103 W per tile unlocked, 0.050 at the lock; every sound pack memory-bound), the prototypes' first sentence on measured rows (neither beats class v4's premium; the per-load class dead; the tile block at parity with the ALU shadow and worse at the chip's k), the k column's basis measured
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:29:48 +00:00 |
|
igneum-labs
|
7d22bc0bab
|
Merge attack-pass 28e76a0b into master (gate: green on 28e76a0b, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 04:29:30 +00:00 |
|
igneum-labs
|
0730ff1fa8
|
Merge ca3-coord-record 1be7ba27 into master (gate: green on 1be7ba27, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 04:28:50 +00:00 |
|
igneum-labs
|
4559fcc200
|
Merge ship-docs-0321 a5ddc127 into master (gate: green on a5ddc127, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 04:27:46 +00:00 |
|
igneum-labs
|
28e76a0be6
|
attack-pass lane (d): F1 shadow redundancy on the frozen class v5 tip f2267bb6, 10^5 programs, max 4.688 percent, 0 mismatches, PASS (the 0.3.24 gate line; AP-F1-1 FIXED-AND-PASSED on v5)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:22:29 +00:00 |
|
igneum-labs
|
1be7ba2776
|
Counter ASIC 3.0 status: the census harness's progress line and flushed partial (known-failed PASS), F1 PASS on class v5 (100,000 programs, max 4.688 percent saved, 0 soundness mismatches, 05:20 BST); the attack board on class v5 complete
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:22:26 +00:00 |
|
igneum-labs
|
a5ddc1270f
|
release 0.3.22: the attack-pass record lines (F9 and F1 PASS on the full 10^5), PC 1 overnight
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:22:12 +00:00 |
|
igneum-labs
|
09598f434b
|
attack-pass: F1 record section 12, the census flush and its known-failed test (2,000 rows after a kill at 2,000, PASS)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:08:52 +00:00 |
|
igneum-labs
|
595b0a7bd2
|
Counter ASIC 3.0 status: the pass's close at master 4b45b2bd, the fourth --variant fix (the capture's off-by-one, ca4sparse5), adv-accept off build-1 for F1's census and one holder yielded to the flush test, adv-cache-2 closed (2^36 reads at the control's values)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:02:45 +00:00 |
|
igneum-labs
|
86bb79ff56
|
in-house-pass.md: adv-cache-2 closed (s2c PASS; 2.35 box-hours; the line census at 2^36 reads)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 04:00:29 +00:00 |
|
igneum-labs
|
2bdd0b3ad4
|
Counter ASIC 3.0 status: class-v5 gated and 4a162aba pushed, the lane (d) merge on master (c2e108ee: F9 PASS, the F1 row as running, the harness progress line owed), the SM-sparse question's third run stopped at NVRTC on the rewrite's CRLF name capture (the fourth fix ordered), the microbench running
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 03:55:32 +00:00 |
|
igneum-labs
|
c2e108eea3
|
Merge attack-pass c9d83d16 into master (gate: green on c9d83d16, recorded by tools/ci/pre-push.sh; the full gate runs in CI on this merge)
|
2026-10-08 03:16:35 +00:00 |
|
igneum-labs
|
61d683f2ce
|
Merge ca3-coord-record be2b7873 into master (gate: green on be2b7873, recorded by tools/ci/pre-push.sh; landed on the build mirror)
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2026-10-08 03:15:58 +00:00 |
|
igneum-labs
|
4b45b2bdcc
|
Merge crypto-engage c76e6b39 into master (gate: green on c76e6b39, recorded by tools/ci/pre-push.sh; landed on the build mirror)
|
2026-10-08 03:14:50 +00:00 |
|
igneum-labs
|
c9d83d16ff
|
attack-pass: founder-strings scrub on the pass record (the gate's third never-push class)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 03:10:09 +00:00 |
|
igneum-labs
|
be2b7873e4
|
Counter ASIC 3.0 status: the step-budget fix and the GitHub guard on master, the SM-sparse rerun's second failure named and the third fix, class-v5's F9 row pushed, F1 read as computing to about 10:00 BST and the lane (d) merge ruled, the in-house adversarial pass closed at 04:08 BST (nine lanes, about 30.4 box-hours, USD 0.33, no break of the frozen object)
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 03:09:37 +00:00 |
|
igneum-labs
|
e49a51c713
|
Merge remote-tracking branch 'build/master' into attack-pass
# Conflicts:
# docs/analysis/attack-pass-2026-10.md
|
2026-10-08 03:08:58 +00:00 |
|
igneum-labs
|
c76e6b3971
|
in-house-pass.md: the close (section 14): every lane's final tip, box-hours and verdict, the totals, the pass's verdict in one paragraph
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
|
2026-10-08 03:08:04 +00:00 |
|