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# Class v6: the connected-state variant (8 October 2026)
The experiment of the external review the founder accepted (the 15:4x BST rules): the remaining chip edge (about 2.0x to 2.2x node-for-node, 2.2x to 2.6x a node ahead) survives because a specialist can separate storage, arithmetic and memory scheduling. This lane reorganised the class v5 work, same dataset, same read width (4 bytes), about the same operation count, so that live state feeds each load address, the memory result feeds mixed arithmetic and cross-lane exchange, and that updates the live state for the next address, with a 64-register window per lane that stays necessary across the whole dependent chain. Research class only, behind `--class cs<W>s<S>x<R>` in `igneum-pow` (`igneum-pow/src/connected.rs`, branch `class-v6-connected` on the box mirror); never a chain class.
Every number below is measured unless marked modelled or owed. Times are UK (BST).
## 1. The structure
| Item | Class v5 (`mx8+sh256x27`, the control) | Connected state (`cs64s27x16`) |
|---|---|---|
| Registers per lane | 8 | 64 (the window) |
| Per iteration | 64 base instructions with 16 loads, then a 256-instruction block run 27 times | 16 steps: a load, then a 27-instruction block run 16 times |
| Load address | a base register, `x & MASK` (the era stride and site window under an era) | a window register, the same address rule |
| Memory result | xor into the load's destination | xor into `r[m_j]`; block instruction 0 reads it |
| Next address | whatever register the next load reads | written by the block's last instruction (add, sub, xor or shfl) from a fresh spine |
| Result | fold of 8 registers | fold of all 64 (`lo` over the first 32 at 7 i, `hi` over the second 32 at 9 i; the v5 fold at a window of 8) |
| Loads per hash | 128 | 128 |
| ALU instructions per hash | 55,680 (55,296 shadow + 384 base) | 55,296 (0.7 percent fewer) |
| Instruction text per iteration | 320 | 448 |
| Negative controls kept out | | no long program (1,024), no select tree, no wide read (W = 16), no scratchpad |
The draw (deterministic from the seed words, attempt k re-seeded as every class): per step `a_j` then `m_j != a_j` (and the era window draws); per block instruction the op from the ten non-load families at the v5 weights, the source from the last four spine entries (the memory result first), the destination uniform over the window, the two immediates, the rotation, the selector bit and the shuffle mask. Four rules the first census pass forced, each a construction rather than a filter:
1. The cover: the first 64 injecting destinations walk a drawn permutation of the window, so every register takes an injecting write (rule (b)); a uniform draw left one register without one in about 70 percent of candidates.
2. The fresh spine: only destinations of add, sub, xor, mad and shfl enter the spine, so every address is fresh by dataflow (rule (a')); with a lossy spine every seed exhausted 256 attempts.
3. Lossy ops feed the next injection: or, mul and mulhi write the register the next injecting instruction of the block writes, so their value enters the chain and no register accumulates a lossy op across the 16 passes (a 16-pass or saturated a register the block never re-injected, a 16-pass mul cleared its low bits: rule (c) refused every candidate).
4. The two closing instructions of a block come from add, sub, xor and shfl (the census lane's rule for a load source's writer): no product on the address writer (a 16-pass mad on the address register read bit z 57.6 at one site).
The acceptance rule is the sub-version 3 rule over the window: (b), (a') (the fixpoint over the iteration's execution order), (c) over 64 units (constant bits per register, lane-constant sites, saturation at 1 percent of the window's final values, saturated sources, output bias, distinct addresses, the value-level index-bit read judged inside the site's era window), then (c'') at 0.98 and (c''') at 0.995 over 2^20 evaluations per site. (a) holds by construction.
## 2. Liveness (seed `igneum-v6c/0`, attempt 0, program id 9ad55de91485542b)
The tool (`igneum-pow liveness --class cs64s27x16 --seed <s>`) walks the unrolled trace of one hash (128 loads, 55,296 ALU instructions). `live` is the backward set at an address: registers whose value just before the load feeds this or any later address. `dep` is the forward set: registers at the previous address whose values feed this address.
| Measure | Value |
|---|---|
| live before each address | 63 of 64 at every address until the last iteration's tail; iteration 7: 63 62 60 60 60 57 57 54 53 51 45 36 25 20 9 1 |
| registers read by the result | 64 of 64 (the fold) |
| dep per step (the same every iteration, the text repeats) | 1 9 13 14 8 15 7 8 12 14 14 13 10 9 14 9; mean 11.2 of 64 |
| registers touched per block (read or written) | min 16, mean 20.4, max 24 of 64 |
| reads per register per hash | min 384, mean 1,724, max 3,208 |
| writes per register per hash | min 128, mean 866, max 1,664 |
| op mix of the 432 block instructions | add 82, mul 62, xor 51, shfl 51, sub 46, mulhi 39, rotl 35, mad 31, rotr 20, or 15 |
Meaning: the whole window is necessary over the hash (no register can be dropped or parked for long: the longest gap between writes to one register is under one iteration), and every value is read by a later address, so there is no side calculation a specialist can move to a separate engine. The dependent chain per step is narrow: about 11 of the 64 registers at one address feed the next address through 432 operations, and a block touches about 20. That is the shape a specialist will exploit: a two-level file, about 20 registers hot per step and 44 warm, the hot set moving along the text; the k lane prices exactly that (section 5). The program listing is `liveness.txt` and `program.json` of the pack.
## 3. Census (the census lane's sub-version 3 harness, `tools/attack/v6-census/v6census.sh`, (c''') 0.995 on, on a rented 5090 host with 40 threads, 16:01 to 16:08 BST)
| Run | Seeds | Accepted | Exhausted | Rejections per candidate | Mean attempt | Max attempt | Window-bit refusals | Over 6 sigma (reported) |
|---|---|---|---|---|---|---|---|---|
| cs64 no era | 256 | 256 | 0 | 0.283 | 0.39 | 5 | off | 146 of 256 (max z 128) |
| control `mx8+sh256x27` no era (census lane, build-3) | 256 | 256 | 0 | 0.668 | 2.01 | 18 | off | 143 of 256 (max z 97) |
| cs64 eras 0 to 7, window-bit refusal on | 8 x 32 | 256 | 0 | 0.635 | 1.74 | 8 | 306 | 0 (max z 5.9) |
| control eras 0 to 7, refusal on (census lane, build-4) | 8 x 32 | 256 | 0 | 0.830 | 4.87 | 22 | 218 | 0 (max z 5.9) |
| cs64 eras 0 to 7, refusal off | 8 x 32 | 256 | 0 | 0.304 | 0.44 | 2 | off | 94 of 256 (max z 71.5) |
The no-era rejections are all rule (c) (constant bits, saturation or bias in the 64-unit test); the control's are mostly (a') and (a), which this class satisfies by construction. The window-bit refusals sit on eras 0, 1, 4, 5 and 6 (55 to 64 each) and nearly vanish on eras 2 and 3 (0 and 1): the product-bit class (a product's low bits reaching an address bit through the era stride), the same class the control carries and the layer-1 index fold removes; this class does not change it either way.
F8 form (`igneum-pow cs-uniform`, 16 seeds x 2^20 nonces, no era): the top 0.1 percent item share reads 0.9987 to 1.0016 of a uniform control of the same size (the control class 0.9993 to 1.0016); the worst per-site distinct ratio 0.9941 (seed 9, site 9; the sequential-nonce sample of the F8 tool, the acceptance's own 2^20 sample passed 0.995 on every accepted program).
Meaning: the class censuses at least as well as v5 on every instrument of the harness and takes fewer attempts; it inherits v5's product-bit bias and the fix is the same fold. The acceptance costs about 3.7 s per candidate on one core (the (c'') pass dominates, 7 G lane-ops), against v5's 2.8 s.
## 4. GPU cost
Instrument: the class v5 nvcc harness (`proto-newpow/class-v5/bench.cu` on `box/ds55-v5`, the v5 design page's 4090 rows), compiled per pack with `-Xptxas -v`, 250 batches of 2^24, nvidia-smi at 1 Hz, both packs on the same card minutes apart; vectors 3 of 3 PASS and the dataset self-test PASS on every row. The cs64 pack is over the class v4 memory-hard dataset (no leaves); v5-genesis carries its 93 leaves. Stock means the card's own power limit and no clock lock.
| Card | Pack | MH/s | Mean W | Microjoules per hash | Registers per thread | Spills | Resident blocks per SM (1 warp per block) | Fingerprint of 2^24 at base 0 |
|---|---|---|---|---|---|---|---|---|
| RTX 5090 (Vast 54862507, driver 580.159.03, 575 W cap), stock | cs64s27x16 | 64.93 | 574.8 | 8.853 | 80 | 0 | 24 | ad0cec2a42c84aff |
| RTX 5090, the same card | v5-genesis | 65.30 | 574.8 | 8.803 | 48 | 0 | 24 | ae74193ddad19e19 |
| RTX 4090 (RunPod 386yytbh4bkfnz, driver 580.159.04, 450 W cap), stock | cs64s27x16 | 62.44 | 268.8 | 4.305 | 87 | 0 | 20 | ad0cec2a42c84aff |
| RTX 4090, the same card | v5-genesis | 62.44 | 271.3 | 4.345 | 32 | 0 | 24 | ae74193ddad19e19 |
| RTX 5090 on PC 1 at the 1,300 MHz lock | both | OWED: PC 1 booked to 17:40 BST; the bound pack and the kit are at build-1:/srv/builds/igneum-wt-connected/cs-kit (sha c9aff54aaf10d79e) and the hash lane publishes the job when PC 1 frees | | | | | | |
The kit worker (the brief's instrument, `igneum-worker-cuda --bench --batch-log2 24 --batches 250`, the class v5 kit's NVRTC worker of 7 October loading the pack's `kernel_bound.cu`; check PASS on both packs):
| Card | Pack | MH/s | Mean W | Microjoules per hash | Registers per thread | Fingerprint |
|---|---|---|---|---|---|---|
| RTX 5090 (the Vast card above), stock | cs64s27x16 (bound pack) | 62.88 | 574.2 | 9.131 | 80 | ad0cec2a42c84aff |
| RTX 5090, the same card | v5-genesis | 62.96 | 571.4 | 9.076 | 48 | ae74193ddad19e19 |
| RTX 4090 (the RunPod card above), stock | cs64s27x16 (bound pack) | 62.41 | 269.4 | 4.317 | 87 | ad0cec2a42c84aff |
| RTX 4090, the same card | v5-genesis | 62.39 | 271.9 | 4.358 | 32 | ae74193ddad19e19 |
Both instruments agree with each other on each card (the harness and the worker within 3 percent of rate) and agree on the comparison: the window moves energy per hash by +0.6 percent on the 5090 (harness and worker alike) and by -0.9 percent on the 4090 (harness and worker alike), inside the run-to-run noise of a power reading. The 4090 is not at its cap (269 W of 450) and both packs read the same rate to three figures, so there the hash is bound by the memory chain, not the ALU or the register file; the 5090 is at its 575 W cap and the window costs under 1 percent of rate. (The fingerprints are the same on both cards and both instruments: ad0cec2a42c84aff for cs64, ae74193ddad19e19 for v5-genesis.)
Meaning: at stock the window costs the 5090 0.6 percent of energy per hash against a 10 percent budget; the compiled allocation is 80 registers per thread with no spill, so the window is in registers, not local memory, and the occupancy under this harness is the same as v5's. The harness reads 65 MH/s where the NVRTC worker reads about twice that on a 5090 (one warp per block, 24 resident blocks); the ratio between two packs on the same harness is the measurement, the absolute rate is not. The lock row is where the energy comparison binds (the 5090 at the lock reads 2.33 microjoules per hash on v5); the stock rows say the card is bound by its power cap in both cases and the window moves the rate by under 1 percent.
## 5. The chip side
The k lane (floor lane 2) priced the re-optimised core on the drawn program at 17:2x BST (synthesis only, a model and never a lower bound; its placed row is due 21:00 as an amendment). The core: 8 lanes, a 64 x 32-bit window per lane in clock-gated flops (a macro file reads within 5 percent), a 512-entry imem holding the 448-instruction text, one in-order op per cycle per lane (the spine's ILP is met by lane count, which is free), every class unit, the load's fold on the address path; gate-level random-input VCD, every pin annotated; 253,059 cells.
| Row (the k lane's) | pJ per lane-op, ASAP7 | N5 (the card's node) | N3 | N2 | k at the 1,300 lock, N5 / N3 / N2 | k at stock, N5 / N3 |
|---|---|---|---|---|---|---|
| cs64s27x16, the re-optimised core (gated window, 512 imem) | 6.3 | 4.4 | 3.2 | 2.3 | 0.71 / 0.51 / 0.37 | 0.39 / 0.28 |
| the same window on the class v4 draw, 256 imem | 6.2 | 4.3 | 3.1 | 2.2 | 0.70 / 0.50 / 0.36 | 0.38 / 0.27 |
| the adversary's 32-register base, gated (the genesis window) | 4.5 | 3.2 | 2.3 | 1.6 | 0.51 / 0.37 / 0.26 | 0.28 / 0.20 |
| the GPU-shaped 64-register core, ungated (shadow-k.md, the earlier default) | 9.7 | 6.8 | 4.9 | 3.5 | 1.09 / 0.78 / 0.56 | 0.60 / 0.43 |
What the adversary's re-optimisation did to each part of the structure: the gated file charges only the register written, so the whole-window liveness costs it nothing beyond the write it would make anyway and the hot-20 banking of section 2 is not even needed; the 16-pass loop and the 448 text cost the shared imem 0.1 pJ per lane-op; the narrow per-step chain sets the lane count, which is free. The window itself is worth +1.2 pJ per lane-op at N5 over the genesis window (+0.14 of k at the lock), the same knob as the design document's 64-register row; the connected organisation around it adds about 0.1 pJ. The placed ungated core came in 64 percent over its synthesis, so the placed figure is expected near 8 to 10 pJ at ASAP7 (k node-for-node near 0.9 to 1.1, approximate); both rows move together and the ratio below holds.
## 6. The score and the verdict
E_GPU over E_adversary, absolute convention, GDDR7 board (E_mem 0.466 microjoules per hash), E_chip = E_mem + 55,296 x e_chip, E_GPU = the 5090 at the lock (2.33 microjoules per hash on class v5) x 1.006 for the window (the stock rows of section 4; the lock row is owed):
| Core | Node-for-node (N5) | A node ahead (N3) | Two nodes (N2) |
|---|---|---|---|
| cs64s27x16, re-optimised | 2.344 / (0.466 + 0.243) = 3.3x | 2.344 / (0.466 + 0.177) = 3.6x | 2.344 / (0.466 + 0.127) = 4.0x |
| the genesis window (the control) | 2.33 / (0.466 + 0.177) = 3.6x | 2.33 / (0.466 + 0.127) = 3.9x | 2.33 / (0.466 + 0.088) = 4.2x |
| the window's effect on the chip's edge | 1.10x | 1.08x | 1.05x |
On the placed figures (both rows 64 percent higher) the pair reads about 2.2x and 2.4x node-for-node and the ratio stays near 1.1x. The gate was 1.25x node-for-node for the 1.5x one-node-ahead ambition; the row reads 1.10x node-for-node and 1.08x a node ahead.
**Verdict: KILL as a class.** The hypothesis was that a connected organisation of the same work, with the window independently necessary across the whole chain, would deny a specialist its separation of storage, arithmetic and scheduling. It does not: the liveness rows show the window is necessary (63 of 64 at every address) and the chip answers with a clock-gated file that pays per write, not per live register, so necessity costs it nothing; the only term that reaches the chip is the window's own width (+0.14 k at the lock), which the design document already holds as its one robust core knob, and the connected structure adds about 0.1 pJ around it. The GPU side passes its budget with room (+0.6 percent of energy per hash at stock on the 5090, -0.9 percent on the 4090, 80 to 87 registers per thread with no spill), and the census passes every instrument with fewer attempts than v5; neither moves the score. The founder's accepted review stands in a sharper form than before: a specialist's edge against this family is a per-op energy ratio on a known op mix, and reorganising the dependency graph of the same ops does not change what an op costs on either side.
What is kept: the generator variant and the liveness tool (research class, behind the flag) for the v7 tests below; the measured fact that a 64-register window costs a card under 1 percent at stock, which fixes the design document's modelled "about 0 rate" row; the kit worker and nvcc harness agreement on two cards. What is withdrawn: the "connected state" line as a resistance mechanism.
## 7. What a v7 variant would test next
- The index fold on the address (the layer-1 row) in this class, which removes the window-bit refusals on eras 0, 1, 4, 5 and 6 for the control and this class alike.
- A wider per-step chain: a spine of depth 8 to 16 so `dep` rises from about 11 toward the window, at the cost of ILP on the card (measure the rate first; the chain per step is what a two-level file exploits).
- The window at 32 and 16 (`cs32s27x16`, `cs16s27x16`) for the k curve, and the block at 16 x 27 (`cs64s16x27`, text 272) if the imem matters to the re-optimised core.
- The op-mix re-weight of the census lane at this structure (the two closing instructions already take the injecting table).
- The PC 1 lock row (informational now: the verdict does not turn on it; it lands as an amendment if PC 1 runs it).
- A knob that reaches a gated file: not more live state but more WRITES per op the chip cannot skip (every op writing two registers, or a window write per load), priced against the card's own write cost first; the k lane's placed row at 21:00 says whether even that moves k.

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RESULT start 2026-10-08T15:14:09Z host=dbd4e396219f arch=sm_89 card=NVIDIA GeForce RTX 4090, 580.159.04, 450.00 W
RESULT pack packs/cs64-v6c0
RESULT ptxas packs/cs64-v6c0 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas packs/cs64-v6c0 ptxas info : Used 87 registers, used 0 barriers, 376 bytes cmem[0], 8 bytes cmem[2]
RESULT ptxas packs/cs64-v6c0 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas packs/cs64-v6c0 ptxas info : Used 40 registers, used 0 barriers, 372 bytes cmem[0]
RESULT ptxas packs/cs64-v6c0 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas packs/cs64-v6c0 ptxas info : Used 43 registers, used 0 barriers, 364 bytes cmem[0]
RESULT bench packs/cs64-v6c0 class-v5 bench pack "igneum-v6c/0" class control generator 2 (test harness: no pool, no network, no wallet)
RESULT bench packs/cs64-v6c0 GPU: NVIDIA GeForce RTX 4090 (128 SMs, cc 8.9, 24081 MiB), CUDA driver 13.0 runtime 12.8
RESULT bench packs/cs64-v6c0 hash kernel: 87 registers/thread, 20 resident blocks/SM at 1 warp/block
RESULT bench packs/cs64-v6c0 device memory at start: 395 MiB used of 24081 MiB
RESULT bench packs/cs64-v6c0 cache fill (GPU): 1.84 ms first, 1.82 ms second
RESULT bench packs/cs64-v6c0 cache head and last 16 words against the pack: PASS
RESULT bench packs/cs64-v6c0 dataset build (GPU): 30.57 ms first, 30.54 ms second (16777216 items, 1024 MiB)
RESULT bench packs/cs64-v6c0 device memory after the build: 1675 MiB used
RESULT bench packs/cs64-v6c0 dataset self-test: head PASS, last PASS, samples 64 of 64
RESULT bench packs/cs64-v6c0 vector warps against the pack: 3 of 3 PASS
RESULT bench packs/cs64-v6c0 fingerprint of 2^24 outputs at base 0: ad0cec2a42c84aff (lane 0 c2b2466c00d3f12b)
RESULT bench packs/cs64-v6c0 hash rate: 62.436 MH/s over 250 batches of 2^24 (GPU event time 67177.7 ms)
RESULT bench packs/cs64-v6c0 RESULT pack=igneum-v6c/0 class=control build_ms=30.54 rate_mhs=62.436 vectors=3/3
RESULT smi packs/cs64-v6c0 samples 64 mean_power_w 268.8 mean_sm_mhz 2811 mean_mem_mhz 10251
RESULT pack v5-genesis
RESULT ptxas v5-genesis cc1plus: fatal error: ../../bench.cu: No such file or directory
RESULT ptxas v5-genesis 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas v5-genesis ptxas info : Used 32 registers, used 0 barriers, 376 bytes cmem[0]
RESULT ptxas v5-genesis 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas v5-genesis ptxas info : Used 40 registers, used 0 barriers, 384 bytes cmem[0]
RESULT ptxas v5-genesis 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas v5-genesis ptxas info : Used 43 registers, used 0 barriers, 364 bytes cmem[0]
RESULT bench v5-genesis class-v5 bench pack "igneum-genesis" class v5 generator 5 (test harness: no pool, no network, no wallet)
RESULT bench v5-genesis GPU: NVIDIA GeForce RTX 4090 (128 SMs, cc 8.9, 24081 MiB), CUDA driver 13.0 runtime 12.8
RESULT bench v5-genesis hash kernel: 32 registers/thread, 24 resident blocks/SM at 1 warp/block
RESULT bench v5-genesis device memory at start: 395 MiB used of 24081 MiB
RESULT bench v5-genesis cache fill (GPU): 1.83 ms first, 1.81 ms second
RESULT bench v5-genesis cache head and last 16 words against the pack: PASS
RESULT bench v5-genesis leaves: 93 x 64 B from leaves.bin (5952 bytes), FNV-1a 64 850ad094a937a5c5 against the pack's 850ad094a937a5c5: PASS; state root 1c583d352bb9c75a06dadb8d82d42836ebe8afa82d0b413be87bf921741f1526, chain block af89be5ddbadb6f6b4aee28ac8f249713be5d4c12621e3cea7f83ceada3c66b3 (159357)
RESULT bench v5-genesis dataset build (GPU): 30.80 ms first, 30.75 ms second (16777216 items, 1024 MiB)
RESULT bench v5-genesis device memory after the build: 1677 MiB used
RESULT bench v5-genesis dataset self-test: head PASS, last PASS, samples 64 of 64
RESULT bench v5-genesis vector warps against the pack: 3 of 3 PASS
RESULT bench v5-genesis fingerprint of 2^24 outputs at base 0: ae74193ddad19e19 (lane 0 61b73fdc4b19aa6e)
RESULT bench v5-genesis hash rate: 62.437 MH/s over 250 batches of 2^24 (GPU event time 67176.1 ms)
RESULT bench v5-genesis RESULT pack=igneum-genesis class=v5 build_ms=30.75 rate_mhs=62.437 vectors=3/3
RESULT smi v5-genesis samples 64 mean_power_w 271.3 mean_sm_mhz 2805 mean_mem_mhz 10251
RESULT end 2026-10-08T15:16:34Z

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RESULT start 2026-10-08T15:09:57Z host=f271665b754f arch=sm_120 card=NVIDIA GeForce RTX 5090, 580.159.03, 575.00 W
RESULT pack packs/cs64-v6c0
RESULT ptxas packs/cs64-v6c0 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas packs/cs64-v6c0 ptxas info : Used 80 registers, used 0 barriers
RESULT ptxas packs/cs64-v6c0 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas packs/cs64-v6c0 ptxas info : Used 38 registers, used 0 barriers
RESULT ptxas packs/cs64-v6c0 0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
RESULT ptxas packs/cs64-v6c0 ptxas info : Used 41 registers, used 0 barriers
RESULT bench packs/cs64-v6c0 class-v5 bench pack "igneum-v6c/0" class control generator 2 (test harness: no pool, no network, no wallet)
RESULT bench packs/cs64-v6c0 GPU: NVIDIA GeForce RTX 5090 (170 SMs, cc 12.0, 32109 MiB), CUDA driver 13.0 runtime 12.8
RESULT bench packs/cs64-v6c0 hash kernel: 80 registers/thread, 24 resident blocks/SM at 1 warp/block
RESULT bench packs/cs64-v6c0 device memory at start: 6188 MiB used of 32109 MiB
RESULT bench packs/cs64-v6c0 cache fill (GPU): 0.65 ms first, 0.65 ms second
RESULT bench packs/cs64-v6c0 cache head and last 16 words against the pack: PASS
RESULT bench packs/cs64-v6c0 dataset build (GPU): 29.75 ms first, 27.68 ms second (16777216 items, 1024 MiB)
RESULT bench packs/cs64-v6c0 device memory after the build: 7468 MiB used
RESULT bench packs/cs64-v6c0 dataset self-test: head PASS, last PASS, samples 64 of 64
RESULT bench packs/cs64-v6c0 vector warps against the pack: 3 of 3 PASS
RESULT bench packs/cs64-v6c0 fingerprint of 2^24 outputs at base 0: ad0cec2a42c84aff (lane 0 c2b2466c00d3f12b)
RESULT bench packs/cs64-v6c0 hash rate: 64.929 MH/s over 250 batches of 2^24 (GPU event time 64598.6 ms)
RESULT bench packs/cs64-v6c0 RESULT pack=igneum-v6c/0 class=control build_ms=27.68 rate_mhs=64.929 vectors=3/3
RESULT smi packs/cs64-v6c0 samples 128 mean_power_w 574.8 mean_sm_mhz 2778 mean_mem_mhz 13801
RESULT pack v5-genesis
RESULT ptxas v5-genesis cc1plus: fatal error: ../../bench.cu: No such file or directory
RESULT bench v5-genesis class-v5 bench pack "igneum-genesis" class v5 generator 5 (test harness: no pool, no network, no wallet)
RESULT bench v5-genesis GPU: NVIDIA GeForce RTX 5090 (170 SMs, cc 12.0, 32109 MiB), CUDA driver 13.0 runtime 12.8
RESULT bench v5-genesis hash kernel: 48 registers/thread, 24 resident blocks/SM at 1 warp/block
RESULT bench v5-genesis device memory at start: 6188 MiB used of 32109 MiB
RESULT bench v5-genesis cache fill (GPU): 0.65 ms first, 0.65 ms second
RESULT bench v5-genesis cache head and last 16 words against the pack: PASS
RESULT bench v5-genesis leaves: 93 x 64 B from leaves.bin (5952 bytes), FNV-1a 64 850ad094a937a5c5 against the pack's 850ad094a937a5c5: PASS; state root 1c583d352bb9c75a06dadb8d82d42836ebe8afa82d0b413be87bf921741f1526, chain block af89be5ddbadb6f6b4aee28ac8f249713be5d4c12621e3cea7f83ceada3c66b3 (159357)
RESULT bench v5-genesis dataset build (GPU): 27.57 ms first, 27.53 ms second (16777216 items, 1024 MiB)
RESULT bench v5-genesis device memory after the build: 7470 MiB used
RESULT bench v5-genesis dataset self-test: head PASS, last PASS, samples 64 of 64
RESULT bench v5-genesis vector warps against the pack: 3 of 3 PASS
RESULT bench v5-genesis fingerprint of 2^24 outputs at base 0: ae74193ddad19e19 (lane 0 61b73fdc4b19aa6e)
RESULT bench v5-genesis hash rate: 65.303 MH/s over 250 batches of 2^24 (GPU event time 64228.4 ms)
RESULT bench v5-genesis RESULT pack=igneum-genesis class=v5 build_ms=27.53 rate_mhs=65.303 vectors=3/3
RESULT smi v5-genesis samples 126 mean_power_w 574.8 mean_sm_mhz 2788 mean_mem_mhz 13801
RESULT end 2026-10-08T15:12:13Z

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# cs64-era-bt class cs64s27x16 eras [0,1,2,3,4,5,6,7] seeds 32 era-widths 4 weights base bittest 1 bin 54b905920b91becc start 2026-10-08T15:01:08Z host f271665b754f threads 40
cand era seed candidates accepted attempt bit_z bit_site bit_bit reasons
cs64-era-bt 0 16 9 1 8 3.2 7 8 c,=7;c=1;
cs64-era-bt 0 21 2 1 1 3.2 14 21 c=1;
cs64-era-bt 0 20 1 1 0 3.8 10 1
cs64-era-bt 0 30 2 1 1 3.0 3 18 c,=1;
cs64-era-bt 0 19 3 1 2 3.6 1 19 c,=2;
cs64-era-bt 1 1 2 1 1 2.8 6 20 c=1;
cs64-era-bt 0 12 5 1 4 3.5 10 25 c,=3;c=1;
cs64-era-bt 0 18 4 1 3 3.2 11 13 c,=3;
cs64-era-bt 0 17 7 1 6 4.2 4 19 c,=4;c=2;
cs64-era-bt 0 6 1 1 0 5.1 3 19
cs64-era-bt 0 28 5 1 4 5.9 12 19 c,=2;c=2;
cs64-era-bt 0 0 9 1 8 4.2 9 19 c,=5;c=3;
cs64-era-bt 0 5 2 1 1 3.9 5 1 c=1;
cs64-era-bt 0 29 1 1 0 4.2 8 22
cs64-era-bt 1 0 9 1 8 3.2 14 26 c,=5;c=3;
cs64-era-bt 0 11 2 1 1 3.1 5 0 c,=1;
cs64-era-bt 0 7 4 1 3 2.9 11 20 c,=3;
cs64-era-bt 0 15 1 1 0 2.8 14 16
cs64-era-bt 1 7 4 1 3 3.3 12 8 c,=3;
cs64-era-bt 0 25 2 1 1 3.3 2 14 c=1;
cs64-era-bt 0 13 5 1 4 3.2 13 11 c,=4;
cs64-era-bt 0 4 1 1 0 3.2 12 20
cs64-era-bt 0 31 3 1 2 3.0 1 6 c,=1;c=1;
cs64-era-bt 0 22 1 1 0 3.0 1 19
cs64-era-bt 0 26 3 1 2 3.4 3 13 c,=2;
cs64-era-bt 0 14 6 1 5 3.5 1 19 c,=4;c=1;
cs64-era-bt 0 10 4 1 3 3.0 0 18 c=2;c,=1;
cs64-era-bt 1 2 1 1 0 2.9 15 20
cs64-era-bt 1 4 3 1 2 3.2 7 22 c,=2;
cs64-era-bt 0 27 2 1 1 3.9 15 19 c,=1;
cs64-era-bt 0 9 1 1 0 3.1 1 17
cs64-era-bt 1 3 1 1 0 3.3 15 7
cs64-era-bt 0 3 1 1 0 2.7 12 10
cs64-era-bt 1 5 2 1 1 3.6 4 16 c=1;
cs64-era-bt 0 23 3 1 2 3.7 3 20 c,=2;
cs64-era-bt 0 8 7 1 6 5.3 8 19 c,=5;c=1;
cs64-era-bt 1 6 9 1 8 2.8 14 19 c,=6;c=2;
cs64-era-bt 0 1 6 1 5 3.3 0 8 c,=3;c=2;
cs64-era-bt 0 2 1 1 0 2.8 9 21
cs64-era-bt 0 24 6 1 5 3.0 6 9 c,=5;
cs64-era-bt 1 8 7 1 6 5.3 8 6 c,=5;c=1;
cs64-era-bt 1 14 6 1 5 2.9 1 6 c,=4;c=1;
cs64-era-bt 1 15 1 1 0 3.2 6 1
cs64-era-bt 1 22 1 1 0 3.3 4 25
cs64-era-bt 1 11 2 1 1 3.1 3 6 c,=1;
cs64-era-bt 1 9 1 1 0 4.0 11 0
cs64-era-bt 1 19 3 1 2 3.2 5 13 c,=2;
cs64-era-bt 1 10 4 1 3 4.0 10 17 c=2;c,=1;
cs64-era-bt 1 30 2 1 1 3.1 15 15 c,=1;
cs64-era-bt 1 13 5 1 4 3.3 7 3 c,=4;
cs64-era-bt 2 1 2 1 1 3.3 0 4 c=1;
cs64-era-bt 1 25 2 1 1 3.3 14 25 c,=1;
cs64-era-bt 1 12 5 1 4 3.1 2 9 c,=3;c=1;
cs64-era-bt 2 15 1 1 0 3.0 13 7
cs64-era-bt 1 28 3 1 2 3.6 4 18 c,=1;c=1;
cs64-era-bt 1 16 9 1 8 3.3 13 18 c,=7;c=1;
cs64-era-bt 1 17 7 1 6 2.9 7 25 c,=4;c=2;
cs64-era-bt 1 20 1 1 0 3.0 15 9
cs64-era-bt 1 21 2 1 1 2.6 11 19 c=1;
cs64-era-bt 2 5 2 1 1 3.0 10 12 c=1;
cs64-era-bt 2 13 2 1 1 3.1 2 26 c=1;
cs64-era-bt 1 27 2 1 1 5.8 15 6 c,=1;
cs64-era-bt 2 12 2 1 1 2.8 13 23 c=1;
cs64-era-bt 1 18 4 1 3 3.4 0 5 c,=3;
cs64-era-bt 1 29 1 1 0 3.9 10 6
cs64-era-bt 1 31 4 1 3 3.5 1 23 c=2;c,=1;
cs64-era-bt 2 11 2 1 1 3.0 12 15 c=1;
cs64-era-bt 1 23 1 1 0 4.8 12 6
cs64-era-bt 1 26 3 1 2 3.5 5 8 c,=2;
cs64-era-bt 2 3 1 1 0 2.6 11 1
cs64-era-bt 1 24 6 1 5 2.9 0 19 c,=5;
cs64-era-bt 2 16 1 1 0 3.0 7 12
cs64-era-bt 2 4 1 1 0 2.7 0 10
cs64-era-bt 2 8 2 1 1 3.5 13 24 c=1;
cs64-era-bt 2 0 2 1 1 3.1 5 25 c=1;
cs64-era-bt 2 9 1 1 0 2.6 6 1
cs64-era-bt 2 6 1 1 0 3.1 0 1
cs64-era-bt 2 10 1 1 0 3.1 2 20
cs64-era-bt 2 14 1 1 0 3.2 3 15
cs64-era-bt 2 2 1 1 0 3.3 0 0
cs64-era-bt 2 7 2 1 1 3.2 9 24 c=1;
cs64-era-bt 2 17 1 1 0 2.7 10 2
cs64-era-bt 2 18 1 1 0 3.2 3 11
cs64-era-bt 2 26 2 1 1 4.6 1 26 c=1;
cs64-era-bt 2 21 2 1 1 2.8 15 4 c=1;
cs64-era-bt 2 29 1 1 0 3.5 11 7
cs64-era-bt 2 23 1 1 0 3.7 15 20
cs64-era-bt 2 24 1 1 0 3.5 3 11
cs64-era-bt 2 19 3 1 2 3.1 8 20 c=2;
cs64-era-bt 2 20 1 1 0 2.8 10 3
cs64-era-bt 3 5 2 1 1 3.1 3 20 c=1;
cs64-era-bt 3 4 1 1 0 3.7 9 10
cs64-era-bt 2 31 1 1 0 3.3 15 18
cs64-era-bt 2 22 1 1 0 2.9 5 1
cs64-era-bt 3 11 2 1 1 3.2 6 13 c,=1;
cs64-era-bt 3 1 2 1 1 3.3 9 13 c=1;
cs64-era-bt 2 30 1 1 0 3.1 8 20
cs64-era-bt 3 16 1 1 0 3.2 13 0
cs64-era-bt 3 2 1 1 0 3.1 3 25
cs64-era-bt 3 8 2 1 1 3.3 0 14 c=1;
cs64-era-bt 3 0 2 1 1 3.2 0 7 c=1;
cs64-era-bt 2 28 2 1 1 3.0 2 23 c=1;
cs64-era-bt 2 27 1 1 0 3.3 9 18
cs64-era-bt 3 14 1 1 0 2.8 2 18
cs64-era-bt 2 25 2 1 1 3.1 2 7 c=1;
cs64-era-bt 3 20 1 1 0 3.4 2 2
cs64-era-bt 3 6 1 1 0 3.1 2 9
cs64-era-bt 3 18 1 1 0 2.8 9 2
cs64-era-bt 3 22 1 1 0 3.0 11 11
cs64-era-bt 3 9 1 1 0 3.4 3 9
cs64-era-bt 3 3 1 1 0 3.3 2 14
cs64-era-bt 3 10 1 1 0 3.8 5 4
cs64-era-bt 3 15 1 1 0 2.7 7 3
cs64-era-bt 3 13 2 1 1 3.1 0 25 c=1;
cs64-era-bt 3 12 2 1 1 3.4 14 17 c=1;
cs64-era-bt 3 7 2 1 1 3.2 8 17 c=1;
cs64-era-bt 3 19 3 1 2 3.3 13 17 c=2;
cs64-era-bt 3 26 2 1 1 3.3 5 16 c=1;
cs64-era-bt 3 21 2 1 1 3.0 0 15 c=1;
cs64-era-bt 3 29 1 1 0 3.0 5 7
cs64-era-bt 3 31 1 1 0 3.4 15 8
cs64-era-bt 3 17 1 1 0 3.0 2 12
cs64-era-bt 3 23 1 1 0 2.9 3 25
cs64-era-bt 3 25 2 1 1 3.2 13 6 c=1;
cs64-era-bt 4 1 2 1 1 3.3 12 22 c=1;
cs64-era-bt 3 24 1 1 0 3.5 13 5
cs64-era-bt 3 27 1 1 0 2.9 15 13
cs64-era-bt 3 28 2 1 1 4.4 15 0 c=1;
cs64-era-bt 4 12 5 1 4 3.6 7 23 c,=3;c=1;
cs64-era-bt 3 30 1 1 0 2.8 8 20
cs64-era-bt 4 10 4 1 3 3.1 11 16 c=2;c,=1;
cs64-era-bt 4 6 1 1 0 5.0 3 10
cs64-era-bt 4 2 1 1 0 2.9 10 22
cs64-era-bt 4 0 9 1 8 3.7 9 10 c,=5;c=3;
cs64-era-bt 4 4 3 1 2 2.8 4 24 c,=2;
cs64-era-bt 4 5 2 1 1 3.3 15 27 c=1;
cs64-era-bt 4 11 2 1 1 3.7 8 16 c,=1;
cs64-era-bt 4 3 1 1 0 2.7 10 11
cs64-era-bt 4 7 4 1 3 4.4 11 10 c,=3;
cs64-era-bt 4 19 3 1 2 3.4 2 0 c,=2;
cs64-era-bt 4 13 5 1 4 3.1 15 14 c,=3;c=1;
cs64-era-bt 4 8 7 1 6 5.1 12 10 c,=5;c=1;
cs64-era-bt 4 16 9 1 8 2.7 5 8 c,=7;c=1;
cs64-era-bt 4 15 1 1 0 3.2 14 25
cs64-era-bt 4 9 1 1 0 3.7 6 8
cs64-era-bt 4 24 6 1 5 3.7 7 11 c,=5;
cs64-era-bt 4 14 6 1 5 3.3 3 20 c,=4;c=1;
cs64-era-bt 4 21 2 1 1 2.8 8 10 c=1;
cs64-era-bt 4 31 4 1 3 3.4 3 20 c=2;c,=1;
cs64-era-bt 4 29 1 1 0 3.7 10 9
cs64-era-bt 4 17 7 1 6 3.6 8 12 c,=4;c=2;
cs64-era-bt 4 28 3 1 2 3.3 8 6 c,=1;c=1;
cs64-era-bt 4 25 2 1 1 3.3 0 22 c=1;
cs64-era-bt 4 18 4 1 3 3.4 3 16 c,=3;
cs64-era-bt 4 20 1 1 0 3.2 9 11
cs64-era-bt 5 7 4 1 3 4.0 11 22 c,=3;
cs64-era-bt 4 22 1 1 0 3.2 8 24
cs64-era-bt 4 30 2 1 1 2.7 7 14 c,=1;
cs64-era-bt 5 1 2 1 1 3.2 9 2 c=1;
cs64-era-bt 4 26 3 1 2 3.6 12 24 c,=2;
cs64-era-bt 4 23 1 1 0 5.8 12 10
cs64-era-bt 4 27 3 1 2 4.0 15 21 c,=2;
cs64-era-bt 5 3 1 1 0 3.1 5 8
cs64-era-bt 5 2 1 1 0 3.0 2 6
cs64-era-bt 5 5 2 1 1 3.5 14 23 c=1;
cs64-era-bt 5 6 1 1 0 4.6 3 22
cs64-era-bt 5 8 7 1 6 5.2 8 22 c,=5;c=1;
cs64-era-bt 5 0 9 1 8 2.7 8 23 c,=5;c=3;
cs64-era-bt 5 4 3 1 2 3.0 12 20 c,=2;
cs64-era-bt 5 9 1 1 0 4.1 8 7
cs64-era-bt 5 12 5 1 4 3.2 12 13 c,=3;c=1;
cs64-era-bt 5 14 6 1 5 3.7 1 22 c,=4;c=1;
cs64-era-bt 5 11 2 1 1 3.1 4 11 c,=1;
cs64-era-bt 5 10 4 1 3 3.2 6 5 c=2;c,=1;
cs64-era-bt 5 15 1 1 0 3.6 13 2
cs64-era-bt 5 16 9 1 8 2.8 15 2 c,=7;c=1;
cs64-era-bt 5 20 1 1 0 3.3 2 16
cs64-era-bt 5 21 2 1 1 3.1 10 16 c=1;
cs64-era-bt 5 17 7 1 6 3.0 5 19 c,=4;c=2;
cs64-era-bt 5 19 3 1 2 2.7 14 24 c,=2;
cs64-era-bt 5 13 5 1 4 3.2 10 13 c,=4;
cs64-era-bt 5 29 1 1 0 3.6 12 26
cs64-era-bt 5 22 1 1 0 3.4 0 16
cs64-era-bt 5 25 2 1 1 3.0 5 1 c=1;
cs64-era-bt 5 18 4 1 3 2.8 11 4 c,=3;
cs64-era-bt 5 30 2 1 1 3.0 15 21 c,=1;
cs64-era-bt 5 24 6 1 5 2.9 14 1 c,=5;
cs64-era-bt 5 23 1 1 0 5.7 12 22
cs64-era-bt 5 27 2 1 1 5.0 15 22 c,=1;
cs64-era-bt 5 28 5 1 4 3.2 12 22 c,=2;c=2;
cs64-era-bt 6 5 2 1 1 2.8 5 11 c=1;
cs64-era-bt 5 26 3 1 2 3.2 5 21 c,=2;
cs64-era-bt 6 4 3 1 2 3.1 12 10 c,=2;
cs64-era-bt 6 2 1 1 0 3.1 0 9
cs64-era-bt 6 0 9 1 8 3.0 1 26 c,=5;c=3;
cs64-era-bt 6 7 4 1 3 3.6 9 16 c,=3;
cs64-era-bt 6 6 9 1 8 3.1 10 5 c,=6;c=2;
cs64-era-bt 6 1 2 1 1 3.4 7 27 c=1;
cs64-era-bt 5 31 4 1 3 3.7 5 7 c=2;c,=1;
cs64-era-bt 6 11 2 1 1 3.0 6 22 c,=1;
cs64-era-bt 6 10 4 1 3 3.3 10 1 c=2;c,=1;
cs64-era-bt 6 3 1 1 0 4.0 10 5
cs64-era-bt 6 18 4 1 3 3.2 13 25 c,=3;
cs64-era-bt 6 8 7 1 6 5.7 8 3 c,=5;c=1;
cs64-era-bt 6 9 1 1 0 2.5 9 4
cs64-era-bt 6 14 6 1 5 4.0 12 12 c,=4;c=1;
cs64-era-bt 6 13 5 1 4 3.7 2 25 c,=4;
cs64-era-bt 6 12 5 1 4 2.7 2 3 c,=3;c=1;
cs64-era-bt 6 20 1 1 0 3.0 4 26
cs64-era-bt 6 15 1 1 0 3.0 11 24
cs64-era-bt 6 21 2 1 1 2.7 0 13 c=1;
cs64-era-bt 6 23 3 1 2 2.6 8 13 c,=2;
cs64-era-bt 6 27 2 1 1 3.0 6 17 c,=1;
cs64-era-bt 6 24 6 1 5 3.0 9 22 c,=5;
cs64-era-bt 6 31 4 1 3 3.6 1 16 c=2;c,=1;
cs64-era-bt 6 16 9 1 8 2.9 8 0 c,=7;c=1;
cs64-era-bt 6 19 3 1 2 3.0 15 2 c,=2;
cs64-era-bt 6 17 7 1 6 2.8 11 0 c,=4;c=2;
cs64-era-bt 6 29 1 1 0 3.2 14 17
cs64-era-bt 6 26 3 1 2 2.7 7 21 c,=2;
cs64-era-bt 7 6 1 1 0 4.3 3 7
cs64-era-bt 6 22 1 1 0 3.9 9 14
cs64-era-bt 7 11 2 1 1 3.8 14 24 c,=1;
cs64-era-bt 6 30 2 1 1 2.7 7 7 c,=1;
cs64-era-bt 6 28 5 1 4 4.3 10 20 c,=2;c=2;
cs64-era-bt 7 1 2 1 1 2.9 8 11 c=1;
cs64-era-bt 6 25 2 1 1 3.0 2 1 c=1;
cs64-era-bt 7 0 2 1 1 3.3 1 12 c=1;
cs64-era-bt 7 5 2 1 1 3.3 4 23 c=1;
cs64-era-bt 7 4 1 1 0 3.1 13 14
cs64-era-bt 7 12 5 1 4 3.3 4 5 c=3;c,=1;
cs64-era-bt 7 13 4 1 3 2.7 8 11 c,=2;c=1;
cs64-era-bt 7 9 1 1 0 3.4 12 24
cs64-era-bt 7 2 1 1 0 2.6 5 8
cs64-era-bt 7 3 1 1 0 3.8 14 22
cs64-era-bt 7 10 4 1 3 4.0 13 25 c=2;c,=1;
cs64-era-bt 7 8 2 1 1 3.0 12 17 c=1;
cs64-era-bt 7 7 2 1 1 2.9 13 6 c,=1;
cs64-era-bt 7 15 1 1 0 2.7 14 22
cs64-era-bt 7 14 1 1 0 3.1 11 1
cs64-era-bt 7 21 2 1 1 2.8 7 21 c=1;
cs64-era-bt 7 17 1 1 0 3.3 5 11
cs64-era-bt 7 25 2 1 1 2.9 14 21 c=1;
cs64-era-bt 7 24 1 1 0 3.2 3 20
cs64-era-bt 7 26 2 1 1 2.3 3 20 c,=1;
cs64-era-bt 7 23 1 1 0 3.8 12 27
cs64-era-bt 7 18 1 1 0 2.9 14 23
cs64-era-bt 7 16 2 1 1 3.7 5 11 c,=1;
cs64-era-bt 7 27 2 1 1 3.5 13 8 c,=1;
cs64-era-bt 7 20 1 1 0 3.0 3 14
cs64-era-bt 7 22 1 1 0 2.8 5 25
cs64-era-bt 7 30 1 1 0 5.9 2 27
cs64-era-bt 7 29 1 1 0 3.2 13 4
cs64-era-bt 7 31 1 1 0 3.8 5 27
cs64-era-bt 7 19 3 1 2 3.0 13 1 c=2;
cs64-era-bt 7 28 2 1 1 3.0 14 11 c=1;
# end 2026-10-08T15:07:36Z rows=257
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# cs64-era-nobt class cs64s27x16 eras [0,1,2,3,4,5,6,7] seeds 32 era-widths 4 weights base bittest off bin 54b905920b91becc start 2026-10-08T15:01:08Z host f271665b754f threads 24
cand era seed candidates accepted attempt bit_z bit_site bit_bit reasons
cs64-era-nobt 0 21 2 1 1 3.2 14 21 c=1;
cs64-era-nobt 0 6 1 1 0 5.1 3 19
cs64-era-nobt 0 2 1 1 0 2.8 9 21
cs64-era-nobt 0 4 1 1 0 3.2 12 20
cs64-era-nobt 0 16 1 1 0 24.0 13 19
cs64-era-nobt 0 12 2 1 1 12.5 15 19 c=1;
cs64-era-nobt 0 17 1 1 0 24.9 13 19
cs64-era-nobt 0 8 2 1 1 32.0 3 19 c=1;
cs64-era-nobt 0 3 1 1 0 2.7 12 10
cs64-era-nobt 0 15 1 1 0 2.8 14 16
cs64-era-nobt 0 1 2 1 1 7.0 1 20 c=1;
cs64-era-nobt 0 19 3 1 2 3.6 1 19 c=2;
cs64-era-nobt 0 11 2 1 1 3.1 5 0 c=1;
cs64-era-nobt 0 7 2 1 1 46.9 13 19 c=1;
cs64-era-nobt 0 22 1 1 0 3.0 1 19
cs64-era-nobt 0 10 1 1 0 16.2 6 19
cs64-era-nobt 0 18 1 1 0 14.6 2 19
cs64-era-nobt 0 0 2 1 1 10.8 0 19 c=1;
cs64-era-nobt 0 9 1 1 0 3.1 1 17
cs64-era-nobt 0 14 1 1 0 65.0 8 19
cs64-era-nobt 0 5 2 1 1 3.9 5 1 c=1;
cs64-era-nobt 0 23 1 1 0 7.4 12 19
cs64-era-nobt 0 13 2 1 1 31.2 12 19 c=1;
cs64-era-nobt 0 20 1 1 0 3.8 10 1
cs64-era-nobt 0 24 1 1 0 31.8 2 19
cs64-era-nobt 0 30 1 1 0 46.5 14 19
cs64-era-nobt 0 26 2 1 1 29.4 3 19 c=1;
cs64-era-nobt 0 31 1 1 0 6.9 0 19
cs64-era-nobt 0 29 1 1 0 4.2 8 22
cs64-era-nobt 0 28 2 1 1 70.2 15 19 c=1;
cs64-era-nobt 0 27 1 1 0 8.7 9 19
cs64-era-nobt 1 3 1 1 0 3.3 15 7
cs64-era-nobt 0 25 2 1 1 3.3 2 14 c=1;
cs64-era-nobt 1 0 2 1 1 11.4 0 6 c=1;
cs64-era-nobt 1 12 2 1 1 13.1 15 6 c=1;
cs64-era-nobt 1 5 2 1 1 3.6 4 16 c=1;
cs64-era-nobt 1 9 1 1 0 4.0 11 0
cs64-era-nobt 1 4 1 1 0 10.9 6 7
cs64-era-nobt 1 6 1 1 0 6.7 3 6
cs64-era-nobt 1 1 2 1 1 2.8 6 20 c=1;
cs64-era-nobt 1 7 2 1 1 46.8 13 6 c=1;
cs64-era-nobt 1 10 1 1 0 14.5 6 6
cs64-era-nobt 1 2 1 1 0 2.9 15 20
cs64-era-nobt 1 11 2 1 1 3.1 3 6 c=1;
cs64-era-nobt 1 13 2 1 1 32.6 11 6 c=1;
cs64-era-nobt 1 15 1 1 0 3.2 6 1
cs64-era-nobt 1 8 2 1 1 31.6 3 6 c=1;
cs64-era-nobt 1 14 1 1 0 63.5 8 6
cs64-era-nobt 1 16 1 1 0 24.5 13 6
cs64-era-nobt 1 17 1 1 0 24.0 13 6
cs64-era-nobt 1 19 3 1 2 3.2 5 13 c=2;
cs64-era-nobt 1 21 2 1 1 2.6 11 19 c=1;
cs64-era-nobt 1 18 1 1 0 15.9 2 6
cs64-era-nobt 1 20 1 1 0 3.0 15 9
cs64-era-nobt 1 30 1 1 0 47.8 14 6
cs64-era-nobt 1 23 1 1 0 4.8 12 6
cs64-era-nobt 1 27 1 1 0 10.1 9 6
cs64-era-nobt 2 1 2 1 1 3.3 0 4 c=1;
cs64-era-nobt 1 28 2 1 1 70.7 15 6 c=1;
cs64-era-nobt 1 24 1 1 0 30.4 2 6
cs64-era-nobt 1 26 2 1 1 29.1 3 6 c=1;
cs64-era-nobt 1 22 1 1 0 3.3 4 25
cs64-era-nobt 1 25 2 1 1 3.3 14 25 c=1;
cs64-era-nobt 1 29 1 1 0 3.9 10 6
cs64-era-nobt 2 0 2 1 1 3.1 5 25 c=1;
cs64-era-nobt 2 3 1 1 0 2.6 11 1
cs64-era-nobt 2 11 2 1 1 3.0 12 15 c=1;
cs64-era-nobt 2 7 2 1 1 3.2 9 24 c=1;
cs64-era-nobt 1 31 1 1 0 7.8 0 6
cs64-era-nobt 2 2 1 1 0 3.3 0 0
cs64-era-nobt 2 9 1 1 0 2.6 6 1
cs64-era-nobt 2 10 1 1 0 3.1 2 20
cs64-era-nobt 2 8 2 1 1 3.5 13 24 c=1;
cs64-era-nobt 2 6 1 1 0 3.1 0 1
cs64-era-nobt 2 4 1 1 0 2.7 0 10
cs64-era-nobt 2 5 2 1 1 3.0 10 12 c=1;
cs64-era-nobt 2 12 2 1 1 2.8 13 23 c=1;
cs64-era-nobt 2 16 1 1 0 3.0 7 12
cs64-era-nobt 2 13 2 1 1 3.1 2 26 c=1;
cs64-era-nobt 2 14 1 1 0 3.2 3 15
cs64-era-nobt 2 24 1 1 0 3.5 3 11
cs64-era-nobt 2 15 1 1 0 3.0 13 7
cs64-era-nobt 2 25 2 1 1 3.1 2 7 c=1;
cs64-era-nobt 2 20 1 1 0 2.8 10 3
cs64-era-nobt 2 18 1 1 0 3.2 3 11
cs64-era-nobt 2 19 3 1 2 3.1 8 20 c=2;
cs64-era-nobt 2 17 1 1 0 2.7 10 2
cs64-era-nobt 2 22 1 1 0 2.9 5 1
cs64-era-nobt 2 21 2 1 1 2.8 15 4 c=1;
cs64-era-nobt 2 23 1 1 0 3.7 15 20
cs64-era-nobt 2 26 2 1 1 4.6 1 26 c=1;
cs64-era-nobt 2 29 1 1 0 3.5 11 7
cs64-era-nobt 2 28 2 1 1 3.0 2 23 c=1;
cs64-era-nobt 2 27 1 1 0 3.3 9 18
cs64-era-nobt 2 30 1 1 0 3.1 8 20
cs64-era-nobt 3 1 2 1 1 3.3 9 13 c=1;
cs64-era-nobt 2 31 1 1 0 3.3 15 18
cs64-era-nobt 3 0 2 1 1 3.2 0 7 c=1;
cs64-era-nobt 3 4 1 1 0 3.7 9 10
cs64-era-nobt 3 6 1 1 0 3.1 2 9
cs64-era-nobt 3 5 2 1 1 3.1 3 20 c=1;
cs64-era-nobt 3 3 1 1 0 3.3 2 14
cs64-era-nobt 3 2 1 1 0 3.1 3 25
cs64-era-nobt 3 7 2 1 1 3.2 8 17 c=1;
cs64-era-nobt 3 8 2 1 1 3.3 0 14 c=1;
cs64-era-nobt 3 17 1 1 0 3.0 2 12
cs64-era-nobt 3 11 2 1 1 3.2 6 13 c=1;
cs64-era-nobt 3 9 1 1 0 3.4 3 9
cs64-era-nobt 3 15 1 1 0 2.7 7 3
cs64-era-nobt 3 18 1 1 0 2.8 9 2
cs64-era-nobt 3 10 1 1 0 3.8 5 4
cs64-era-nobt 3 19 3 1 2 3.3 13 17 c=2;
cs64-era-nobt 3 14 1 1 0 2.8 2 18
cs64-era-nobt 3 21 2 1 1 3.0 0 15 c=1;
cs64-era-nobt 3 12 2 1 1 3.4 14 17 c=1;
cs64-era-nobt 3 13 2 1 1 3.1 0 25 c=1;
cs64-era-nobt 3 16 1 1 0 3.2 13 0
cs64-era-nobt 3 24 1 1 0 3.5 13 5
cs64-era-nobt 3 20 1 1 0 3.4 2 2
cs64-era-nobt 3 22 1 1 0 3.0 11 11
cs64-era-nobt 3 26 2 1 1 3.3 5 16 c=1;
cs64-era-nobt 3 29 1 1 0 3.0 5 7
cs64-era-nobt 3 23 1 1 0 2.9 3 25
cs64-era-nobt 3 31 1 1 0 3.4 15 8
cs64-era-nobt 3 25 2 1 1 3.2 13 6 c=1;
cs64-era-nobt 4 1 2 1 1 3.3 12 22 c=1;
cs64-era-nobt 4 0 2 1 1 11.8 0 10 c=1;
cs64-era-nobt 3 28 2 1 1 4.4 15 0 c=1;
cs64-era-nobt 4 4 1 1 0 11.1 6 11
cs64-era-nobt 3 30 1 1 0 2.8 8 20
cs64-era-nobt 3 27 1 1 0 2.9 15 13
cs64-era-nobt 4 3 1 1 0 2.7 10 11
cs64-era-nobt 4 2 1 1 0 2.9 10 22
cs64-era-nobt 4 6 1 1 0 5.0 3 10
cs64-era-nobt 4 5 2 1 1 3.3 15 27 c=1;
cs64-era-nobt 4 7 2 1 1 47.7 13 10 c=1;
cs64-era-nobt 4 10 1 1 0 15.7 6 10
cs64-era-nobt 4 9 1 1 0 3.7 6 8
cs64-era-nobt 4 11 2 1 1 3.7 8 16 c=1;
cs64-era-nobt 4 12 2 1 1 15.9 15 10 c=1;
cs64-era-nobt 4 13 2 1 1 32.3 11 10 c=1;
cs64-era-nobt 4 8 2 1 1 33.1 3 10 c=1;
cs64-era-nobt 4 14 1 1 0 63.9 8 10
cs64-era-nobt 4 15 1 1 0 3.2 14 25
cs64-era-nobt 4 17 1 1 0 22.9 13 10
cs64-era-nobt 4 16 1 1 0 22.5 13 10
cs64-era-nobt 4 18 1 1 0 16.0 2 10
cs64-era-nobt 4 20 1 1 0 3.2 9 11
cs64-era-nobt 4 22 1 1 0 3.2 8 24
cs64-era-nobt 4 28 2 1 1 70.4 15 10 c=1;
cs64-era-nobt 4 19 3 1 2 3.4 2 0 c=2;
cs64-era-nobt 4 29 1 1 0 3.7 10 9
cs64-era-nobt 4 31 1 1 0 7.3 0 10
cs64-era-nobt 4 25 2 1 1 3.3 0 22 c=1;
cs64-era-nobt 4 21 2 1 1 2.8 8 10 c=1;
cs64-era-nobt 4 26 2 1 1 30.5 3 10 c=1;
cs64-era-nobt 4 24 1 1 0 30.3 2 10
cs64-era-nobt 4 27 1 1 0 9.1 9 10
cs64-era-nobt 4 30 1 1 0 48.5 14 10
cs64-era-nobt 4 23 1 1 0 5.8 12 10
cs64-era-nobt 5 0 2 1 1 10.7 0 22 c=1;
cs64-era-nobt 5 1 2 1 1 3.2 9 2 c=1;
cs64-era-nobt 5 4 1 1 0 9.9 6 23
cs64-era-nobt 5 3 1 1 0 3.1 5 8
cs64-era-nobt 5 5 2 1 1 3.5 14 23 c=1;
cs64-era-nobt 5 2 1 1 0 3.0 2 6
cs64-era-nobt 5 7 2 1 1 47.0 13 22 c=1;
cs64-era-nobt 5 6 1 1 0 4.6 3 22
cs64-era-nobt 5 9 1 1 0 4.1 8 7
cs64-era-nobt 5 10 1 1 0 14.9 12 22
cs64-era-nobt 5 8 2 1 1 31.2 3 22 c=1;
cs64-era-nobt 5 11 2 1 1 3.1 4 11 c=1;
cs64-era-nobt 5 14 1 1 0 63.4 8 22
cs64-era-nobt 5 12 2 1 1 13.0 15 22 c=1;
cs64-era-nobt 5 13 2 1 1 30.8 11 22 c=1;
cs64-era-nobt 5 15 1 1 0 3.6 13 2
cs64-era-nobt 5 16 1 1 0 24.0 13 22
cs64-era-nobt 5 18 1 1 0 13.4 2 22
cs64-era-nobt 5 17 1 1 0 23.8 13 22
cs64-era-nobt 5 19 3 1 2 2.7 14 24 c=2;
cs64-era-nobt 5 21 2 1 1 3.1 10 16 c=1;
cs64-era-nobt 5 20 1 1 0 3.3 2 16
cs64-era-nobt 5 26 2 1 1 29.3 3 22 c=1;
cs64-era-nobt 5 24 1 1 0 30.5 2 22
cs64-era-nobt 5 23 1 1 0 5.7 12 22
cs64-era-nobt 5 22 1 1 0 3.4 0 16
cs64-era-nobt 5 25 2 1 1 3.0 5 1 c=1;
cs64-era-nobt 5 27 1 1 0 10.1 9 22
cs64-era-nobt 5 28 2 1 1 71.5 15 22 c=1;
cs64-era-nobt 5 29 1 1 0 3.6 12 26
cs64-era-nobt 5 31 1 1 0 6.4 0 22
cs64-era-nobt 5 30 1 1 0 46.0 14 22
cs64-era-nobt 6 1 2 1 1 3.4 7 27 c=1;
cs64-era-nobt 6 0 2 1 1 11.7 0 3 c=1;
cs64-era-nobt 6 2 1 1 0 3.1 0 9
cs64-era-nobt 6 3 1 1 0 4.0 10 5
cs64-era-nobt 6 4 1 1 0 8.4 6 4
cs64-era-nobt 6 6 1 1 0 6.1 3 3
cs64-era-nobt 6 5 2 1 1 2.8 5 11 c=1;
cs64-era-nobt 6 7 2 1 1 47.9 13 3 c=1;
cs64-era-nobt 6 10 1 1 0 16.1 6 3
cs64-era-nobt 6 8 2 1 1 32.0 3 3 c=1;
cs64-era-nobt 6 11 2 1 1 3.0 6 22 c=1;
cs64-era-nobt 6 9 1 1 0 2.5 9 4
cs64-era-nobt 6 12 2 1 1 14.8 15 3 c=1;
cs64-era-nobt 6 13 2 1 1 31.9 11 3 c=1;
cs64-era-nobt 6 14 1 1 0 63.6 8 3
cs64-era-nobt 6 15 1 1 0 3.0 11 24
cs64-era-nobt 6 16 1 1 0 24.1 13 3
cs64-era-nobt 6 17 1 1 0 22.9 13 3
cs64-era-nobt 6 18 1 1 0 18.8 2 3
cs64-era-nobt 6 19 3 1 2 3.0 15 2 c=2;
cs64-era-nobt 6 21 2 1 1 2.7 0 13 c=1;
cs64-era-nobt 6 20 1 1 0 3.0 4 26
cs64-era-nobt 6 23 1 1 0 8.2 12 3
cs64-era-nobt 6 22 1 1 0 3.9 9 14
cs64-era-nobt 6 24 1 1 0 30.1 2 3
cs64-era-nobt 6 26 2 1 1 29.5 3 3 c=1;
cs64-era-nobt 6 28 2 1 1 71.3 15 3 c=1;
cs64-era-nobt 6 25 2 1 1 3.0 2 1 c=1;
cs64-era-nobt 6 27 1 1 0 8.6 9 3
cs64-era-nobt 6 29 1 1 0 3.2 14 17
cs64-era-nobt 6 30 1 1 0 47.4 14 3
cs64-era-nobt 6 31 1 1 0 6.2 0 3
cs64-era-nobt 7 1 2 1 1 2.9 8 11 c=1;
cs64-era-nobt 7 0 2 1 1 3.3 1 12 c=1;
cs64-era-nobt 7 4 1 1 0 3.1 13 14
cs64-era-nobt 7 6 1 1 0 4.3 3 7
cs64-era-nobt 7 3 1 1 0 3.8 14 22
cs64-era-nobt 7 2 1 1 0 2.6 5 8
cs64-era-nobt 7 5 2 1 1 3.3 4 23 c=1;
cs64-era-nobt 7 7 2 1 1 2.9 13 6 c=1;
cs64-era-nobt 7 8 2 1 1 3.0 12 17 c=1;
cs64-era-nobt 7 10 1 1 0 15.2 6 27
cs64-era-nobt 7 9 1 1 0 3.4 12 24
cs64-era-nobt 7 11 2 1 1 3.8 14 24 c=1;
cs64-era-nobt 7 12 2 1 1 12.5 15 27 c=1;
cs64-era-nobt 7 14 1 1 0 3.1 11 1
cs64-era-nobt 7 13 2 1 1 27.9 14 27 c=1;
cs64-era-nobt 7 15 1 1 0 2.7 14 22
cs64-era-nobt 7 16 1 1 0 24.0 13 27
cs64-era-nobt 7 17 1 1 0 3.3 5 11
cs64-era-nobt 7 18 1 1 0 2.9 14 23
cs64-era-nobt 7 19 3 1 2 3.0 13 1 c=2;
cs64-era-nobt 7 21 2 1 1 2.8 7 21 c=1;
cs64-era-nobt 7 20 1 1 0 3.0 3 14
cs64-era-nobt 7 23 1 1 0 3.8 12 27
cs64-era-nobt 7 22 1 1 0 2.8 5 25
cs64-era-nobt 7 26 2 1 1 2.3 3 20 c=1;
cs64-era-nobt 7 24 1 1 0 3.2 3 20
cs64-era-nobt 7 25 2 1 1 2.9 14 21 c=1;
cs64-era-nobt 7 28 2 1 1 3.0 14 11 c=1;
cs64-era-nobt 7 29 1 1 0 3.2 13 4
cs64-era-nobt 7 27 1 1 0 10.0 9 27
cs64-era-nobt 7 30 1 1 0 5.9 2 27
cs64-era-nobt 7 31 1 1 0 3.8 5 27
# end 2026-10-08T15:07:58Z rows=257
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docs/analysis/class-v6/logs/connected/cs64-none.tsv Normal file
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# cs64-none class cs64s27x16 eras [none] seeds 256 era-widths 4 weights base bittest off bin 54b905920b91becc start 2026-10-08T15:01:08Z host f271665b754f threads 40
cand era seed candidates accepted attempt bit_z bit_site bit_bit reasons
cs64-none none 12 1 1 0 3.8 4 20
cs64-none none 8 1 1 0 55.1 1 0
cs64-none none 36 1 1 0 3.2 15 24
cs64-none none 2 1 1 0 2.7 12 3
cs64-none none 14 1 1 0 2.7 0 16
cs64-none none 10 1 1 0 3.1 1 22
cs64-none none 37 1 1 0 42.9 6 0
cs64-none none 38 2 1 1 20.3 3 0 c=1;
cs64-none none 29 2 1 1 3.4 7 24 c=1;
cs64-none none 7 1 1 0 35.3 11 0
cs64-none none 31 1 1 0 17.2 3 0
cs64-none none 18 1 1 0 49.8 13 0
cs64-none none 11 1 1 0 3.3 4 26
cs64-none none 0 1 1 0 3.6 9 17
cs64-none none 35 1 1 0 42.4 13 0
cs64-none none 23 3 1 2 29.2 11 0 c=2;
cs64-none none 4 1 1 0 38.8 11 0
cs64-none none 30 1 1 0 3.1 13 17
cs64-none none 20 1 1 0 3.0 3 11
cs64-none none 17 1 1 0 3.8 7 1
cs64-none none 32 1 1 0 5.5 8 0
cs64-none none 28 2 1 1 2.8 6 11 c=1;
cs64-none none 39 1 1 0 3.7 9 0
cs64-none none 21 1 1 0 31.7 9 0
cs64-none none 9 1 1 0 59.0 9 0
cs64-none none 33 2 1 1 30.3 11 0 c=1;
cs64-none none 24 1 1 0 21.1 10 0
cs64-none none 5 2 1 1 23.5 6 0 c=1;
cs64-none none 25 1 1 0 2.8 9 27
cs64-none none 6 1 1 0 17.3 0 0
cs64-none none 1 1 1 0 16.6 3 0
cs64-none none 16 1 1 0 22.5 2 0
cs64-none none 3 1 1 0 26.8 7 0
cs64-none none 26 1 1 0 24.3 14 0
cs64-none none 27 1 1 0 3.4 14 7
cs64-none none 34 2 1 1 3.1 2 26 c=1;
cs64-none none 22 1 1 0 22.3 3 0
cs64-none none 19 1 1 0 16.5 14 1
cs64-none none 13 1 1 0 4.7 12 1
cs64-none none 15 3 1 2 4.0 0 1 c=2;
cs64-none none 46 1 1 0 2.6 3 4
cs64-none none 42 2 1 1 4.0 10 21 c=1;
cs64-none none 50 1 1 0 64.1 10 1
cs64-none none 51 2 1 1 30.9 11 0 c=1;
cs64-none none 40 1 1 0 65.4 6 0
cs64-none none 63 1 1 0 6.3 10 0
cs64-none none 66 1 1 0 2.6 14 24
cs64-none none 58 3 1 2 17.7 4 0 c=2;
cs64-none none 43 1 1 0 64.4 9 0
cs64-none none 59 1 1 0 127.7 4 0
cs64-none none 45 1 1 0 13.3 13 0
cs64-none none 44 1 1 0 3.0 14 3
cs64-none none 41 1 1 0 12.4 8 0
cs64-none none 53 1 1 0 3.2 8 7
cs64-none none 47 1 1 0 33.8 7 0
cs64-none none 56 1 1 0 3.0 12 22
cs64-none none 52 1 1 0 47.9 12 0
cs64-none none 48 2 1 1 50.0 4 1 c=1;
cs64-none none 49 1 1 0 3.3 7 2
cs64-none none 60 2 1 1 9.4 6 0 c=1;
cs64-none none 55 1 1 0 13.0 13 0
cs64-none none 75 3 1 2 3.2 10 3 c=2;
cs64-none none 54 3 1 2 13.5 8 0 c=2;
cs64-none none 57 1 1 0 32.5 6 0
cs64-none none 76 1 1 0 9.3 12 0
cs64-none none 61 2 1 1 15.1 4 0 c=1;
cs64-none none 64 1 1 0 3.0 2 8
cs64-none none 70 2 1 1 20.6 2 0 c=1;
cs64-none none 71 1 1 0 14.4 2 0
cs64-none none 67 4 1 3 9.5 6 0 c=3;
cs64-none none 62 1 1 0 3.0 7 20
cs64-none none 65 3 1 2 12.0 4 0 c=2;
cs64-none none 79 1 1 0 84.3 9 0
cs64-none none 69 2 1 1 2.9 3 22 c=1;
cs64-none none 77 1 1 0 19.8 15 0
cs64-none none 68 2 1 1 31.4 3 0 c=1;
cs64-none none 85 2 1 1 3.1 9 15 c=1;
cs64-none none 73 1 1 0 3.5 1 2
cs64-none none 78 3 1 2 3.1 7 13 c=2;
cs64-none none 72 1 1 0 3.8 7 1
cs64-none none 74 1 1 0 5.5 0 0
cs64-none none 88 1 1 0 64.0 13 0
cs64-none none 83 2 1 1 4.0 8 15 c=1;
cs64-none none 101 1 1 0 29.9 11 0
cs64-none none 80 3 1 2 4.1 1 0 c=2;
cs64-none none 81 2 1 1 11.0 7 0 c=1;
cs64-none none 91 1 1 0 3.4 8 22
cs64-none none 84 1 1 0 26.1 1 0
cs64-none none 86 1 1 0 2.9 9 24
cs64-none none 82 1 1 0 2.9 9 19
cs64-none none 87 1 1 0 3.3 10 21
cs64-none none 93 1 1 0 3.1 7 26
cs64-none none 103 1 1 0 4.4 0 0
cs64-none none 99 3 1 2 50.9 13 0 c=2;
cs64-none none 96 1 1 0 3.0 7 26
cs64-none none 89 1 1 0 93.8 8 0
cs64-none none 102 1 1 0 14.1 3 0
cs64-none none 94 1 1 0 3.6 1 19
cs64-none none 92 1 1 0 3.9 0 13
cs64-none none 114 1 1 0 3.9 7 17
cs64-none none 95 6 1 5 32.2 11 0 c=5;
cs64-none none 97 1 1 0 6.7 6 0
cs64-none none 90 2 1 1 2.9 8 27 c=1;
cs64-none none 104 1 1 0 12.8 2 0
cs64-none none 108 3 1 2 21.0 12 0 c=2;
cs64-none none 111 1 1 0 18.4 4 0
cs64-none none 106 1 1 0 4.8 6 0
cs64-none none 100 1 1 0 13.0 1 0
cs64-none none 98 1 1 0 3.2 14 25
cs64-none none 105 1 1 0 5.4 1 0
cs64-none none 113 1 1 0 3.7 0 26
cs64-none none 121 2 1 1 3.4 10 6 c=1;
cs64-none none 107 2 1 1 3.4 1 8 c=1;
cs64-none none 118 1 1 0 27.1 15 0
cs64-none none 110 1 1 0 2.8 15 4
cs64-none none 115 1 1 0 67.1 0 0
cs64-none none 122 1 1 0 128.0 4 0
cs64-none none 117 2 1 1 25.7 6 0 c=1;
cs64-none none 109 1 1 0 46.1 3 0
cs64-none none 112 1 1 0 60.5 11 0
cs64-none none 119 1 1 0 3.3 3 3
cs64-none none 116 1 1 0 6.9 13 0
cs64-none none 124 1 1 0 8.1 15 0
cs64-none none 126 1 1 0 2.6 10 18
cs64-none none 125 1 1 0 35.3 3 0
cs64-none none 140 1 1 0 26.0 1 10
cs64-none none 123 1 1 0 3.2 8 6
cs64-none none 130 1 1 0 53.1 11 0
cs64-none none 120 1 1 0 2.9 5 6
cs64-none none 145 3 1 2 51.8 4 0 c=2;
cs64-none none 128 1 1 0 3.3 4 1
cs64-none none 127 4 1 3 41.6 4 0 c=3;
cs64-none none 143 1 1 0 23.8 8 0
cs64-none none 129 1 1 0 14.0 11 0
cs64-none none 139 2 1 1 8.2 13 0 c=1;
cs64-none none 144 1 1 0 3.8 13 13
cs64-none none 134 1 1 0 54.0 5 0
cs64-none none 132 1 1 0 3.1 12 16
cs64-none none 131 1 1 0 20.3 0 0
cs64-none none 138 1 1 0 3.1 3 25
cs64-none none 133 2 1 1 30.1 4 0 c=1;
cs64-none none 152 1 1 0 127.9 13 0
cs64-none none 141 1 1 0 4.3 11 0
cs64-none none 137 2 1 1 21.0 1 0 c=1;
cs64-none none 146 1 1 0 3.5 4 22
cs64-none none 136 1 1 0 3.0 7 16
cs64-none none 150 1 1 0 6.4 1 0
cs64-none none 153 1 1 0 15.0 8 0
cs64-none none 135 6 1 5 10.2 11 0 c=5;
cs64-none none 142 2 1 1 11.2 7 0 c=1;
cs64-none none 149 1 1 0 24.9 11 0
cs64-none none 148 2 1 1 43.3 9 0 c=1;
cs64-none none 163 1 1 0 17.9 15 0
cs64-none none 147 1 1 0 30.1 4 0
cs64-none none 155 2 1 1 4.8 7 0 c=1;
cs64-none none 151 4 1 3 55.9 0 0 c=3;
cs64-none none 166 1 1 0 3.2 8 0
cs64-none none 157 1 1 0 3.6 1 17
cs64-none none 160 1 1 0 4.1 6 26
cs64-none none 154 1 1 0 16.5 13 0
cs64-none none 156 1 1 0 83.9 2 0
cs64-none none 165 1 1 0 9.2 4 0
cs64-none none 162 1 1 0 19.9 10 0
cs64-none none 158 1 1 0 3.1 8 3
cs64-none none 169 2 1 1 35.4 8 0 c=1;
cs64-none none 159 1 1 0 5.0 7 0
cs64-none none 161 1 1 0 3.2 13 7
cs64-none none 164 1 1 0 59.8 8 0
cs64-none none 180 1 1 0 4.0 11 2
cs64-none none 177 1 1 0 21.3 0 0
cs64-none none 175 1 1 0 3.1 12 21
cs64-none none 168 1 1 0 3.5 0 8
cs64-none none 171 1 1 0 18.7 2 0
cs64-none none 172 1 1 0 18.7 3 0
cs64-none none 170 1 1 0 22.3 0 0
cs64-none none 176 3 1 2 3.2 1 2 c=2;
cs64-none none 173 2 1 1 49.9 4 0 c=1;
cs64-none none 181 1 1 0 3.3 4 8
cs64-none none 179 1 1 0 17.5 2 0
cs64-none none 167 1 1 0 19.3 9 0
cs64-none none 186 1 1 0 38.4 5 0
cs64-none none 174 1 1 0 24.1 0 0
cs64-none none 185 2 1 1 3.0 4 14 c=1;
cs64-none none 178 2 1 1 43.0 3 0 c=1;
cs64-none none 182 1 1 0 3.3 0 26
cs64-none none 187 2 1 1 82.5 0 0 c=1;
cs64-none none 189 3 1 2 8.2 15 0 c=2;
cs64-none none 188 1 1 0 31.2 6 0
cs64-none none 190 1 1 0 3.5 12 11
cs64-none none 193 1 1 0 19.7 5 0
cs64-none none 183 1 1 0 3.0 15 21
cs64-none none 192 1 1 0 6.8 3 0
cs64-none none 196 1 1 0 3.6 9 0
cs64-none none 198 1 1 0 8.6 13 0
cs64-none none 184 1 1 0 3.5 7 0
cs64-none none 195 1 1 0 14.5 6 0
cs64-none none 191 2 1 1 29.9 6 0 c=1;
cs64-none none 194 1 1 0 14.1 6 0
cs64-none none 197 1 1 0 31.6 5 0
cs64-none none 204 1 1 0 3.0 15 15
cs64-none none 210 1 1 0 46.5 15 0
cs64-none none 207 1 1 0 3.5 8 11
cs64-none none 202 1 1 0 3.8 11 12
cs64-none none 199 1 1 0 18.5 3 1
cs64-none none 200 2 1 1 10.9 12 0 c=1;
cs64-none none 209 1 1 0 3.1 10 17
cs64-none none 214 1 1 0 3.3 5 16
cs64-none none 201 2 1 1 3.3 8 17 c=1;
cs64-none none 208 1 1 0 34.3 1 0
cs64-none none 206 1 1 0 15.5 11 0
cs64-none none 205 1 1 0 28.4 11 0
cs64-none none 216 1 1 0 45.3 13 0
cs64-none none 203 1 1 0 3.3 1 24
cs64-none none 221 1 1 0 3.2 12 16
cs64-none none 220 1 1 0 3.5 14 14
cs64-none none 218 4 1 3 4.0 6 22 c=3;
cs64-none none 223 3 1 2 42.6 10 0 c=2;
cs64-none none 224 1 1 0 3.2 2 11
cs64-none none 212 1 1 0 28.8 1 0
cs64-none none 217 1 1 0 3.0 15 7
cs64-none none 215 4 1 3 53.8 9 0 c=3;
cs64-none none 225 3 1 2 3.8 4 1 c=2;
cs64-none none 228 1 1 0 3.0 8 3
cs64-none none 211 1 1 0 3.7 8 1
cs64-none none 213 1 1 0 13.4 4 0
cs64-none none 229 1 1 0 3.9 12 1
cs64-none none 219 2 1 1 33.2 6 1 c=1;
cs64-none none 232 1 1 0 3.2 8 13
cs64-none none 231 1 1 0 9.3 15 0
cs64-none none 222 1 1 0 16.5 10 0
cs64-none none 235 1 1 0 32.7 3 0
cs64-none none 234 1 1 0 3.6 11 23
cs64-none none 233 1 1 0 3.1 13 21
cs64-none none 226 3 1 2 9.0 15 0 c=2;
cs64-none none 227 2 1 1 3.4 1 4 c=1;
cs64-none none 238 1 1 0 15.6 13 0
cs64-none none 230 1 1 0 20.9 0 0
cs64-none none 237 3 1 2 3.9 5 19 c=2;
cs64-none none 236 1 1 0 3.2 7 23
cs64-none none 239 1 1 0 19.7 4 0
cs64-none none 251 1 1 0 26.7 14 0
cs64-none none 240 1 1 0 31.3 12 0
cs64-none none 252 2 1 1 61.1 9 0 c=1;
cs64-none none 242 1 1 0 14.0 12 0
cs64-none none 244 1 1 0 2.7 11 8
cs64-none none 241 1 1 0 50.7 13 0
cs64-none none 248 1 1 0 3.1 1 17
cs64-none none 246 2 1 1 11.2 5 0 c=1;
cs64-none none 253 2 1 1 8.2 9 0 c=1;
cs64-none none 247 1 1 0 34.2 5 0
cs64-none none 249 1 1 0 3.3 7 3
cs64-none none 250 2 1 1 25.8 9 0 c=1;
cs64-none none 243 2 1 1 52.5 8 1 c=1;
cs64-none none 254 1 1 0 3.1 12 10
cs64-none none 245 1 1 0 11.4 8 0
cs64-none none 255 1 1 0 12.2 8 0
# end 2026-10-08T15:07:34Z rows=257
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docs/analysis/class-v6/logs/connected/uniform-cs64-none.tsv Normal file
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class era seed attempt program_id min_site_ratio min_site top0.1_share control_share ratio_to_control max_item_reads control_max reads
cs64s27x16 none 0 0 9ad55de91485542b 1.00006 15 0.002383 0.002382 1.0002 27 27 134217728
cs64s27x16 none 4 0 ef05f7b4f74f8b34 0.99876 11 0.002381 0.002377 1.0016 26 29 134217728
cs64s27x16 none 9 0 4f7dfb188ea079f8 0.99407 9 0.002382 0.002380 1.0010 27 28 134217728
cs64s27x16 none 3 0 423f3fcb11ffd16c 0.99937 7 0.002380 0.002380 1.0001 27 28 134217728
cs64s27x16 none 12 0 f2ee7ca7642ce409 1.00010 1 0.002378 0.002381 0.9987 27 27 134217728
cs64s27x16 none 7 0 a05222bdb885f832 0.99795 11 0.002381 0.002379 1.0010 28 27 134217728
cs64s27x16 none 10 0 d6229a4ebc3da203 1.00013 1 0.002381 0.002381 0.9999 28 27 134217728
cs64s27x16 none 8 0 5d3c176e39a2d7bd 0.99565 1 0.002377 0.002379 0.9991 27 27 134217728
cs64s27x16 none 1 0 118f3f6ee409eb00 1.00000 3 0.002379 0.002381 0.9990 26 27 134217728
cs64s27x16 none 5 1 66da80dabf645c59 0.99958 6 0.002382 0.002379 1.0014 27 28 134217728
cs64s27x16 none 15 2 7261a08393ef6b71 1.00000 2 0.002379 0.002380 0.9996 26 27 134217728
cs64s27x16 none 6 0 0f25af70edd287cc 0.99985 0 0.002381 0.002380 1.0003 26 28 134217728
cs64s27x16 none 11 0 b1ccae46f9288cc2 1.00008 14 0.002381 0.002382 0.9997 27 27 134217728
cs64s27x16 none 2 0 53c13e9f37bad71f 1.00010 3 0.002380 0.002380 0.9999 26 29 134217728
cs64s27x16 none 14 0 e84c88374beb684f 1.00010 6 0.002382 0.002382 1.0002 27 27 134217728
cs64s27x16 none 13 0 87d88cf6b4db69a2 1.00011 10 0.002383 0.002383 1.0003 29 27 134217728
1 class era seed attempt program_id min_site_ratio min_site top0.1_share control_share ratio_to_control max_item_reads control_max reads
2 cs64s27x16 none 0 0 9ad55de91485542b 1.00006 15 0.002383 0.002382 1.0002 27 27 134217728
3 cs64s27x16 none 4 0 ef05f7b4f74f8b34 0.99876 11 0.002381 0.002377 1.0016 26 29 134217728
4 cs64s27x16 none 9 0 4f7dfb188ea079f8 0.99407 9 0.002382 0.002380 1.0010 27 28 134217728
5 cs64s27x16 none 3 0 423f3fcb11ffd16c 0.99937 7 0.002380 0.002380 1.0001 27 28 134217728
6 cs64s27x16 none 12 0 f2ee7ca7642ce409 1.00010 1 0.002378 0.002381 0.9987 27 27 134217728
7 cs64s27x16 none 7 0 a05222bdb885f832 0.99795 11 0.002381 0.002379 1.0010 28 27 134217728
8 cs64s27x16 none 10 0 d6229a4ebc3da203 1.00013 1 0.002381 0.002381 0.9999 28 27 134217728
9 cs64s27x16 none 8 0 5d3c176e39a2d7bd 0.99565 1 0.002377 0.002379 0.9991 27 27 134217728
10 cs64s27x16 none 1 0 118f3f6ee409eb00 1.00000 3 0.002379 0.002381 0.9990 26 27 134217728
11 cs64s27x16 none 5 1 66da80dabf645c59 0.99958 6 0.002382 0.002379 1.0014 27 28 134217728
12 cs64s27x16 none 15 2 7261a08393ef6b71 1.00000 2 0.002379 0.002380 0.9996 26 27 134217728
13 cs64s27x16 none 6 0 0f25af70edd287cc 0.99985 0 0.002381 0.002380 1.0003 26 28 134217728
14 cs64s27x16 none 11 0 b1ccae46f9288cc2 1.00008 14 0.002381 0.002382 0.9997 27 27 134217728
15 cs64s27x16 none 2 0 53c13e9f37bad71f 1.00010 3 0.002380 0.002380 0.9999 26 29 134217728
16 cs64s27x16 none 14 0 e84c88374beb684f 1.00010 6 0.002382 0.002382 1.0002 27 27 134217728
17 cs64s27x16 none 13 0 87d88cf6b4db69a2 1.00011 10 0.002383 0.002383 1.0003 29 27 134217728

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RESULT worker pack packs/cs64-bound 15:17:37
RESULT check packs/cs64-bound info igneum-worker-cuda 1.0 (4 October 2026): device 0 NVIDIA_GeForce_RTX_4090 (sm_89, 128 SMs), driver 13.0 from libcuda.so.1, NVRTC 12.8 from libnvrtc.so.12, target sm_89 (the device's architecture, listed by NVRTC)
RESULT check packs/cs64-bound check PASS packs/cs64-bound in 2953 ms: nvrtc 1813 cache 2 dataset 31 hot 0 check 1106 race 0 ms variant base class v2; self-test PASS (cache head, last line and FNV-1a 64 48c4f5bf24166b2e; dataset head, word [268435455] and 64 samples; 96 of 96 vector lanes)
RESULT check packs/cs64-bound epoch 69676e65756d2d7636632f30 day 6461792f323032362d31302d3033, dataset 2^28 words, cache 2^26 words in 65536 segments, 87 registers, 20 blocks/SM at 1 warp(s)/block, target sm_89
RESULT bench packs/cs64-bound pack packs/cs64-bound on NVIDIA_GeForce_RTX_4090: nvrtc 1749 cache 2 dataset 31 hot 0 check 1101 race 0 ms variant base class v2; self-test PASS (cache head, last line and FNV-1a 64 48c4f5bf24166b2e; dataset head, word [268435455] and 64 samples; 96 of 96 vector lanes)
RESULT bench packs/cs64-bound warm-up dispatch (base 0): 268.83 ms; 250 timed dispatches of 16777216 nonces: mean 268.83 ms
RESULT bench packs/cs64-bound RESULT pack=packs/cs64-bound class=mx8+sh256x27 device=NVIDIA_GeForce_RTX_4090 arch=sm_89 regs=87 blocks_per_sm=20 warps=0 resident=2560 arena_mib=0 hot_mib=0 hot_slots=0 hot_fill_ms=0.00 nonces=16777216 batches=250 check=PASS fingerprint=ad0cec2a42c84aff mhs=62.408 loads=128 bytes=512 scratch_ops=0 time=wall
RESULT smi packs/cs64-bound samples 66 mean_power_w 269.4 mean_sm_mhz 2809
RESULT worker pack v5-genesis 15:18:52
RESULT check v5-genesis info igneum-worker-cuda 1.0 (4 October 2026): device 0 NVIDIA_GeForce_RTX_4090 (sm_89, 128 SMs), driver 13.0 from libcuda.so.1, NVRTC 12.8 from libnvrtc.so.12, target sm_89 (the device's architecture, listed by NVRTC)
RESULT check v5-genesis check PASS v5-genesis in 1722 ms: nvrtc 586 cache 2 dataset 31 hot 0 check 1102 race 0 ms variant base class v5 (state leaves 93, uploaded for the build and freed); self-test PASS (cache head, last line and FNV-1a 64 48c4f5bf24166b2e; dataset head, word [268435455] and 64 samples; 96 of 96 vector lanes)
RESULT check v5-genesis epoch 69676e65756d2d67656e65736973 day 6461792f323032362d31302d3033, dataset 2^28 words, cache 2^26 words in 65536 segments, 32 registers, 24 blocks/SM at 1 warp(s)/block, target sm_89
RESULT bench v5-genesis pack v5-genesis on NVIDIA_GeForce_RTX_4090: nvrtc 559 cache 2 dataset 32 hot 0 check 1100 race 0 ms variant base class v5 (state leaves 93, uploaded for the build and freed); self-test PASS (cache head, last line and FNV-1a 64 48c4f5bf24166b2e; dataset head, word [268435455] and 64 samples; 96 of 96 vector lanes)
RESULT bench v5-genesis warm-up dispatch (base 0): 268.89 ms; 250 timed dispatches of 16777216 nonces: mean 268.89 ms
RESULT bench v5-genesis RESULT pack=v5-genesis class=mx8+sh256x27+state device=NVIDIA_GeForce_RTX_4090 arch=sm_89 regs=32 blocks_per_sm=24 warps=0 resident=3072 arena_mib=0 hot_mib=0 hot_slots=0 hot_fill_ms=0.00 nonces=16777216 batches=250 check=PASS fingerprint=ae74193ddad19e19 mhs=62.394 loads=128 bytes=512 scratch_ops=0 time=wall
RESULT smi v5-genesis samples 65 mean_power_w 271.9 mean_sm_mhz 2805
RESULT worker end 15:20:03

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RESULT worker pack packs/cs64-bound 15:16:17
RESULT check packs/cs64-bound info igneum-worker-cuda 1.0 (4 October 2026): device 0 NVIDIA_GeForce_RTX_5090 (sm_120, 170 SMs), driver 13.0 from libcuda.so.1, NVRTC 12.8 from libnvrtc.so.12, target sm_120 (the device's architecture, listed by NVRTC)
RESULT check packs/cs64-bound check PASS packs/cs64-bound in 2256 ms: nvrtc 1089 cache 3 dataset 30 hot 0 check 1130 race 0 ms variant base class v2; self-test PASS (cache head, last line and FNV-1a 64 48c4f5bf24166b2e; dataset head, word [268435455] and 64 samples; 96 of 96 vector lanes)
RESULT check packs/cs64-bound epoch 69676e65756d2d7636632f30 day 6461792f323032362d31302d3033, dataset 2^28 words, cache 2^26 words in 65536 segments, 80 registers, 24 blocks/SM at 1 warp(s)/block, target sm_120
RESULT bench packs/cs64-bound pack packs/cs64-bound on NVIDIA_GeForce_RTX_5090: nvrtc 1086 cache 3 dataset 30 hot 0 check 1122 race 0 ms variant base class v2; self-test PASS (cache head, last line and FNV-1a 64 48c4f5bf24166b2e; dataset head, word [268435455] and 64 samples; 96 of 96 vector lanes)
RESULT bench packs/cs64-bound warm-up dispatch (base 0): 268.09 ms; 250 timed dispatches of 16777216 nonces: mean 266.80 ms
RESULT bench packs/cs64-bound RESULT pack=packs/cs64-bound class=mx8+sh256x27 device=NVIDIA_GeForce_RTX_5090 arch=sm_120 regs=80 blocks_per_sm=24 warps=0 resident=4080 arena_mib=0 hot_mib=0 hot_slots=0 hot_fill_ms=0.00 nonces=16777216 batches=250 check=PASS fingerprint=ad0cec2a42c84aff mhs=62.882 loads=128 bytes=512 scratch_ops=0 time=wall
RESULT smi packs/cs64-bound samples 65 mean_power_w 574.2 mean_sm_mhz 2797
RESULT worker pack v5-genesis 15:17:29
RESULT check v5-genesis info igneum-worker-cuda 1.0 (4 October 2026): device 0 NVIDIA_GeForce_RTX_5090 (sm_120, 170 SMs), driver 13.0 from libcuda.so.1, NVRTC 12.8 from libnvrtc.so.12, target sm_120 (the device's architecture, listed by NVRTC)
RESULT check v5-genesis check PASS v5-genesis in 1709 ms: nvrtc 505 cache 5 dataset 32 hot 0 check 1162 race 0 ms variant base class v5 (state leaves 93, uploaded for the build and freed); self-test PASS (cache head, last line and FNV-1a 64 48c4f5bf24166b2e; dataset head, word [268435455] and 64 samples; 96 of 96 vector lanes)
RESULT check v5-genesis epoch 69676e65756d2d67656e65736973 day 6461792f323032362d31302d3033, dataset 2^28 words, cache 2^26 words in 65536 segments, 48 registers, 24 blocks/SM at 1 warp(s)/block, target sm_120
RESULT bench v5-genesis pack v5-genesis on NVIDIA_GeForce_RTX_5090: nvrtc 500 cache 3 dataset 30 hot 0 check 1156 race 0 ms variant base class v5 (state leaves 93, uploaded for the build and freed); self-test PASS (cache head, last line and FNV-1a 64 48c4f5bf24166b2e; dataset head, word [268435455] and 64 samples; 96 of 96 vector lanes)
RESULT bench v5-genesis warm-up dispatch (base 0): 258.26 ms; 250 timed dispatches of 16777216 nonces: mean 266.46 ms
RESULT bench v5-genesis RESULT pack=v5-genesis class=mx8+sh256x27+state device=NVIDIA_GeForce_RTX_5090 arch=sm_120 regs=48 blocks_per_sm=24 warps=0 resident=4080 arena_mib=0 hot_mib=0 hot_slots=0 hot_fill_ms=0.00 nonces=16777216 batches=250 check=PASS fingerprint=ae74193ddad19e19 mhs=62.963 loads=128 bytes=512 scratch_ops=0 time=wall
RESULT smi v5-genesis samples 65 mean_power_w 571.4 mean_sm_mhz 2798
RESULT worker end 15:18:41

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# The multi-family adversary: one programmable chip against the 180-day family bank (8 October 2026)
Branch `class-v6-adversary` from the box mirror's master (c86a7e23), the adversary lane of the second external review
(the founder's 15:5x BST acceptance). The question the review put: does the 180-day family calendar add cost to a chip,
or only change its firmware? The answer is built as the adversary would build it: ONE programmable design that executes
every entry of the bank (`docs/analysis/rotation/layer3-family-bank.md`: 18 op families, 3 dataset atoms, the fold form
with drawn constants, 3 block shapes, the 64-register window, the per-era parameter draws), with the designer free to
choose lanes, clock, pipeline, banking, time-multiplexing, memory organisation and the memory arrangement itself, and
priced on a complete machine. Every chip figure is synthesis and placement of RTL written for this lane (Yosys 0.68 and
OpenROAD, the ORFS image, ASAP7, run on rented CPU hosts, never on the Mac, never on a Hetzner box); every GPU figure is
the record's measurement (`docs/analysis/counter-asic-4-research.md` 15.1a, the floor programme's tier table in the
design document 10.4). Labels as the record uses them: measured, modelled, claimed, approximate. The RTL, testbenches,
flow and collector are under `tools/chip-model/mf/`; the k lane's rows (`floor/shadow-k.md`) are cited, never re-run.
The standing rules this file is written under (the review, 15:4x BST): the adversary's design is free; a synthesised
k is a model, never a lower bound; a family transition is credited with an obsolescence benefit only where a loss of
competitiveness is demonstrated; the stress life is 3 years, shown at 0.5, 1, 2 and 3; the cohort is the discrete-GPU
population, Apple reported and not headlined; every defence is scored after the adversary re-optimises.
## 0. One page
(filled from the rows below at each cut; section 8 carries the three-part statement)
## 1. The design: what the adversary builds
### 1.1 What it must execute
| Bank entry | What the core does with it | Silicon or firmware |
|---|---|---|
| G1 to G7: add, sub, xor, or, rotl, rotr, and the lossy or | the ALU group, one unit per lane, operands isolated | silicon once; the mix weights are the program |
| G8, G9, G6: mul, mulhi, mad | one 32 x 32 multiplier per lane; mulhi is the high word of the same product; mad adds the third read | silicon once |
| G10 shfl (the 32-lane xor-mask shuffle) | a log2(LANES)-stage butterfly across the core's lanes, the mask from the instruction | silicon once per core |
| R1 shfla (lane + delta) | a general LANES:1 crossbar per lane, the delta from a register | silicon once per core (the one network a butterfly cannot emulate in one op) |
| R2 perm (prmt) | the 4-of-8 byte selector | silicon once |
| R3 popc and clz | a popcount tree and a priority encoder | silicon once |
| R4 bfe, R5 shl and shr, R6 sel, R7 andn | a shifter, a mask, a select, an and-not | silicon once (fractions of an adder each) |
| R8 mm8 (the int8 tile) | a u8 dot4 accumulate per lane (4 MACs per op; the card's m8n8k16 tile is 32 MACs per lane, so 8 chip ops per card tile) | silicon once |
| lop3 | the 8-bit truth table | silicon once |
| the load and the fold form | the lane's own multiplier computes `x * M`, then the rotate and the three masks with the era's constants in registers; the returned word writes the destination | silicon once; M, R, WM, OFF, MASK are registers written at the era |
| W = 4 wide reads | the fold step `x = rotl(x, r) * M ^ w` as an instruction (fwd), three per load | firmware |
| the 64-register window | 64 x 32 bits per lane in an SRAM macro | silicon once (the macro) |
| the 3 block shapes (64, 128, 256) | the program-length register; the imem holds 256 | firmware |
| the drawn select tree | a 32-entry op permutation ahead of decode, written at the era | firmware (a 160-bit register) |
| the op-mix band, the fold constants | the program and five registers | firmware |
| the 3 dataset atoms (mixer x4, x8, dr368) | the per-window dataset build runs on the same core as a program (the atoms are straight-line ARX and multiply code over 16 registers); the per-hash path never executes an atom | firmware; the build's cost is section 7 |
### 1.2 The microarchitecture (the designer's choices)
- **The register state is an SRAM macro, not flops.** One FakeRAM2.0 `fakeram7_64x256` (64 words x 256 bits, single
port) per 8 lanes: the lanes are SIMD, every lane reads the same register index, so one 256-bit access serves eight
lanes' 32-bit reads. The macro's LEF and Liberty come with the ORFS ASAP7 platform (ABKGroup FakeRAM2.0, 7 nm,
0.70 V; area 1,517 um^2 for the 64 x 256, 365 um^2 for the 256 x 34); the placement, the wiring and the clock tree
see the macro as a real block. Its dynamic energy is NOT taken from the FakeRAM Liberty (a placeholder, 1.345 per
clock edge identical for every size, "VALUES NOT REALISTIC" in the generator's own config); section 2.3 replaces it
with a published macro energy band and the gate-level simulation supplies the exact access counts.
- **The instruction memory is two `fakeram7_256x34` macros** shared by every lane of the core (40 bits used of 68).
- **A single-port macro is time-multiplexed over a 5-phase slot:** read dst, read src, read src2 only when the op
needs it (mad, lop3, sel, mm8, shfla), execute, write back. A core retires LANES lane-ops per 5 cycles; throughput is
bought with lane count (die area), the cheapest resource the chip has, not with ports.
- **Every unit's operands are isolated** (AND-gated by its own select), so an unused unit does not toggle: adding a
family's unit costs leakage and a wider result mux, not switching on every op. The k lane's core evaluates every unit
every cycle; this is one of the reasons its figure is not a lower bound.
- **The era's draws are registers** (fold constants, program length, the select tree); a family epoch writes them.
- Clock 1,500 ps (667 MHz) at the TC corner, as the k lane; nothing pipelined beyond the slot; two builds: 8 lanes
(placed and routed) and 32 lanes (synthesised), each in two variants: `full` (every bank entry) and `base` (the 10
genesis families with the load and the fold, the same microarchitecture): the difference between the two is what the
bank adds to the chip.
### 1.3 What the card pays for the same instruction (the GPU side, measured)
The 5090's pJ per counted op at stock and at the 1,300 MHz lock (15.1a): add-class 11.3 / 6.2, mul and mad 13.9 / 8.3,
mulhi 39.6 / 21.0, prmt 22.3 / 11.5, lop3 24.1 / 13.0, shfl 55.8 / 29.4, the u8 tile 4.1 / 2.2 per MAC. The reserve
families by the measured NVIDIA step-cost ratio to the add step (design 4.2): shfla 1.53, popc 1.50, clz 1.63, bfe
1.54, shl and shr 0.75, sel and andn about 1.0 (approximate), mm8 by the tile row (32 MACs per lane per instruction).
## 2. Method
### 2.1 The flow
ORFS on ASAP7 (7.5-track RVT, TC corner 0.70 V, NLDM), the default flow: Yosys with ABC, floorplan at 40 percent
utilisation (30 for the 32-lane core) with the macros placed by the flow's macro placer under the BLOCKS power grid,
global and detailed placement, CTS, global and detailed routing, OpenRCX parasitics. Power is OpenSTA `report_power`
under the VCD of a random-input gate-level simulation of the netlist (iverilog; every instruction field drawn by
`$random`, the window initialised with random words, a random returned word on every load), with a propagated 0.5
activity as the cross-check. Synthesis-only rows (no wires, no clock tree) are marked; placed rows carry the SPEF. The routed runs clock at
12,000 ps with the ABC target held at 1,500 ps: the unpipelined execute path (the multiplier, the fold and the
lane reduction) is 10.6 ns at ASAP7 TC, and at 1,500 ps the flow's timing repair spent its time on a path the
adversary would pipeline instead (two to three registers per lane, about 0.1 to 0.2 pJ per lane-op, inside the
band). Energy per op does not depend on the period; the leakage term does, and the collector restates it at the
1,500 ps equivalent for the routed rows (both are in `table.csv`).
### 2.2 The activity and the steady state
Each row is a tag: the op field fixed per family (`+fam=K`), or a drawn program: the class v4 draw over the 10 genesis
families (`mix`), the same with one load in 16 (`mixld`), the draw with two reserve families live at 4 points each
(`mix1`: shfla and mm8, the two dearest), every reserve family live at 4 points (`mix2`, the bank's bound, not a legal
draw), the W = 4 form (`mixw4`), the 64-instruction shape (`mix64`). Two run lengths per tag (500 and 2,000 clocks, 100
and 400 slots) bracket the 326-clock load phase (reset, the era's registers, the 256-word program, the 64-word window
init) and the run-phase power is solved from the pair, as the k lane does.
### 2.3 The SRAM macro energy (the one modelled term on the chip side)
The FakeRAM Liberty's internal power is a placeholder, so the collector removes the macros' Liberty-attributed power
(reported separately per VCD with `report_power -instances`) and adds a modelled access energy times the exact
access count from the simulation (3 reads and 1 write per slot for a three-operand op, 2 reads and 1 write otherwise,
per 8 lanes; 2 imem reads per slot per core). The band: a 64 x 256 single-port macro at a 7 nm class node 3.5 pJ per
256-bit access (2.0 to 7.0); a 256 x 34 macro 1.5 pJ per access (0.8 to 3.0). Sources: Horowitz, ISSCC 2014 (45 nm:
an 8 KB SRAM read of 64 bits 10 pJ, 32 KB 20 pJ), scaled by the bits moved and by the energy-per-bit reduction from
45 nm to a 7 nm class node (about 0.1x to 0.2x, approximate, the same generation scaling the record applies to logic);
the k lane's "2 to 4 pJ per 32-bit read, approximate" for a 4 KB imem; CACTI-class estimates for a 16 Kbit macro at
7 nm (0.01 to 0.03 pJ per bit read, approximate). Every row carries the band; the low end is near a flop array with
perfect clock gating, the high end a conservative compiler macro. The macros' switching on their output nets (256
bits into the lanes' latches) stays in the logic figure, measured.
### 2.4 Node scaling (claimed) and what the method leaves out
ASAP7 is a predictive 7 nm-class PDK; the row is stated at ASAP7 and scaled by the foundry's headline per-node
power reductions at the same speed (the k lane's factors, every one claimed): N5 = 0.70, N3 = 0.50, N2 = 0.36 of
ASAP7. Node-for-node against the 5090 (TSMC 4N, N5 class) is the N5 column; a node ahead is N3. Left out on the chip
side: the memory controller's queueing logic and the lane's address output (priced in the board model as the
controller die), test and clock distribution beyond the block; on the card side the 15.1a figure is the whole card's
marginal per counted op, which includes fetch, decode, operand collection and the register file, so the comparison
is the chip's whole lane (fetch, decode, window, units, network) against the card's whole lane.
## 3. The rows: pJ per lane-op per family on the base core (synthesis only, 8 lanes)
Synthesis only (no wires, no clock tree), 8 lanes, 1,500 ps, ASAP7 TC; "pJ logic" is OpenSTA's figure for the
standard cells under the VCD with the FakeRAM placeholder removed (its sequential and combinational parts beside it);
"pJ SRAM" the modelled macro term at the simulated access count (low / nominal / high, section 2.3); the per-op
figure is logic plus the nominal SRAM term, the band in brackets; the 5090 column is 15.1a (the reserve families
by the measured step ratio; the mix rows against the card's 10.3 pJ per op on the class v4 draw at the lock, 18.8
unlocked by the ARX ratio, approximate). The full core: 95,678 cells and 3 macros (the base core 66,973 and 3
macros: the bank adds 43 percent of the standard cells, 0.13 mW of leakage per 8 lanes, and 11 percent to the
energy of the class v4 draw on the same microarchitecture, the wider result mux and the leakage of the idle units).
The full core (every bank entry):
| Design | Stage | Family | Cells | Logic W | Leak W | pJ logic (seq / comb) | pJ SRAM (low / nom / high) | pJ/lane-op ASAP7 | N5 | N3 | N2 | 5090 pJ/op unlocked / lock | k N5 lock | k N3 lock | k N3 unlocked |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| mf8full | power_synth | mix | 95678 | 0.00514 | 0.000395 | 4.82 (0.88 / 3.6) | 0.99 / 1.76 / 3.52 | 6.58 (5.81 to 8.34) | 4.61 | 3.32 | 2.39 | 18.8 / 10.3 | 0.447 | 0.322 | 0.176 |
| mf8full | power_synth | mixld | 95678 | 0.00513 | 0.000395 | 4.81 (0.88 / 3.6) | 0.986 / 1.75 / 3.5 | 6.56 (5.79 to 8.31) | 4.59 | 3.31 | 2.38 | 18.8 / 10.3 | 0.446 | 0.321 | 0.176 |
| mf8full | power_synth | mix1 | 95678 | 0.00495 | 0.000395 | 4.64 (0.89 / 3.4) | 1.01 / 1.8 / 3.59 | 6.43 (5.65 to 8.23) | 4.5 | 3.24 | 2.33 | 18.8 / 10.3 | 0.437 | 0.315 | 0.172 |
| mf8full | power_synth | mix2 | 95678 | 0.00436 | 0.000396 | 4.09 (0.88 / 2.8) | 1 / 1.78 / 3.56 | 5.87 (5.09 to 7.65) | 4.11 | 2.96 | 2.13 | 18.8 / 10.3 | 0.399 | 0.287 | 0.157 |
| mf8full | power_synth | mixw4 | 95678 | 0.00508 | 0.000395 | 4.76 (0.88 / 3.5) | 0.977 / 1.73 / 3.47 | 6.49 (5.74 to 8.23) | 4.55 | 3.27 | 2.36 | 18.8 / 10.3 | 0.441 | 0.318 | 0.174 |
| mf8full | power_synth | mix64 | 95678 | 0.00488 | 0.000395 | 4.58 (0.88 / 3.3) | 0.993 / 1.76 / 3.53 | 6.34 (5.57 to 8.1) | 4.44 | 3.19 | 2.3 | 18.8 / 10.3 | 0.431 | 0.31 | 0.17 |
| mf8full | power_synth | add | 95678 | 0.003 | 0.000396 | 2.81 (0.86 / 1.6) | 0.95 / 1.69 / 3.38 | 4.5 (3.76 to 6.18) | 3.15 | 2.27 | 1.63 | 11.3 / 6.2 | 0.508 | 0.366 | 0.201 |
| mf8full | power_synth | sub | 95678 | 0.00299 | 0.000396 | 2.8 (0.86 / 1.6) | 0.95 / 1.69 / 3.38 | 4.49 (3.75 to 6.18) | 3.14 | 2.26 | 1.63 | 11.3 / 6.2 | 0.507 | 0.365 | 0.2 |
| mf8full | power_synth | xor | 95678 | 0.00308 | 0.000396 | 2.89 (0.86 / 1.7) | 0.95 / 1.69 / 3.38 | 4.57 (3.84 to 6.26) | 3.2 | 2.3 | 1.66 | 11.3 / 6.2 | 0.516 | 0.372 | 0.204 |
| mf8full | power_synth | or | 95678 | 0.00183 | 0.000397 | 1.72 (0.84 / 0.5) | 0.95 / 1.69 / 3.38 | 3.41 (2.67 to 5.09) | 2.38 | 1.72 | 1.24 | 11.3 / 6.2 | 0.385 | 0.277 | 0.152 |
| mf8full | power_synth | rotl | 95678 | 0.00318 | 0.000396 | 2.99 (0.86 / 1.8) | 0.95 / 1.69 / 3.38 | 4.67 (3.94 to 6.36) | 3.27 | 2.36 | 1.7 | 11.3 / 6.2 | 0.528 | 0.38 | 0.208 |
| mf8full | power_synth | rotr | 95678 | 0.003 | 0.000396 | 2.81 (0.86 / 1.6) | 0.95 / 1.69 / 3.38 | 4.5 (3.76 to 6.18) | 3.15 | 2.27 | 1.63 | 11.3 / 6.2 | 0.508 | 0.366 | 0.201 |
| mf8full | power_synth | mul | 95678 | 0.00265 | 0.000396 | 2.48 (0.85 / 1.3) | 0.95 / 1.69 / 3.38 | 4.17 (3.43 to 5.86) | 2.92 | 2.1 | 1.51 | 13.9 / 8.3 | 0.352 | 0.253 | 0.151 |
| mf8full | power_synth | mulhi | 95678 | 0.00249 | 0.000396 | 2.33 (0.85 / 1.1) | 0.95 / 1.69 / 3.38 | 4.02 (3.28 to 5.71) | 2.81 | 2.03 | 1.46 | 39.6 / 21 | 0.134 | 0.0965 | 0.0512 |
| mf8full | power_synth | mad | 95678 | 0.00562 | 0.000395 | 5.26 (0.91 / 4) | 1.2 / 2.12 / 4.25 | 7.39 (6.46 to 9.51) | 5.17 | 3.72 | 2.68 | 13.9 / 8.3 | 0.623 | 0.449 | 0.268 |
| mf8full | power_synth | shfl | 95678 | 0.00266 | 0.000397 | 2.49 (0.86 / 1.3) | 0.95 / 1.69 / 3.38 | 4.18 (3.44 to 5.87) | 2.93 | 2.11 | 1.52 | 55.8 / 29.4 | 0.0995 | 0.0716 | 0.0377 |
| mf8full | power_synth | load | 95678 | 0.00433 | 0.000395 | 4.06 (0.86 / 2.8) | 0.95 / 1.69 / 3.38 | 5.75 (5.01 to 7.44) | 4.03 | 2.9 | 2.09 | 13.9 / 8.3 | 0.485 | 0.349 | 0.209 |
| mf8full | power_synth | fwd | 95678 | 0.004 | 0.000395 | 3.75 (0.86 / 2.5) | 0.95 / 1.69 / 3.38 | 5.44 (4.7 to 7.13) | 3.81 | 2.74 | 1.97 | 13.9 / 8.3 | 0.459 | 0.33 | 0.197 |
| mf8full | power_synth | prmt | 95678 | 0.00255 | 0.000397 | 2.39 (0.86 / 1.2) | 0.95 / 1.69 / 3.38 | 4.07 (3.34 to 5.76) | 2.85 | 2.05 | 1.48 | 22.3 / 11.5 | 0.248 | 0.179 | 0.0921 |
| mf8full | power_synth | lop3 | 95678 | 0.003 | 0.000397 | 2.81 (0.91 / 1.5) | 1.2 / 2.12 / 4.25 | 4.94 (4.01 to 7.06) | 3.46 | 2.49 | 1.79 | 24.1 / 13 | 0.266 | 0.191 | 0.103 |
| mf8full | power_synth | shfla | 95678 | 0.00302 | 0.000397 | 2.83 (0.9 / 1.6) | 1.2 / 2.12 / 4.25 | 4.95 (4.03 to 7.08) | 3.47 | 2.5 | 1.8 | 17.3 / 9.49 | 0.365 | 0.263 | 0.144 |
| mf8full | power_synth | popc | 95678 | 0.0017 | 0.000397 | 1.59 (0.85 / 0.38) | 0.95 / 1.69 / 3.38 | 3.28 (2.54 to 4.97) | 2.3 | 1.65 | 1.19 | 17 / 9.3 | 0.247 | 0.178 | 0.0976 |
| mf8full | power_synth | clz | 95678 | 0.00173 | 0.000397 | 1.62 (0.85 / 0.41) | 0.95 / 1.69 / 3.38 | 3.31 (2.57 to 5) | 2.32 | 1.67 | 1.2 | 18.4 / 10.1 | 0.229 | 0.165 | 0.0906 |
| mf8full | power_synth | bfe | 95678 | 0.00182 | 0.000397 | 1.71 (0.85 / 0.49) | 0.95 / 1.69 / 3.38 | 3.39 (2.66 to 5.08) | 2.38 | 1.71 | 1.23 | 17.4 / 9.55 | 0.249 | 0.179 | 0.0983 |
| mf8full | power_synth | shl | 95678 | 0.00234 | 0.000397 | 2.19 (0.86 / 0.98) | 0.95 / 1.69 / 3.38 | 3.88 (3.14 to 5.57) | 2.71 | 1.95 | 1.41 | 8.48 / 4.65 | 0.584 | 0.42 | 0.231 |
| mf8full | power_synth | shr | 95678 | 0.00221 | 0.000397 | 2.07 (0.85 / 0.84) | 0.95 / 1.69 / 3.38 | 3.76 (3.02 to 5.45) | 2.63 | 1.89 | 1.36 | 8.48 / 4.65 | 0.566 | 0.407 | 0.224 |
| mf8full | power_synth | sel | 95678 | 0.0028 | 0.000397 | 2.63 (0.91 / 1.4) | 1.2 / 2.12 / 4.25 | 4.75 (3.83 to 6.88) | 3.33 | 2.4 | 1.72 | 11.3 / 6.2 | 0.537 | 0.386 | 0.212 |
| mf8full | power_synth | andn | 95678 | 0.00234 | 0.000397 | 2.19 (0.86 / 0.98) | 0.95 / 1.69 / 3.38 | 3.88 (3.14 to 5.57) | 2.72 | 1.96 | 1.41 | 11.3 / 6.2 | 0.438 | 0.315 | 0.173 |
| mf8full | power_synth | mm8 | 95678 | 0.0036 | 0.000396 | 3.37 (0.91 / 2.1) | 1.2 / 2.12 / 4.25 | 5.5 (4.57 to 7.62) | 3.85 | 2.77 | 2 | 16.4 / 8.8 | 0.437 | 0.315 | 0.169 |
The base core (the 10 genesis families on the same microarchitecture; the comparator):
| Design | Stage | Family | Cells | Logic W | Leak W | pJ logic (seq / comb) | pJ SRAM (low / nom / high) | pJ/lane-op ASAP7 | N5 | N3 | N2 | 5090 pJ/op unlocked / lock | k N5 lock | k N3 lock | k N3 unlocked |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| mf8base | power_synth | mix | 66973 | 0.00443 | 0.000263 | 4.15 (0.88 / 3) | 0.99 / 1.76 / 3.52 | 5.91 (5.14 to 7.66) | 4.13 | 2.98 | 2.14 | 18.8 / 10.3 | 0.401 | 0.289 | 0.158 |
| mf8base | power_synth | mixld | 66973 | 0.00439 | 0.000263 | 4.12 (0.88 / 3) | 0.986 / 1.75 / 3.5 | 5.87 (5.1 to 7.62) | 4.11 | 2.96 | 2.13 | 18.8 / 10.3 | 0.399 | 0.287 | 0.157 |
| mf8base | power_synth | add | 66973 | 0.00246 | 0.000264 | 2.31 (0.86 / 1.2) | 0.95 / 1.69 / 3.38 | 4 (3.26 to 5.68) | 2.8 | 2.01 | 1.45 | 11.3 / 6.2 | 0.451 | 0.325 | 0.178 |
| mf8base | power_synth | sub | 66973 | 0.00245 | 0.000264 | 2.29 (0.86 / 1.2) | 0.95 / 1.69 / 3.38 | 3.98 (3.24 to 5.67) | 2.79 | 2.01 | 1.44 | 11.3 / 6.2 | 0.449 | 0.324 | 0.178 |
| mf8base | power_synth | xor | 66973 | 0.00247 | 0.000264 | 2.32 (0.86 / 1.2) | 0.95 / 1.69 / 3.38 | 4 (3.27 to 5.69) | 2.8 | 2.02 | 1.45 | 11.3 / 6.2 | 0.452 | 0.326 | 0.179 |
| mf8base | power_synth | or | 66973 | 0.0016 | 0.000265 | 1.5 (0.84 / 0.42) | 0.95 / 1.69 / 3.38 | 3.19 (2.45 to 4.87) | 2.23 | 1.61 | 1.16 | 11.3 / 6.2 | 0.36 | 0.259 | 0.142 |
| mf8base | power_synth | rotl | 66973 | 0.00259 | 0.000264 | 2.43 (0.86 / 1.3) | 0.95 / 1.69 / 3.38 | 4.11 (3.38 to 5.8) | 2.88 | 2.07 | 1.49 | 11.3 / 6.2 | 0.464 | 0.334 | 0.183 |
| mf8base | power_synth | rotr | 66973 | 0.00251 | 0.000264 | 2.35 (0.86 / 1.3) | 0.95 / 1.69 / 3.38 | 4.04 (3.3 to 5.73) | 2.83 | 2.04 | 1.47 | 11.3 / 6.2 | 0.456 | 0.328 | 0.18 |
| mf8base | power_synth | mul | 66973 | 0.00229 | 0.000264 | 2.14 (0.85 / 1.1) | 0.95 / 1.69 / 3.38 | 3.83 (3.09 to 5.52) | 2.68 | 1.93 | 1.39 | 13.9 / 8.3 | 0.323 | 0.233 | 0.139 |
| mf8base | power_synth | mulhi | 66973 | 0.00217 | 0.000264 | 2.03 (0.84 / 0.96) | 0.95 / 1.69 / 3.38 | 3.72 (2.98 to 5.41) | 2.61 | 1.88 | 1.35 | 39.6 / 21 | 0.124 | 0.0893 | 0.0474 |
| mf8base | power_synth | mad | 66973 | 0.00472 | 0.000263 | 4.43 (0.9 / 3.3) | 1.2 / 2.12 / 4.25 | 6.55 (5.62 to 8.67) | 4.58 | 3.3 | 2.38 | 13.9 / 8.3 | 0.552 | 0.398 | 0.237 |
| mf8base | power_synth | shfl | 66973 | 0.00192 | 0.000265 | 1.8 (0.86 / 0.7) | 0.95 / 1.69 / 3.38 | 3.49 (2.75 to 5.17) | 2.44 | 1.76 | 1.27 | 55.8 / 29.4 | 0.083 | 0.0598 | 0.0315 |
| mf8base | power_synth | load | 66973 | 0.00359 | 0.000263 | 3.36 (0.86 / 2.3) | 0.95 / 1.69 / 3.38 | 5.05 (4.31 to 6.74) | 3.53 | 2.54 | 1.83 | 13.9 / 8.3 | 0.426 | 0.307 | 0.183 |
Reading the rows. (1) The ALU-group families cost the chip 3.1 to 3.3 pJ per lane-op at N5 against the card's 6.2
at the lock (k 0.51 to 0.53); or, popc, clz, bfe, prmt 2.3 to 2.9 (k 0.23 to 0.38); the multiply 2.9 (k 0.35);
mulhi 2.8 against the card's 21 (k 0.13); the shuffle 2.9 against 29.4 (k 0.10); mad is the dearest op for the
chip at 5.2 (three reads and two units, k 0.62) and the shifters the highest k (0.57 to 0.58) because the card
does them cheapest. (2) The SRAM term is 1.7 pJ nominal per lane-op (0.95 to 3.4): a third of the row; the
sequential term (the phase latches, the instruction register, the counters at five edges per op) 0.86 pJ; the rest
is the units and the macro output nets. (3) The reserve families are cheaper for the chip than the genesis
families: every live-family mix sits under the class v4 draw, and the bound with all eight live reads 11 percent
under it, because the card's dearest instructions (mulhi, shfl, mad) are the genesis ones.
## 4. The whole-hash energy and k per family, node-for-node and a node ahead
The whole-hash shadow is 102,612 chip ops (the 102,100 counted shadow ops of the record plus the 512-instruction
base program; W = 4 adds 384 fold steps). The chip's cost is absolute (its own pJ at its node); the card's premium
on the same draw is the measured 0.652 microjoules at the lock, moved by the live family's measured step ratio at 4
points of 79 (modelled). Node-for-node is N5 (the 5090's own class), a node ahead N3; every factor claimed.
design mf8full stage power_synth; the class v4 draw on the core: 6.58 pJ per lane-op ASAP7, 4.61 N5, 3.32 N3 (band 4.07 to 5.84 at N5)
| Family live (4 points of 79) or draw | Chip pJ per op N5 / N3 (band) | 5090 pJ per op at the lock | k N5 / N3 | Chip shadow per hash, microjoules N5 / N3 (the mix with the family live) | Change vs the class v4 draw | The card's premium per hash at the lock (modelled from the step ratio) | Change |
|---|---|---|---|---|---|---|---|
| the class v4 draw (10 genesis families) | 4.61 / 3.32 (4.07 to 5.84) | 10.3 | 0.45 / 0.32 | 0.473 / 0.340 | +0.0 percent | 0.652 | +0.0 percent |
| add (unit row, every instruction) | 3.15 / 2.27 (2.63 to 4.33) | 6.2 | 0.51 / 0.37 | 0.323 / 0.233 | -31.7 percent | 0.392 | -39.8 percent |
| sub (unit row, every instruction) | 3.14 / 2.26 (2.63 to 4.32) | 6.2 | 0.51 / 0.36 | 0.322 / 0.232 | -31.8 percent | 0.392 | -39.8 percent |
| xor (unit row, every instruction) | 3.20 / 2.30 (2.68 to 4.38) | 6.2 | 0.52 / 0.37 | 0.328 / 0.236 | -30.5 percent | 0.392 | -39.8 percent |
| or (unit row, every instruction) | 2.38 / 1.72 (1.87 to 3.57) | 6.2 | 0.38 / 0.28 | 0.245 / 0.176 | -48.2 percent | 0.392 | -39.8 percent |
| rotl (unit row, every instruction) | 3.27 / 2.36 (2.75 to 4.45) | 6.2 | 0.53 / 0.38 | 0.336 / 0.242 | -29.0 percent | 0.392 | -39.8 percent |
| rotr (unit row, every instruction) | 3.15 / 2.27 (2.63 to 4.33) | 6.2 | 0.51 / 0.37 | 0.323 / 0.233 | -31.7 percent | 0.392 | -39.8 percent |
| mul (unit row, every instruction) | 2.92 / 2.10 (2.40 to 4.10) | 8.3 | 0.35 / 0.25 | 0.299 / 0.216 | -36.7 percent | 0.525 | -19.4 percent |
| mulhi (unit row, every instruction) | 2.81 / 2.03 (2.30 to 3.99) | 21.0 | 0.13 / 0.10 | 0.289 / 0.208 | -38.9 percent | 1.329 | +103.9 percent |
| mad (unit row, every instruction) | 5.17 / 3.72 (4.52 to 6.66) | 8.3 | 0.62 / 0.45 | 0.531 / 0.382 | +12.3 percent | 0.525 | -19.4 percent |
| shfl (unit row, every instruction) | 2.93 / 2.11 (2.41 to 4.11) | 29.4 | 0.10 / 0.07 | 0.300 / 0.216 | -36.5 percent | 1.861 | +185.4 percent |
| load (unit row, every instruction) | 4.03 / 2.90 (3.51 to 5.21) | 8.3 | 0.48 / 0.35 | 0.413 / 0.297 | -12.6 percent | 0.525 | -19.4 percent |
| prmt live | 2.85 / 2.05 (2.34 to 4.03) | 11.5 | 0.25 / 0.18 | 0.464 / 0.334 | -1.9 percent | 0.662 | +1.5 percent |
| lop3 live | 3.46 / 2.49 (2.81 to 4.94) | 13.0 | 0.27 / 0.19 | 0.467 / 0.336 | -1.3 percent | 0.688 | +5.6 percent |
| shfla live | 3.47 / 2.50 (2.82 to 4.95) | 9.5 | 0.37 / 0.26 | 0.467 / 0.336 | -1.3 percent | 0.669 | +2.7 percent |
| popc live | 2.30 / 1.65 (1.78 to 3.48) | 9.3 | 0.25 / 0.18 | 0.461 / 0.332 | -2.5 percent | 0.669 | +2.5 percent |
| clz live | 2.32 / 1.67 (1.80 to 3.50) | 10.1 | 0.23 / 0.17 | 0.461 / 0.332 | -2.5 percent | 0.673 | +3.2 percent |
| bfe live | 2.38 / 1.71 (1.86 to 3.56) | 9.5 | 0.25 / 0.18 | 0.461 / 0.332 | -2.5 percent | 0.670 | +2.7 percent |
| shl live | 2.71 / 1.95 (2.20 to 3.90) | 4.7 | 0.58 / 0.42 | 0.463 / 0.333 | -2.1 percent | 0.644 | -1.3 percent |
| shr live | 2.63 / 1.89 (2.12 to 3.81) | 4.7 | 0.57 / 0.41 | 0.462 / 0.333 | -2.2 percent | 0.644 | -1.3 percent |
| sel live | 3.33 / 2.40 (2.68 to 4.81) | 6.2 | 0.54 / 0.39 | 0.466 / 0.336 | -1.4 percent | 0.652 | +0.0 percent |
| andn live | 2.72 / 1.96 (2.20 to 3.90) | 6.2 | 0.44 / 0.32 | 0.463 / 0.333 | -2.1 percent | 0.652 | +0.0 percent |
| mm8 live | 3.85 / 2.77 (3.20 to 5.34) | 8.8 | 0.44 / 0.31 | 0.469 / 0.337 | -0.8 percent | 0.699 | +7.2 percent |
| fwd (unit row, every instruction) | 3.81 / 2.74 (3.29 to 4.99) | 8.3 | 0.46 / 0.33 | 0.391 / 0.281 | -17.3 percent | 0.525 | -19.4 percent |
| the draw with shfla and mm8 live (measured mix) | 4.50 / 3.24 (3.96 to 5.76) | 10.3 | 0.44 / 0.31 | 0.462 / 0.333 | -2.2 percent | 0.652 | +0.0 percent |
| every reserve family live at 4 points (the bound, measured mix) | 4.11 / 2.96 (3.56 to 5.35) | 10.3 | 0.40 / 0.29 | 0.422 / 0.304 | -10.8 percent | 0.652 | +0.0 percent |
| the draw with one load in 16 | 4.59 / 3.31 (4.06 to 5.82) | 10.3 | 0.45 / 0.32 | 0.471 / 0.339 | -0.3 percent | 0.652 | +0.0 percent |
| W = 4: three fold steps per load | 4.55 / 3.27 (4.02 to 5.76) | 10.3 | 0.44 / 0.32 | 0.466 / 0.336 | -1.3 percent | 0.652 | +0.0 percent |
| the 64-instruction shape | 4.44 / 3.19 (3.90 to 5.67) | 10.3 | 0.43 / 0.31 | 0.455 / 0.328 | -3.7 percent | 0.652 | +0.0 percent |
The whole-hash edge per joule with the class v4 shadow on the core (absolute: the chip pays its own pJ whatever the card does):
| Memory (E_mem, microjoules) | Chip E_hash N5 / N3 | vs 5090 lock 2.33 | vs 5090 stock 3.36 | vs 5080 lock 2.06 | vs M5 Max 1.40 |
|---|---|---|---|---|---|
| GDDR7 board (0.466) | 0.939 / 0.806 | 2.5x / 2.9x | 3.6x / 4.2x | 2.2x / 2.6x | 1.5x / 1.7x |
| HBM3 one stack (0.321) | 0.794 / 0.661 | 2.9x / 3.5x | 4.2x / 5.1x | 2.6x / 3.1x | 1.8x / 2.1x |
| SRAM N2 die at W = 1 (0.036) | 0.509 / 0.376 | 4.6x / 6.2x | 6.6x / 8.9x | 4.1x / 5.5x | 2.8x / 3.7x |
The same edge on the base core (the genesis-only comparator): 2.6x / 3.0x microjoules per hash
on the GDDR7 board at N5 / N3, 3.8x / 4.4x against the 5090 at its lock; the bank costs the
adversary 5 percent of its edge (0.939 against 0.890 microjoules on the GDDR7 board, 2.5x against 2.6x), which is
the whole answer to the review's question in one number: the 180-day calendar costs a chip that carries the bank
about 11 percent of its shadow energy and 43 percent of its core cells, and no epoch costs it a part.
## 5. The placed rows (8 lanes, routed, SPEF) and the 32-lane core
ROWS_PLACED
## 6. The board: joules per valid hash and USD per sustained MH/s for the complete machine
The complete machine: the memory devices at their modelled random-read energy and activate ceiling (chip-model-v3
5.3, unmeasured; the 5090 reaches 82 percent of the GDDR7 figure, the sustained fraction here), the controller and
PHY die, the core die sized to retire the hash's ops at the memory's sustained rate (lanes at 667 MHz over 5 phases;
0.002 mm^2 per lane at N5 from the 8-lane core's floorplan at 40 percent utilisation scaled x0.55, approximate; USD
0.36 per mm^2 of N5 from sram-mirror's yield model; 50 uW of leakage per lane, the synthesis figure), power delivery
(PSU 92 percent, VRM 90 percent), cooling (3 percent), a board and assembly (USD 200), and one full node per 100
machines (85 W and USD 1,500 shared: the state-derived dataset's host, priced as the review's rule 3 asks). The
"high" case takes the memory's lower ceiling (the 5090's measured 17.5 G on GDDR7; the JEDEC tFAW floor on HBM3),
the high read energy and the high SRAM term together. GPU rows: the 5090 at its lock 2.33 microjoules at 134.76
MH/s, USD 1,999 plus USD 150 of rig share (USD 15.9 per MH/s; at the USD 3,000 street price 23.4); the 5080 at its
lock 2.06 at 71.20 MH/s, USD 999 plus 150 (USD 16.1 per MH/s); the discrete-GPU cohort by count (design 3.4 and
10.4: 8 GB 22 percent, 12 GB 22, 16 GB 28, 24 GB and up 16, the rest 10 and 11 GB) at its tuned points about 3.6
microjoules (2.5 to 4.5, approximate: the 5070 and 5070 Ti 1.7 to 1.75 modelled, the 4070 3.58 measured, the 4090
3.64, the 3090 6.4, the 9070 XT 8.1 measured) and about USD 18 per MH/s (14 to 28); the M5 Max 1.40 at 27.9 MH/s is
reported in section 4, not headlined.
Node-for-node (N5), the full core at 4.61 pJ per lane-op:
core 4.61 pJ per lane-op (band 4.07 to 5.84), 102612 ops per hash, leakage 50 uW per lane, 0.002 mm^2 per lane at N5
| Memory arrangement | Case | Sustained MH/s | Machine W | microjoules per hash (whole machine) | Core lanes | Core mm^2 (N5) | Capex USD | USD per MH/s | vs 5090 lock 2.33 (J / USD) | vs 5080 lock 2.06 | vs cohort 3.6 / USD 18 |
|---|---|---|---|---|---|---|---|---|---|---|---|
| GDDR7 board, 16 devices, 64 channels (the 5090 memory without the GPU) | nominal | 136 | 175 | 1.280 | 104,960 | 210 | 661 | 4.84 | 1.8x / 3.3x | 1.6x / 3.3x | 2.8x / 3.7x |
| GDDR7 board, 16 devices, 64 channels (the 5090 memory without the GPU) | low | 136 | 154 | 1.132 | 104,960 | 210 | 661 | 4.84 | 2.1x / 3.3x | 1.8x / 3.3x | 3.2x / 3.7x |
| GDDR7 board, 16 devices, 64 channels (the 5090 memory without the GPU) | high | 112 | 180 | 1.603 | 86,235 | 172 | 647 | 5.77 | 1.5x / 2.8x | 1.3x / 2.8x | 2.2x / 3.1x |
| HBM3 one stack (activate ceiling unmeasured; JEDEC tFAW floor 2.3 G) | nominal | 71 | 77 | 1.084 | 54,656 | 109 | 704 | 9.91 | 2.1x / 1.6x | 1.9x / 1.6x | 3.3x / 1.8x |
| HBM3 one stack (activate ceiling unmeasured; JEDEC tFAW floor 2.3 G) | low | 71 | 70 | 0.984 | 54,656 | 109 | 704 | 9.91 | 2.4x / 1.6x | 2.1x / 1.6x | 3.7x / 1.8x |
| HBM3 one stack (activate ceiling unmeasured; JEDEC tFAW floor 2.3 G) | high | 15 | 34 | 2.228 | 11,748 | 23 | 673 | 44.09 | 1.0x / 0.4x | 0.9x / 0.4x | 1.6x / 0.4x |
| HBM3 eight stacks (an H100-class package) | nominal | 566 | 559 | 0.987 | 435,713 | 871 | 3,079 | 5.44 | 2.4x / 2.9x | 2.1x / 3.0x | 3.6x / 3.3x |
| HBM3 eight stacks (an H100-class package) | low | 566 | 502 | 0.886 | 435,713 | 871 | 3,079 | 5.44 | 2.6x / 2.9x | 2.3x / 3.0x | 4.1x / 3.3x |
| HBM3 eight stacks (an H100-class package) | high | 122 | 217 | 1.772 | 93,987 | 188 | 2,833 | 23.18 | 1.3x / 0.7x | 1.2x / 0.7x | 2.0x / 0.8x |
| SRAM full store, one N2 reticle, 2 GiB at W = 1 (the strongest five-year chip) | nominal | 535 | 400 | 0.747 | 411,225 | 822 | 1,211 | 2.27 | 3.1x / 7.0x | 2.8x / 7.1x | 4.8x / 7.9x |
| SRAM full store, one N2 reticle, 2 GiB at W = 1 (the strongest five-year chip) | low | 609 | 403 | 0.662 | 468,572 | 937 | 1,252 | 2.06 | 3.5x / 7.8x | 3.1x / 7.8x | 5.4x / 8.8x |
| SRAM full store, one N2 reticle, 2 GiB at W = 1 (the strongest five-year chip) | high | 419 | 394 | 0.940 | 322,466 | 645 | 1,147 | 2.74 | 2.5x / 5.8x | 2.2x / 5.9x | 3.8x / 6.6x |
Lifetime cost in USD per TH (10^12 hashes), capex spread over the life plus electricity at USD 0.08 per kWh:
| Machine | 0.5 y | 1 y | 2 y | 3 y | of which electricity |
|---|---|---|---|---|---|
| 5090 at the lock | 1.063 | 0.557 | 0.305 | 0.220 | 0.0518 |
| 5080 at the lock | 1.069 | 0.557 | 0.302 | 0.216 | 0.0458 |
| cohort card | 1.222 | 0.651 | 0.365 | 0.270 | 0.0800 |
| GDDR7 board, 16 devices, 64 channels chip | 0.335 | 0.182 | 0.105 | 0.080 | 0.0284 |
| HBM3 one stack chip | 0.653 | 0.338 | 0.181 | 0.129 | 0.0241 |
| HBM3 eight stacks chip | 0.367 | 0.194 | 0.108 | 0.079 | 0.0219 |
| SRAM full store, one N2 reticle, 2 GiB at W = 1 chip | 0.160 | 0.088 | 0.053 | 0.041 | 0.0166 |
A node ahead (N3), the same machine:
|---|---|---|---|---|---|---|---|---|---|---|---|
| GDDR7 board, 16 devices, 64 channels (the 5090 memory without the GPU) | nominal | 136 | 150 | 1.101 | 104,960 | 147 | 638 | 4.67 | 2.1x / 3.4x | 1.9x / 3.5x | 3.3x / 3.9x |
| GDDR7 board, 16 devices, 64 channels (the 5090 memory without the GPU) | low | 136 | 133 | 0.972 | 104,960 | 147 | 638 | 4.67 | 2.4x / 3.4x | 2.1x / 3.5x | 3.7x / 3.9x |
| GDDR7 board, 16 devices, 64 channels (the 5090 memory without the GPU) | high | 112 | 155 | 1.380 | 86,235 | 121 | 628 | 5.61 | 1.7x / 2.8x | 1.5x / 2.9x | 2.6x / 3.2x |
| HBM3 one stack (activate ceiling unmeasured; JEDEC tFAW floor 2.3 G) | nominal | 71 | 64 | 0.905 | 54,656 | 77 | 693 | 9.75 | 2.6x / 1.6x | 2.3x / 1.7x | 4.0x / 1.8x |
| HBM3 one stack (activate ceiling unmeasured; JEDEC tFAW floor 2.3 G) | low | 71 | 59 | 0.824 | 54,656 | 77 | 693 | 9.75 | 2.8x / 1.6x | 2.5x / 1.7x | 4.4x / 1.8x |
| HBM3 one stack (activate ceiling unmeasured; JEDEC tFAW floor 2.3 G) | high | 15 | 31 | 2.004 | 11,748 | 16 | 671 | 43.93 | 1.2x / 0.4x | 1.0x / 0.4x | 1.8x / 0.4x |
| HBM3 eight stacks (an H100-class package) | nominal | 566 | 458 | 0.808 | 435,713 | 610 | 2,985 | 5.27 | 2.9x / 3.0x | 2.5x / 3.1x | 4.5x / 3.4x |
| HBM3 eight stacks (an H100-class package) | low | 566 | 411 | 0.726 | 435,713 | 610 | 2,985 | 5.27 | 3.2x / 3.0x | 2.8x / 3.1x | 5.0x / 3.4x |
| HBM3 eight stacks (an H100-class package) | high | 122 | 189 | 1.548 | 93,987 | 132 | 2,812 | 23.02 | 1.5x / 0.7x | 1.3x / 0.7x | 2.3x / 0.8x |
| SRAM full store, one N2 reticle, 2 GiB at W = 1 (the strongest five-year chip) | nominal | 724 | 398 | 0.550 | 557,288 | 780 | 1,196 | 1.65 | 4.2x / 9.7x | 3.7x / 9.8x | 6.5x / 10.9x |
| SRAM full store, one N2 reticle, 2 GiB at W = 1 (the strongest five-year chip) | low | 828 | 402 | 0.485 | 636,578 | 891 | 1,236 | 1.49 | 4.8x / 10.7x | 4.2x / 10.8x | 7.4x / 12.1x |
Reading. (1) The complete GDDR7 machine reads 1.8x the 5090 at its lock per joule node-for-node (1.5x to 2.1x) and
2.1x a node ahead (1.7x to 2.4x); against the 5080 at its lock 1.6x (1.3x to 1.8x) and 1.9x; against the cohort
card 2.8x and 3.3x. Per dollar of capex it is 3.3x the 5090 at MSRP (4.8x at the street price) and 3.7x the cohort,
because the board carries the same USD 320 of memory and USD 76 of core silicon where the card carries a 750 mm^2
GPU. (2) The HBM3 one-stack machine is no better per joule than GDDR7 once the controller, the host and the power
train are in, and its dollars per MH/s are twice the card's at the modelled ceiling and 2.7x worse than the card at
the JEDEC tFAW floor: the "same DRAM" assumption is tested and the adversary's cheapest memory IS the card's memory,
so the GDDR7 board is the machine the economics must answer. (3) The N2 SRAM die at the hash's own width is the
strongest machine at 3.1x per joule node-for-node (2.5x to 3.5x) and 4.2x a node ahead, and 7x per dollar of
silicon, with the project cost (USD 100 M to 500 M, claimed) as its only hold. (4) Over a 3-year life the GDDR7
machine's cost per TH is 0.080 USD against the 5090's 0.220 and the cohort's 0.270 (2.7x to 3.4x); at a 1-year life
3.1x; electricity is a quarter of the machine's lifetime cost and a fifth of the card's, so the per-joule edge is
the smaller half of the economic edge and the capex per MH/s the larger. The profitability surface the review asks
for (development, fleet capital, share, margin, electricity, pre-production, discounting, residual, operator and
manufacturer apart) takes these per-TH rows as its inputs; it is the economics lane's, not this file's.
## 7. The lifetime answer: what each transition needs, and what is credited
The rule: a transition is credited only where the next entry needs a physical resource this design cannot supply
economically; firmware changes (a program, a register, a weight) are credited zero. "Performance loss" is the change in
the chip's energy per hash when the entry is live at its draw weight (4 points of 79 for a reserve family; the whole
program for an atom or a shape), from the rows of sections 3 and 4; the GPU's own change on the same draw is beside it.
| Transition (the next epoch draws it) | Physical resource it needs | Does this design hold it? | Chip loss at the draw weight | The card's change on the same draw (measured ratio) | Credited obsolescence benefit |
|---|---|---|---|---|---|
| G1 to G7 (the ARX group) at any band weight | the ALU group | yes | 0 to +3 percent of the shadow energy across the band (the unit rows 3.1 to 3.3 pJ at N5 against the draw's 4.6) | 1.00 | 0 |
| G8, G9, G6 (mul, mulhi, mad) at any band weight | the multiplier and the third read | yes | -1 to +2 percent at B = 4 (mul 2.9, mulhi 2.8, mad 5.2 pJ at N5) | mul 1.1, mulhi about 3.4 (the card's dearest ALU op) | 0 |
| G10 shfl at its cap (8 points) | the lane butterfly | yes (per core) | 0 (2.9 pJ at N5, under the draw's mean) | 4.9x the add per op | 0 (the card pays 29.4 pJ for the move the chip pays about 1) |
| R1 shfla live (4 points) | a general lane crossbar | yes (per core; the one network a butterfly cannot emulate in one op) | 0 (2.9 pJ at N5, under the draw's mean)A | 1.53 (NVIDIA), 1.91 (Apple) | 0 |
| R2 perm live | a byte selector | yes | -1.9 percent | 1.30 | 0 |
| R3 popc and clz live | a popcount tree, a priority encoder | yes | -2.5 percent | 1.50 and 1.63 | 0 |
| R4 to R7 (bfe, shl and shr, sel, andn) live | a shifter, a mask, a select, an and-not | yes | -2.1 to -1.4 percent | 0.75 to 1.54 | 0 |
| R8 mm8 live | a u8 dot4 per lane (8 chip ops per card tile) | yes | -0.8 percent (3.9 pJ per dp4a at N5, 1.0 pJ per MAC, against the card's 2.2 pJ per MAC at the lock) | the tile: 2.43 the add step per card instruction (32 MACs) | 0 (the chip's MAC is cheaper than the card's by 4x to 30x on the public figures; this is the card's loss, not the chip's) |
| the op-mix band draw (B = 4 on injecting families) | nothing: the program | yes | within the family rows above | within 11 percent per instruction (shadow-k 6.2) | 0 |
| the fold constants draw | five registers | yes | 0 | 0 | 0 |
| the block shape draw (64, 128, 256) | the program-length register; 256 words of imem | yes | -3.7 percent at 64 (the imem term; 0 at 128 and 256) | 64 ran 2.5 to 3.5 percent faster than 256 on the 5090 and the M5 Max (measured) | 0 |
| the read-width draw W = 4 (16 bytes) | three fwd instructions per load (firmware); the same DRAM sector | yes | +0.3 percent per hash (384 fold steps at 3.8 pJ) | within 2.7 percent on the 5090 and the 9070 XT, within 1 on the M5 Max (measured) | 0 |
| the 64-register window | the 64 x 256 macro per 8 lanes | yes (built in) | 0 (it is the base) | modelled: occupancy to about half on a 5090 or 4090, the rate expected to hold (the hash lane) | 0 |
| the dataset atom draw A1 / A2 / A3 (mixer x4, x8, dr368) | nothing per hash; the per-window build is a program on the same core (section 7.1) | yes | 0 per hash; the build 0.72 J per window per machine at 1 GiB (0.2 mW averaged), 1.45 J at 2 GiB | the card's rate unmoved by the atom (within 0.1 MH/s on the 5090, measured) | 0 |
| a new op family outside the 18 (a bank refresh, a release) | a unit the die lacks | no: the chip emulates it from the 18 at the vendor penalty, as the cards do (1.5x to 2.4x per op, measured on the cards) or loses its 4 points | at 4 points of 79: at most 4 / 79 x (penalty - 1) of the shadow energy, about 2 to 6 percent (modelled) | the same emulation on every card that predates the release, 0 on a card with the native op | 0 unless the family is one the 18 cannot emulate; none proposed is |
| a new read atom W = 8 (32 bytes, `admissible: false` today) | seven fwd instructions per load; the same GDDR7 sector; on an SRAM die +0.3 nJ of wire per read (floor lane 3) | yes | +0.7 percent per hash (896 fold steps) | free by the measured rows (one sector per load on NVIDIA) | 0 |
| the dataset floor step (layer 2: 5.5 / 8.5 / 11.5 GiB) | device memory: 3 to 6 GDDR7 devices more, or 3 to 6 N2 reticles on the SRAM die | yes on DRAM (USD 60 to 120 more); the SRAM die's ticket rises USD 1,000 per step | 0 per joule on DRAM; the SRAM die's USD per MH/s unmoved (every die powered) | the tuned 5090 pays 4, 8 and 10 percent more energy per hash at 2, 4 and 8 GiB (measured) | 0 per joule; a capex ticket on the SRAM die only (floor lane 3) |
Reading, before the numbers: nothing in the bank asks for a resource the design lacks, because the bank is public at
genesis and its whole op-family set is a few adders per lane and two networks per core. What the bank does to this
chip is the per-op cost of carrying the unit set (sections 3 and 5: the full core against the base core on the same
microarchitecture) and the leakage of the units that are not live, and that is the number the credit must come from.
### 7.1 The per-window dataset build on the chip (the atoms' only cost)
Under class v5 the dataset is rebuilt from the chain's state every window (3,600 s). A 1 GiB build is 157 G ops
(measured as 13.4 ms on a 5090; the record's row 7). On this core at 4.61 pJ per lane-op (N5) that is 0.72 J per
window per machine, 0.0002 W averaged over the window, against a machine of hundreds of watts: 0.0001 percent of
the machine's energy, the same for every atom within the atom's op count (x4 half of x8, dr368 about x4's). The
chip's node is the host the board model carries (one full node per 100 machines: 85 W and USD 1,500 shared); a
specialised machine with a host keeping the dataset current is inside the adversary model by the review's rule (3),
and this is its price: under 1 W and USD 15 per machine.
## 8. Energy resistance, economic resistance and response capability, stated separately
Three separate things, each with its own number and its own holder.
**Energy resistance** is a property of the memory system and the shadow, not of the calendar. Against the
adversary's re-optimised chip the complete GDDR7 machine reads 1.8x the 5090 at its lock per joule node-for-node
(1.5x to 2.1x), 2.1x a node ahead; 1.6x and 1.9x against the 5080 at its lock; 2.8x and 3.3x against the cohort
card; the N2 SRAM die 3.1x and 4.2x. The bank moves these by 5 percent in the honest side's favour (the chip's
shadow energy +11 percent for carrying 18 families instead of 10) and no more; the register window moves them by
0.03 to 0.13 of k and no more. What holds the per-joule number is the shadow's size on the card's own operating
point and the memory system's activate ceiling; what would move it is a memory arrangement the chip cannot buy, and
section 6 says there is none: the chip's cheapest memory is the card's own.
**Economic resistance** is capex per sustained MH/s and the project cost against the chain's revenue. The chip's
machine costs USD 4.84 per MH/s against the card's 16 to 18, so over a 3-year life it mines at 0.080 USD per TH
against 0.22 to 0.27: 2.7x to 3.4x, of which electricity is the smaller half. The calendar does not shorten that
life: no transition in the bank retires the chip, so the 3-year stress life holds in full and the withdrawn headline
("dies within an epoch, under 1x over its life") stays withdrawn. What holds the economics is the project (USD 20 M
to 75 M for the GDDR7-board chip, floor lane 5; USD 100 M to 500 M for the SRAM die, claimed) against the miner
revenue the chain pays, which is the profitability surface the review asks for and the economics lane owns; the
dataset floor is a ticket on the SRAM die only (USD 1,000 per step) and nothing on the DRAM board (USD 60 per step).
**Response capability** is what the bank actually buys: the chain can change its object every 180 days without a
release, and a chip that carries the bank follows by firmware at a per-transition loss of -3.7 to +0.7 percent of
its shadow energy (zero credited). A family outside the bank costs that chip an emulation penalty of 2 to 6 percent
of the shadow at 4 points, which every card that predates the release pays too; a structural change (a new read
atom, a new derivation) costs the chip a host update and the cards a release. So the bank is a response channel
whose value per event is the per-transition loss column, not a chip retirement; it is worth keeping for what it is
(no fork for a family change, a fixed-function datapath dead on day one, section 7's table) and must not be served as
energy or economic resistance.
## 9. Consequences per tier (the standing rule)
| Tier | What the rows mean for it | What is being done |
|---|---|---|
| Home miner, one 8 GB card | Against the adversary's machine the cohort card sits 2.8x to 3.3x behind per joule and 3.7x per dollar; the bank does not change that, the operating-point lock does not reach this tier (no Blackwell lever on Ampere; Ada's lock is worth 1.2x); the first dataset step (5.5 GiB) retires this card from mining | the schedule's replacement cost (USD 350 to 450 to a 16 GB card) is stated beside the step; the 24 Gb device case shows the chip pays USD 700 once for the same horizon |
| One 12 GB card | the same per joule; mines through the 8.5 GiB step, loses proving coexistence at the first step (7.3 + 8.6 GB over 12), leaves mining at 11.5 GiB | the mine-or-prove routing (0.3.21) and the replacement cost; the step offsets (section 11) |
| One 16 GB card (the 5080 at its lock, the 9070 XT) | the 5080 at its lock is the honest NVIDIA floor: 1.6x behind the chip machine node-for-node, 1.9x a node ahead; the 9070 XT 4x to 5x behind; mines through every step, loses proving coexistence at 8.5 GiB | the per-dollar edge (3.3x) is the number the project-cost wall must answer; the lock stays the one lever |
| One 24 or 32 GB card (the 5090 at its lock, the M5 Max) | 1.8x / 2.1x behind the chip machine; the M5 Max about 1.5x (reported); mines and proves through every step | nothing on the card side moves this; the rotation layers are response capability, not resistance |
| A rig | per joule its cards; per dollar 3.3x behind the chip at MSRP, 4.8x at street; over 3 years 2.7x to 3.4x per TH | the issuance trigger and the share-pattern detector (the record's item 4) stay the instruments; the profitability surface is the economics lane's |
| A pool user | a chip fleet is a few operators at 1.1 to 1.3 microjoules; the detector on the observer is what tells a pool a chip has arrived | unchanged |
| The public claim | the chip line this file supports: "a chip that survives rotation is a GPU-shaped core on the card's own memory; it reads about 1.8x the best honest card per joule on the same node, 2.1x a node ahead, and about 3x per dollar; the rotation calendar changes its firmware, not its cost" | served only on the coordinator's word, after the placed rows |
## 10. Sources and what is owed
- The GPU side: `docs/analysis/counter-asic-4-research.md` 15.1a (the 5090 microbench, 8 October 2026, measured);
the floor programme's tier table (`docs/design/class-v6-rotating-family.md` 10.4: the 5090 at the 1,300 lock 2.33
microjoules at 134.76 MH/s and 312.5 W, the 5080 at the 1,100 lock 2.06 at 71.20 MH/s and 146.6 W, stock 3.36 and
3.48, the 4070, 4090, 3090 and 9070 XT rows, the M5 Max 1.40); the reserve families' step costs, design 4.2
(measured on the cards); the card population by count, design 3.4 (approximate).
- The chip side: this lane's RTL and flow (`tools/chip-model/mf/`), ORFS on ASAP7 (Clark et al., Microelectronics
Journal 2016; the 7.5-track RVT library, TC corner), FakeRAM2.0 macros (ABKGroup, the ORFS platform's
`fakeram7_64x256` and `fakeram7_256x34`, LEF and Liberty; the generator's own config marks its values "not
realistic", so only area, pins and placement are taken from it); the k lane's rows (`floor/shadow-k.md`, the
shuffle row 1.24 pJ per lane-op routed, relayed 16:0x BST) cited as published.
- The SRAM access energy band: Horowitz, "Computing's energy problem (and what we can do about it)", ISSCC 2014
(45 nm: 8 KB SRAM 10 pJ per 64-bit read, 32 KB 20 pJ); the scaling to a 7 nm class node approximate; the k lane's
imem figure (2 to 4 pJ per 32-bit read, approximate); CACTI-class estimates (approximate).
- Node scaling (claimed): TSMC's technology pages for N5, N3E and N2, read 8 October 2026 (shadow-k section 7).
- The board: `docs/analysis/chip-model-v3.md` 5.3 and 5.5 (the GDDR7 and HBM3 random-read engines, the activate
ceilings, the static and controller allowances, the prices, all modelled or claimed; the 5090 at 82 percent of the
GDDR7 ceiling, measured); `floor/sram-and-floor.md` 2.1 (the SRAM die at W = 1, modelled); the power delivery,
cooling and host allowances are this file's (approximate; the sensitivity is stated beside each).
- The dataset build: the record's row 7 (a 1 GiB rebuild 157 G ops, 13.4 ms on a 5090, measured).
Owed: the k lane's crossbar, scratch and tile rows (in place and route at 16:0x BST); the placed 32-lane core (the
8-lane core is placed; the 32-lane row is synthesis only); a real PDK memory compiler's figure for the two macros
(FakeRAM gives area and pins only); the 64-register window's GPU cost measured (the hash lane's generator line);
the HBM3 activate ceiling (unmeasured, the AWS F2 hour); the profitability surface of the review's rule (2) over the
lifetime rows of section 6, which this file states as cost per TH and leaves the NPV to the economics lane.
## 11. The data-local and memory-sharing adversary (the ProgPoW audit's threat; the third review, 17:5x BST)
The threat: split the dataset across processors and move the intermediate computation to the processor nearest
the next item, share datasets, keep partial caches, recompute, re-lay the dataset, run several engines off one
set-up; price the cheapest combination of moving state, moving data, recomputing and local resources against the
live state of class v6, and say whether the necessary state makes data-local execution dear enough to erase any
memory-system saving. The cost model, explicit, every term labelled:
| Term | Per dependent read | Source |
|---|---|---|
| The live state a hash carries across a read | 64 registers x 32 bits = 2,048 bits (61 of 64 necessary across the chain, the review's reading of the fold rule) plus pc, nonce and era pointer about 64 bits: **about 2,100 bits** | the class program (`verify::fold_words`: every register is consumed) |
| The data a read returns, with its address and control | 32 bits of data, 32 of address, about 16 of control: **about 80 bits** at W = 1 (176 at W = 4, 304 at W = 8) | floor lane 3, section 2.1 (modelled) |
| Moving bits on one die (global wire) | 1.3 pJ per bit across a 24 mm die (0.65 to 2.6) | floor lane 3 (approximate) |
| Moving bits between dies on a package | UCIe 0.5 pJ per bit (0.25 to 0.5) | claimed (UCIe via SNIA), floor lane 3 |
| Moving bits between packages on a board | 5 to 10 pJ per bit (a PCB SerDes link; approximate, from memory) | approximate |
| A dependent random 32-byte read from GDDR7 / HBM3 | 2.0 / 1.2 nJ (1.5 to 2.6 / 1.0 to 1.5) | chip-model-v3 5.3 (modelled) |
| An on-die SRAM read at W = 1 | 0.25 nJ (0.20 to 0.35) including the wire | floor lane 3 (modelled) |
| Recomputing one item instead of reading it | 9,360 ops, about 43 nJ on this core at N5 (4.61 pJ per op) and 6.3 nJ on a wired mixer pipeline (chip-model-v3 5.2) | modelled |
| The per-window set-up (the 1 GiB build and the host) | 0.7 J per machine per window, 0.85 W and USD 15 of host per machine | section 7.1 |
The four forms, priced per read at W = 1 (the hash's own width), nominal with the band:
| Form | What moves | Cost per read | Against the baseline (data to the lane, 80 bits) |
|---|---|---|---|
| Baseline: the state stays in its lane, the data travels to it | 80 bits of data, address and control | on a die 0.10 nJ (0.05 to 0.21); on a package 0.04; the DRAM read itself 2.0 nJ beside it | 1x |
| Data-local on one die: the state travels to the macro holding the item | about 2,100 bits | 2.7 nJ (1.4 to 5.5) of wire per read: **27x the baseline's wire, and 11x the whole GDDR7 read** | 27x |
| Data-local across dies on a package (the dataset split over chiplets) | about 2,100 bits over UCIe plus the local read | 1.05 nJ (0.5 to 1.05) of hop per read: half a GDDR7 read, four SRAM reads | 26x the baseline hop |
| Data-local across packages on a board (the dataset split over boards) | about 2,100 bits over a SerDes link | 10 to 21 nJ per read: 5x to 10x a GDDR7 read | 260x |
| Memory sharing: N engines over one dataset | nothing new: the engines are the lanes in flight the baseline already has (1,172 on the GDDR7 board at the activate ceiling); the set-up is shared at 0.7 J per window | 1x | 1x |
| A partial store that recomputes the rest (the pebbling curve, chip-model-v3 5.4 with the two corrections) | a recomputed item costs 9,360 ops | 43 nJ on this core, 6.3 nJ wired, against 2.0 nJ read: **monotone, the full store is the cheapest point at every f** | 3x to 21x per recomputed item |
| A hot-item SRAM beside the DRAM (the window-layer distribution: the hottest half of the items serves 72 percent of the reads, adv-cache-2) | an SRAM read for 72 percent of the reads, a DRAM read for the rest | 0.25 x 0.72 + 2.0 x 0.28 = 0.74 nJ per read on the memory side, for USD 250 per GiB of SRAM (about half the dataset) | a capex trade bounded by the GDDR7 row above and the SRAM-die row below; no new form |
| An alternative layout (the 16 load sites and their era windows: bank the dataset by site) | nothing per read: every read is still an activate on the device that holds the item | 1x | 1x |
Reading. (1) The necessary state is the whole argument: a read returns 80 bits and the state that must meet it is
2,100, so moving the computation to the data costs 26x the bits of moving the data to the computation, on every
medium. On one die that is 2.7 nJ of wire against 0.10; on a package half a DRAM read; across boards five to ten DRAM
reads. There is no memory-system saving for data-local execution to erase: the dependent read must be served by the
device that holds the item in every form, and what the data's trip to the lane costs (0.10 nJ on a die, 0.04 on a
package) is already the cheapest term in the model. So the ProgPoW audit's threat does not apply to a hash whose
live state is 26x its read width; it applies to a hash whose state is a few words, which class v6 is not. (2)
Memory sharing is the baseline, not an attack: the chip's lanes already share one dataset and one set-up; the
per-hash share of the set-up is 10^-15 J and of the host USD 0.15 per machine. (3) Partial stores and recomputation
are priced by the pebbling curve and lose at every point; the hot-item SRAM is a capex trade between the two rows
of section 6, not a new form. (4) Cumulative memory complexity of one evaluation, stated as the bound a chip must
pay: 128 dependent random reads, each an activate and a 32-byte sector, 4 KB of sector traffic and 128 x 2,100 bits
of state carried in a lane (never moved); 256 nJ of memory energy per hash on GDDR7 (154 on HBM3, 32 on the SRAM
die) plus 0.47 microjoules of shadow on this core at N5. Bandwidth hardness: the GDDR7 board is bound by activates
(21.3 G per second over 16 devices, 166 MH/s per board) at 38 percent of its pin bandwidth (682 GB/s of sectors of
1,792), so the hard quantity is the activate rate per dollar of devices, not bytes per second, and a chip cannot buy
more activates per device than the card has. (5) Bounded by this cost model: data-local execution (26x by the bit
count, no physical design needed), memory sharing (the baseline), partial stores (monotone), layouts (per read
invariant). Needing physical design before a number is a bound: the HBM activate ceiling (unmeasured; the AWS F2
hour), the SRAM die's wire term (0.5 to 2.0 nJ per 64 bytes until a placed macro array exists), the on-package hop
(UCIe's 0.5 pJ per bit is a claim), and the data-local form on a 3D-stacked SRAM (a vertical hop at about 0.1 pJ per
bit, approximate, would cut the one-die row to about 0.2 nJ, still 2x the baseline and still no saving).
## 12. The dataset comparison that decides class v7 (the third review, 17:5x BST)
Two datasets, each with the adversary's burden (a chip with a host keeping it current) and the commodity burden
(what every honest node pays at the boundaries), priced on the record's figures:
| | State-coupled dataset (class v5 and v6: derived from the chain's execution state at the era cut) | Epoch-defined bounded dataset with a published support horizon (derived from the certified checkpoint's hash at the era cut; the size schedule published years ahead) |
|---|---|---|
| Adversary: sync bandwidth | the day stream and the leaves: 16.5 KB/s to 10,000 members, 45 MB per member per window today (the record 2a.2); grows with the state | the seed: 32 bytes per era; the schedule: a constant |
| Adversary: update cost | the rebuild 0.7 J per machine per window (0.0001 percent of its energy); the host's execution of every block (85 W, USD 1,500 per 100 machines: 0.85 W and USD 15 per machine, under 1 percent) | the rebuild only (the same 0.7 J); a light client following checkpoints (bytes, watts of nothing) |
| Adversary: storage | the state (hundreds of MB today, unbounded) on the host; the dataset on the machine | the dataset only |
| Adversary: adversarial state growth | raises the HOST's cost (storage, re-execution), never the dataset's size (the atom folds the state into a dataset of the schedule's size); the growth is paid in gas by whoever causes it | none |
| Adversary: what is excluded | the stale machine (its dataset wrong the moment its host is) and the recompute chip; not a specialised machine with a host (the review's rule 3), which pays under 1 percent | the stale machine (a chip missing the epoch flip mines a dead object, as a stale card does); the recompute chip is excluded by the pebbling curve, not by the dataset; the seed is unknown before the checkpoint, so nothing precomputes |
| Commodity: the boundaries | today's eight crossing faults were all state boundaries: the crossing, the partition, the snapshot, the cold start (the 15:42Z deep-reorg reset, the pruning-point anchor, the snapshot resumed under the next object, the stale stream); every family epoch is a state-agreement event (layer 3, section 3) | one boundary kind: the checkpoint's hash, which every node holds by the chain's own rule; no stream, no snapshot, no re-execution on the mining path |
| Commodity: re-execution per node | about 10 minutes from genesis on Devnet 3, hours on the shared devnet, and the dataset is wrong until it is done | none for mining (execution continues for the EVM, decoupled from the hash) |
| Commodity: proving coexistence | unchanged by the coupling (set by the dataset's size and the prover's 8.6 GB) | the same |
| Commodity: the cold start and the partition | a node that missed the lead serves nothing for a window; a partition's two sides derive two datasets | a node derives the dataset from any header it accepts; a partition's two sides derive the same dataset while they share the checkpoint |
The growth schedule 5.5 / 8.5 / 11.5 GiB, per step (the hash lane's VRAM rows: the dataset needs about 1.3x its size
in device memory with the working set; the tier room 75 percent of card memory, 50 percent of Apple unified; the
prover 8.6 GB beside it):
| Step | Adversary burden | Commodity burden: who leaves mining | Who loses proving coexistence | Owners' replacement cost (approximate street prices, October 2026) | The 24 Gb GDDR7 case |
|---|---|---|---|---|---|
| 5.5 GiB at the v6 epoch | GDDR7 board: 0 (16 x 2 GB holds it); SRAM die: 3 reticles, USD 1,500 of ticket | the 6 GB and 8 GB tiers (25 percent by count): about 7.3 GiB of device memory needed | the 12 GB tier (22 percent): 7.3 + 8.6 over 12; it mines or proves | an 8 GB card to a 16 GB card: USD 350 to 450 (a 16 GB 5060 Ti or 9060 XT class) | none needed |
| 8.5 GiB two years on | GDDR7 board: 0 (the 32 GB board holds it); the SRAM die 5 reticles, USD 2,500 | the 10 and 11 GB tiers (9 percent) and the 16 GB unified Mac (about 8 GiB of room): about 11 GiB needed | the 16 GB tier (28 percent): 11 + 8.6 over 16; it mines or proves | a 10 or 12 GB card to a 16 GB card: USD 350 to 450; a 16 GB Mac has no upgrade | none needed |
| 11.5 GiB at four years | GDDR7 board: 0; the SRAM die 6 reticles, USD 3,000 | the 12 GB tier (22 percent): about 15 GiB needed | the 24 GB tier mines and proves (15 + 8.6 under 24) | a 12 GB card to a 16 GB card: USD 350 to 450 | none needed |
| The 24 Gb (3 GB) GDDR7 devices (Micron ended 2 GB production, 3 GB at USD 60 to 70 each, the TrendForce note) | a 16-device board at 48 GB for USD 1,000 of memory instead of 320: the adversary over-provisions ONCE for the whole horizon, USD 9.9 per MH/s instead of 4.84, still 1.6x the card per dollar and unchanged per joule | the 50-series cards on 3 GB devices (the 5090 32 GB, the 5080 Super class at 24 GB) carry the schedule to year 4 and beyond; the schedule retires the 8 and 12 GB tiers, not the chip | | | the schedule's one effect on the chip is a USD 700 memory ticket, paid once |
Reading: the schedule is a commodity-side cost at every step (a quarter of the cards by count at 5.5 GiB, a further
third losing proving coexistence at 8.5, the 12 GB tier out at 11.5; USD 350 to 450 per displaced owner) and a chip-side
cost only on the SRAM die, and the 24 Gb device removes even the DRAM board's small ticket. The state coupling buys,
against the chip, the exclusion of a stale machine (which the epoch seed also buys) and a host at under 1 percent of
the machine's cost; it costs the honest side every state boundary the devnet has crossed this week.
The recommendation, five lines:
1. Class v7 derives the dataset from the certified checkpoint's hash at the era cut (an epoch-defined bounded
dataset), with the size schedule published at genesis as the support horizon; the execution state stays in the
headers for the EVM and leaves the hash.
2. The dataset floor schedule stays (5.5 / 8.5 / 11.5 GiB, steps offset from the family flips), served as a ticket
on an SRAM die and as a retirement of the 8 GB tier at the first step and the 12 GB tier at the third, with the
replacement cost per owner stated; the 24 Gb device is priced in as the DRAM chip's one-time USD 700.
3. The family bank and its 180-day calendar stay, served as response capability with a zero obsolescence credit
per transition (section 8), never as energy or economic resistance.
4. The chip line served is the complete machine's: 1.8x per joule node-for-node and 2.1x a node ahead on the
GDDR7 board against the Blackwell tier at its lock, 3x against the cohort, 3.3x per dollar; the hold is the
project cost against miner revenue (the profitability surface, the economics lane).
5. The data-local threat is closed by the live state (26x the bits of the read; no saving to erase) and needs no
design change; the three terms that still need physical design before they are bounds (the HBM activate
ceiling, the SRAM die's wire, the on-package hop) are named in section 11 and owed.

7
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@ -16,11 +16,12 @@ This file is the source of [igneum.network/build](https://igneum.network/build).
| | Devnet 3 | Testnet | Mainnet |
|---|---|---|---|
| Chain id | 4464 (`0x1170`) since its class v5 floor on 8 October 2026; 4463 below it | 4462 (`0x116e`) | 4461 (`0x116d`) |
| Network id | `igneum-devnet-3` | `igneum-testnet-1` | not started |
| RPC | `https://rpc.devnet.igneum.network` (a node you run serves `http://127.0.0.1:26790`) | `https://rpc.testnet.igneum.network` (answers; nothing mines there yet, so a transaction waits) | none |
| Chain id | {{rm:network.chain_id}} (`{{rm:network.chain_id_hex}}`) since its class v5 floor on 8 October 2026; 4463 below it | 4462 (`0x116e`) | 4461 (`0x116d`) |
| Network id | `{{rm:network.id}}` | `igneum-testnet-1` | not started |
| RPC | `{{rm:network.rpc}}` (a node you run serves `http://127.0.0.1:26790`) | `https://rpc.testnet.igneum.network` (answers; nothing mines there yet, so a transaction waits) | none |
| Coins | no value, resets without notice | no value, resets with notice | not started |
| Symbol, decimals | IGN, 18 | IGN, 18 | IGN, 18 |
| Machine-readable | [/release.json](/release.json): the chain id, the source commits and fingerprints, the mining class, the finality rule, the proof program ids, the fee schedule and the current version per platform, with a generated date | | |
Devnet 3 is where you build today. It is a developer network: it resets without notice and its coins have no value. Its public RPC takes the read methods, `eth_sendRawTransaction` and a wRPC websocket at `/ws`, at 20 requests a second per address. The public testnet exists, its RPC answers, and no blocks are being produced on it until it opens. Mainnet has no date. Devnet 3 answered 4463 until its class v5 floor at DAA 68,400 on 8 October 2026 and 4464 from it; read it with `eth_chainId` rather than fixing it, since a transaction signed for the wrong id is refused.

2
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@ -182,7 +182,7 @@ What a builder expects on day one, what Igneum has, and the order to build the r
| Item | Expected | Igneum has | Lacks | Order |
|---|---|---|---|---|
| EVM | Cancun, same bytecode | Cancun opcodes, precompiles 0x01 to 0x09, revm 43; chain ids 4461 / 4462 / 4463; viem 2.57 drove deploy, write, read and fee estimation through stock paths | EIP-7702, 0x0a, blobs (by design); the documented differences table of spec 7.1 must be in the developer docs | Docs: 1 |
| EVM | Cancun, same bytecode | Cancun opcodes, precompiles 0x01 to 0x09, revm 43; chain ids 4461 / 4462 / 4463 (historical: Devnet 3 answers chain id 4464 since its class v5 floor at DAA 68,400 on 8 October 2026, 4463 below it; the current id is in /release.json); viem 2.57 drove deploy, write, read and fee estimation through stock paths | EIP-7702, 0x0a, blobs (by design); the documented differences table of spec 7.1 must be in the developer docs | Docs: 1 |
| RPC | Full `eth_*`, `debug_*`, `trace_*`, subscriptions | 25 `eth_*` methods, `igneum_getTransactionStatus`, `igneum_getSegment`, `igneum_getBudgets`, `igneum_estimateGas` (both dimensions); HTTP JSON-RPC 2.0 with batches, port 26790 | `eth_getProof`, `eth_subscribe`, `debug_traceTransaction`, `trace_block`, `eth_getUncle*`, `IgneumInfo` (design 10.3 item 7); `pending`, `safe`, `finalized` all resolve to the executed tip | 2 (debug and subscribe are what Blockscout and Foundry's debugger need) |
| RPC providers | A public endpoint, then third parties | None public. The devnet is the team's three nodes and a seed | A public devnet RPC with a rate limit; chain-id registration on ethereum-lists/chains before the public testnet (design 8.1) | 3 |
| Tooling templates | Hardhat and Foundry work | Designed: templates "ship with the devnet" with the three things to tell a developer (design 8.3) | The templates themselves; a `vm.warp` note (past timestamps rejected) | 1 |

2
docs/design/execution-layer.md
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@ -461,7 +461,7 @@ Rule change, 4 October 2026 (findings F-exec-A and F-exec-B of the attack suite,
| Miner address | Low 20 bytes of the header's `vote_key_hash` (`evm::miner_evm_address`) | The body has no `miner` field yet. A miner that wants to spend its rewards passes `--vote-key-hash 0x000000000000000000000000<address>` to `igneum-miner`. After the finality branch merges, `vote_key_hash` is the hash of a BLS key, so this rule must give way to the body's `miner` field (10.4) |
| Units | 1 sompi = 1e10 wei; 1 IGN = 1e18 wei | Subsidies come from `igneum::block_subsidy` in 8-decimal sompi; the EVM is 18-decimal. The open "8 or 18 decimals" decision is unchanged; this is the fixed scaling at the bridge named there |
| Rewards | 80% of every blue block's subsidy to its miner, 20% to the proving pool escrow `0x...0220`, both credited in the segment that merges the block; reds unpaid | Design 4.4, with the pool held in a keyless account until proof records exist |
| Simnet | Devnet block rate and depths (1 BPS, k 18, mergeset 180, merge depth 3,600) with proof of work skipped; chain id 4463 shared with the devnet | A CPU test network of the devnet DAG shape |
| Simnet | Devnet block rate and depths (1 BPS, k 18, mergeset 180, merge depth 3,600) with proof of work skipped; chain id 4463 shared with the devnet (historical: Devnet 3 answers chain id 4464 since its class v5 floor at DAA 68,400 on 8 October 2026, 4463 below it; the current id is in /release.json) | A CPU test network of the devnet DAG shape |
| Mempool hold | A transaction stays in every template until a block carrying it is added to the DAG (any block, this node's or a peer's: the executor subscribes to consensus `BlockAdded`); then it is held for 30 s or until the executor removes it (executed) or offers it again (a chain block skipped it); a transaction skipped twice is dropped | Kaspa's own rule (`mining/src/manager.rs`, `handle_new_block_transactions`). Replaced the 4-second hand-out cooldown on 5 October 2026 (fork `tx-gossip`, `pool.rs IN_BLOCK_HOLD`, `service.rs listen_block_added`): the cooldown made a sender mineable 1 s in 5 and inclusion came in 50-s bursts (bench-log, 5 October 2026 afternoon); with the hold a transaction is offered to every template until a block has it |
| Reorgs | Post-segment states for the last 64 chain blocks; deeper reorgs replay from genesis | Observed depth on the test network: 1 to 3 with Poisson-paced miners. A fixed per-template hold had made the three stub miners mine in lockstep rounds, and with equal work per block the GHOSTDAG hash tie-break then kept two equal-work chains alive from genesis (flips 48 deep every few seconds); `igneum-miner --hold-ms` is exponential now |
| Block tags | `pending`, `safe` and `finalized` all resolve to the executed tip | The virtual's segment is not executed eagerly and no certified checkpoint exists on this branch; the RPC does not pretend otherwise |

2
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@ -44,7 +44,7 @@ Full-header mode (spec 10.4 item 6, the lottery verified on the phone) is not in
| Key storage | iOS Secure Enclave through the Keychain with device-only, biometric-gated access; Android Keystore with StrongBox when the device has it, else TEE-backed. The signing key for an EVM transaction is secp256k1, which the enclaves do not sign natively, so the private key is wrapped by an enclave key and unwrapped into memory only for the duration of one signature (approximate: the common pattern on both platforms) | Designed |
| Seed | BIP-39, 24 words, generated on device; shown once, confirmed by re-entering words in random positions (spec 8.5 item 1's rule for the desktop app, applied here); optional second confirmation after 24 hours | Designed |
| Derivation | BIP-44 path `m/44'/coin'/0'/0/n` with Igneum's SLIP-44 coin type; the coin type is unregistered (Open, P1 below) and the app uses Ethereum's 60 until it is, so a seed restored into any Ethereum wallet shows the same addresses | Designed, Open |
| Address | 20-byte EVM address, chain id 4461 / 4462 / 4463 (spec 7.4), EIP-155 signatures, transaction types 0, 1, 2 (design document, execution layer, 1.1) | Designed |
| Address | 20-byte EVM address, chain id 4461 / 4462 / 4463 (spec 7.4) (historical: Devnet 3 answers chain id 4464 since its class v5 floor at DAA 68,400 on 8 October 2026, 4463 below it; the current id is in /release.json), EIP-155 signatures, transaction types 0, 1, 2 (design document, execution layer, 1.1) | Designed |
| Gas | One gas limit and one price, as the node quotes them with proving gas folded in (spec 7.1, "quoted gas price"); the app shows the quote and never lets a user set a limit below the estimate | Designed |
| Status line | Every transaction shows executed, proven, locked as `igneum_getTransactionStatus` reports them, with the app's own verification state beside it: "locked" is shown only when the engine has verified the certificate that covers the block | Designed |
| Backup | None by the project. The app offers no cloud backup of the seed and refuses the platform's automatic keychain sync for the wallet entries; the user writes the words down | Designed (spec 8.5 item 3) |

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2
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@ -115,7 +115,7 @@ Implements `docs/design/execution-layer.md` D1 to D10 and section 8.2 on a 3-nod
| File (vendor/igneum-node-exec/) | What changed | Why | Risk | Upstream-merge note |
|---|---|---|---|---|
| `consensus/core/src/evm.rs` (new), `consensus/core/src/lib.rs`, `consensus/core/Cargo.toml` (sha3) | `EvmTransaction = Vec<u8>` (raw EIP-2718 bytes), `evm_tx_hash` (keccak256), `evm_chain_id` (4461 / 4462 / 4463, simnet shares the devnet id), `miner_evm_address` (low 20 bytes of `vote_key_hash`), `BLOCK_EXECUTION_GAS_LIMIT` 30 M, `MAX_EVM_BODY_BYTES` 1 MiB, the `EvmTemplateSource` trait | Design D1, D8, 8.1; the devnet rule for the `miner` address until the body carries a 20-byte field | Low | Pure addition. |
| `consensus/core/src/evm.rs` (new), `consensus/core/src/lib.rs`, `consensus/core/Cargo.toml` (sha3) | `EvmTransaction = Vec<u8>` (raw EIP-2718 bytes), `evm_tx_hash` (keccak256), `evm_chain_id` (4461 / 4462 / 4463, simnet shares the devnet id) (historical: Devnet 3 answers chain id 4464 since its class v5 floor at DAA 68,400 on 8 October 2026, 4463 below it; the current id is in /release.json), `miner_evm_address` (low 20 bytes of `vote_key_hash`), `BLOCK_EXECUTION_GAS_LIMIT` 30 M, `MAX_EVM_BODY_BYTES` 1 MiB, the `EvmTemplateSource` trait | Design D1, D8, 8.1; the devnet rule for the `miner` address until the body carries a 20-byte field | Low | Pure addition. |
| `consensus/core/src/block.rs` | `Block` and `MutableBlock` gain `evm_transactions` (`Arc<Vec<EvmTransaction>>` / `Vec<EvmTransaction>`); `Block::new` keeps its signature (empty EVM list), `with_evm_transactions`, `from_arcs_with_evm`; `MutableBlock::set_evm_transactions` recomputes the merkle root and re-finalizes the header | Design D1: EVM transactions in the body | Medium by spread: every `Block {..}` literal in the tree had to name the field (six sites) | Upstream additions of `Block` literals will fail to compile until the field is added; the compiler finds them. |
| `consensus/core/src/merkle.rs` | `calc_block_hash_merkle_root(utxo_txs, evm_txs)`: leaves are Kaspa's transaction hashes followed by keccak256 of each raw EVM transaction | Design D7: `hash_merkle_root` is reused as the body commitment and now covers the EVM transactions. With no EVM transactions the root equals Kaspa's, so no genesis hash moved | Low | Pure addition; `calc_hash_merkle_root` is untouched. |
| `consensus/src/model/stores/block_transactions.rs` | Stored body is `BlockBody(utxo_txs, evm_txs)`; `get_evm`, `insert_batch` and `insert` take both | One store, one write per body | Low | Database format changed: a node from before this branch must resync. `insert` has one more argument; upstream call sites conflict trivially. |

4
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@ -2335,6 +2335,8 @@ Evidence: `docs/design/latency-ladder.md` (the k column, the rung table at k = 0
Status: Fixed, stated; restated (7 October 2026, evening, by order of the coordinator; the chip-text rewrite e57da45a, on master at 25f38035): the served texts give the floor and the premium at the 5090's measured knee: 2.1x per joule with a core as good as a GPU lane (k = 1), 3.4x with one three times better (k about 0.33), no core below about 1.8 pJ per op in the model's range, the premium 81.8 W at the best points, Ember Tune named as how a user gets there; the ledger pin for X35 moved to the new sentence; `site/litepaper.html#chip-model` and the home line.
Status: Fixed, stated; restated (8 October 2026, afternoon, by order of main after two accepted external reviews of the class v6 close; `docs/design/class-v6-rotating-family.md` 10.0f to 10.0h): the served chip text is the third review's claim statement ("Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its security does not rely on identifying that hardware or retiring it through emergency changes.") above the review's sentence, both verbatim on the home line, the litepaper's abstract, chip section and limits item, and the miner page, with rotation named an optional improvement and no threshold as the economic headline (the coexistence model owed): "Class v6 adopts the 64-register window and retains it across every rotation. Current modelling places the strongest specialised designs assessed against the GPU tier at about 2.3x to 3.3x energy-efficiency advantage a node ahead (2.0x to 2.9x on the GPU's own node), a bracket that is approximate and provisional until the placed gated core rows land. The long-program and select-tree proposals were rejected. Economic resistance depends on development cost, deployment economics and productive hardware lifetime; family transitions receive an obsolescence benefit only where a loss of competitiveness is demonstrated; programmable multi-epoch designs are included in the assessment." Every number carries its label (the bracket about 2.3x to 3.3x a node ahead and 2.0x to 2.9x node for node, modelled, approximate and provisional, served on main's "serve the bracket now" order of 16:2x UK until the k lane's placed gated core row lands; the GPU side measured on the RTX 5080 and RTX 5090 lock rows of 8 October 2026 and the card's measured cost of the window (a rented 5090 and 4090 at stock, within 5 percent per load); the chip core synthesised on ASAP7 and scaled to N3, claimed, its memory modelled; the node column claimed scaling). The three statements (energy resistance, economic resistance, response capability) are served separate; the harness and the scoring rule are linked beside the sentence. Struck from every served page: the 2.1x and 3.4x launch line, the 5x to 9x baseline, the ladder's 2.8x row, the USD 100 M pay-back row and the k about 0.33 column; never served and not to be: the lifetime claim, the USD 300 M and 340 M lines, any chip-arrival probability, the 725d2945 sentence. The pins for X35 moved to the new sentence (`tools/ci/ledger-text-check.mjs`). Was: the 2.1x to 3.4x range at the 5090's knee, below.
### X36. The X9 described as a shipping chip
"X34 and X35 said Bitmain's Antminer X9 'ships from July 2026' and called it 'the shipping RandomX chip'. It never shipped: Bitmain opened pre-orders on 26 December 2025 for July 2026 delivery, resellers told buyers in mid-May 2026 that Bitmain had discontinued it and refunded them, no unit was delivered and none was independently benchmarked."
@ -2355,6 +2357,8 @@ Evidence: `site/index.html`; `site/litepaper.html`; `tools/ci/ledger-text-check.
Status: Fixed, stated; restated further (7 October 2026, evening, from the counter-asic-4 research file d7721ebe; on master at 25f38035): the X9's claimed ratio is against a CPU core, not a GPU lane, so the texts no longer use it as a pessimistic chip core; every served sentence says so; the pin for X36 moved.
Status: Fixed, stated; restated (8 October 2026, afternoon, with X35): the X9 appears on the served pages only as a precedent (the pre-order, the withdrawal, no benchmark) and no served sentence uses its claimed core as a chip core against the model; the Antminer X5 is served as an observed comparison, not a ceiling (the close's 10.0f); the pin for X36 moved to that phrase. Was: the k about 0.33 column carried as the X9's claimed core, below.
### X37. The class v4 energy premium is a cost the user pays, not a line in a model
"Your chip model counts joules per hash for the attacker. What does class v4 cost the miner at the wall, and can any hash-side change bring that premium to zero?"

6
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@ -2,7 +2,7 @@
Generated by `tools/ledger/export-public.mjs` from `docs/fud-ledger.md`; a gate check fails when the two drift. One row per item: the claim or criticism, its status, what was done, and the evidence. Internal identifiers, times of day and team-member names are left out on purpose; the full ledger is published with the repository.
194 items. By status: Conceded, stated 52; Fixed 31; Decided 22; Fixed on a branch, pending merge 14; Answered by design 9; Answered with evidence 6; Fixed, stated 4; Closed by rule 3; Open 3; Spec fixed 2; Answered by design, with a correction to our own text 1; Answered with evidence, stated 1; Answered by design for finality, Conceded for the lottery 1; Conceded, implemented, stated 1; Rule implemented and measured; launch month simulated 1; Answered by design, with the concession stated 1; Conceded, stated in the litepaper and the design doc 1; Answered with evidence at 1 block/s 1; Conceded, stated in the simulation report 1; Answered by design, with the dependency conceded. Update 7… 1; Conceded, stated in the litepaper, with the dial explained 1; Closed by spec 1; Conceded by decision, stated in the design doc 1; Answered by design, with the founder's edge conceded 1; Answered by design, with a metrics caveat 1; Closed by removal, 3 October 2026 1; Conceded, stated in the litepaper 1; Conceded, stated in the design doc 1; Measured on the live node line, and the overlay does NOT… 1; Conceded, stated in the simulation 1; Conceded in part, labelled, stated 1; Fixed in the node 1; Answered with evidence for the largest body the rules allow 1; Fixed in the proving code 1; Fixed in the spec 1; Rule fixed 1; Rule written 1; Fixed, logged 1; Answered with evidence for the test half 1; Fixed in the node and shipped, rule not yet activated on… 1; Simulation half run 1; Answered with evidence for all four 1; Written 1; Designed 1; Fixed and confirmed 1; Rolled out 1; Conceded by decision 1; Conceded, scheduled, stated 1; Conceded, contained by rule, stated 1; Fixed on a branch and verified locally 1; Answered with evidence and stated 1; Answered with evidence for PC 2 1; Answered by design and with evidence 1; Fixed, stated; restated 1; Fixed, stated; restated further 1; Fixed in part, finding bounded, stated 1; Open, priced 1; Fixed as a genesis lever, measurement owed 1.
194 items. By status: Conceded, stated 52; Fixed 31; Decided 22; Fixed on a branch, pending merge 14; Answered by design 9; Answered with evidence 6; Fixed, stated 4; Closed by rule 3; Open 3; Spec fixed 2; Fixed, stated; restated 2; Answered by design, with a correction to our own text 1; Answered with evidence, stated 1; Answered by design for finality, Conceded for the lottery 1; Conceded, implemented, stated 1; Rule implemented and measured; launch month simulated 1; Answered by design, with the concession stated 1; Conceded, stated in the litepaper and the design doc 1; Answered with evidence at 1 block/s 1; Conceded, stated in the simulation report 1; Answered by design, with the dependency conceded. Update 7… 1; Conceded, stated in the litepaper, with the dial explained 1; Closed by spec 1; Conceded by decision, stated in the design doc 1; Answered by design, with the founder's edge conceded 1; Answered by design, with a metrics caveat 1; Closed by removal, 3 October 2026 1; Conceded, stated in the litepaper 1; Conceded, stated in the design doc 1; Measured on the live node line, and the overlay does NOT… 1; Conceded, stated in the simulation 1; Conceded in part, labelled, stated 1; Fixed in the node 1; Answered with evidence for the largest body the rules allow 1; Fixed in the proving code 1; Fixed in the spec 1; Rule fixed 1; Rule written 1; Fixed, logged 1; Answered with evidence for the test half 1; Fixed in the node and shipped, rule not yet activated on… 1; Simulation half run 1; Answered with evidence for all four 1; Written 1; Designed 1; Fixed and confirmed 1; Rolled out 1; Conceded by decision 1; Conceded, scheduled, stated 1; Conceded, contained by rule, stated 1; Fixed on a branch and verified locally 1; Answered with evidence and stated 1; Answered with evidence for PC 2 1; Answered by design and with evidence 1; Fixed in part, finding bounded, stated 1; Open, priced 1; Fixed as a genesis lever, measurement owed 1.
| Id | Claim or criticism | Status | What was done | Evidence |
|---|---|---|---|---|
@ -186,8 +186,8 @@ Generated by `tools/ledger/export-public.mjs` from `docs/fud-ledger.md`; a gate
| X32 | The roadmap carried calendar months beside a testnet that is weeks away | Fixed, stated | Every calendar month is out of the roadmap. | [site/litepaper.html](../site/litepaper.html) |
| X33 | The public benchmark dated "January 2027" | Fixed, stated | Both sentences read "The public benchmark with a leaderboard ships with the public testnet." (`site/litepaper.html`, For miners and Questions miners ask). | [site/litepaper.html](../site/litepaper.html) |
| X34 | RandomX described as chip-free | Fixed, stated | Four sentences corrected, each with the X9 as the stated fact and its date; every sentence that only names the technique stands. | [site/index.html](../site/index.html) |
| X35 | The class v4 chip headline stated as one number, 2.1x | Fixed, stated; restated | The served texts give the floor and the premium at the 5090's measured knee: 2.1x per joule with a core as good as a the team (k = 1), 3.4x with one three times better (k about 0.33), no core below about 1.8 pJ per op… | [docs/design/latency-ladder.md](../docs/design/latency-ladder.md) |
| X36 | The X9 described as a shipping chip | Fixed, stated; restated further | The X9's claimed ratio is against a CPU core, not a the team, so the texts no longer use it as a pessimistic chip core; every served sentence says so; the pin for X36 moved. | [site/index.html](../site/index.html) |
| X35 | The class v4 chip headline stated as one number, 2.1x | Fixed, stated; restated | The served chip text is the third review's claim statement ("Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its… | [docs/design/latency-ladder.md](../docs/design/latency-ladder.md) |
| X36 | The X9 described as a shipping chip | Fixed, stated; restated | The X9 appears on the served pages only as a precedent (the pre-order, the withdrawal, no benchmark) and no served sentence uses its claimed core as a chip core against the model; the Antminer X5 is served as an… | [site/index.html](../site/index.html) |
| X37 | The class v4 energy premium is a cost the user pays, not a line in a model | Answered with evidence | Measured on the RTX 5090, 145 W of premium unlocked and 82 W at the knee; the RTX 5080 at stock 84 W, its grid running; the team identity says the premium needed for 2x at k = 1 is 103 W at the lock and a premium of… | [docs/plans/counter-asic-3-status.md](../docs/plans/counter-asic-3-status.md) |
| N1 | A 0.3.15 node on the live file wrote blocks every 0.3.14 node rejected | Fixed | The class v4 signal (PROPOSED, `docs/plans/counter-asic-3-node.md` section 6) is the producer's object version in the high byte of the header version; the first 0.3.15 build stamped it from the binary alone, so on the… | [infra/fast-time/node-compat.mjs](../infra/fast-time/node-compat.mjs) |
| N2 | Any peer could crash any pruned node with a sync request below its retention | Fixed | `SyncManager::antipast_hashes_between` (the IBD headers path, `RequestHeaders`) unwrapped the GHOSTDAG reads of the requested low block and of every chain block of the walk; a pruned node holds no GHOSTDAG data below… | unit test `a_sync_request_below_retention_is_an_error_not_a_panic` (a chain of six headers, the genesis's GHOSTDAG… |

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@ -28,7 +28,7 @@ Blockscout indexes through standard JSON-RPC. Its documented requirements (docs.
Cost of one instance on Hetzner (the price list the seeds are on, `docs/plans/seed-nodes.md`: cx23 2 vCPU 4 GB at USD 6.49 net a month; larger types not priced here): Blockscout's own AWS example is 4 vCPU 16 GB plus a 2 vCPU 8 GB database. The matching Hetzner shape is one box in the 8 GB to 16 GB class plus Postgres on the same box for a devnet, a second box for the database when the chain carries real traffic. Price it from the Hetzner API when the box is ordered; the figure here is approximate: USD 15 to 40 a month for the single box, under USD 80 for two. Plus an Igneum node on the same box or next to it (Blockscout wants a local, unlimited RPC; the public `rpc.testnet.igneum.network` is rate limited to 20 req/s, `docs/plans/testnet-go.md`).
What it costs in work, in hours not weeks: the two missing `eth_` methods (small, same shape as their by-number siblings); a decision on tracing (the `debug_` namespace with revm inspectors, design 8.2, is the larger piece and is not needed to run Blockscout without internal transactions); Blockscout's env file and a Docker compose on the box; the chain's entry in its config (chain id 4463 devnet, 4462 testnet, 4461 mainnet, design 8.1); contract verification through Sourcify or Blockscout's own verifier microservice.
What it costs in work, in hours not weeks: the two missing `eth_` methods (small, same shape as their by-number siblings); a decision on tracing (the `debug_` namespace with revm inspectors, design 8.2, is the larger piece and is not needed to run Blockscout without internal transactions); Blockscout's env file and a Docker compose on the box; the chain's entry in its config (chain id 4463 devnet, 4462 testnet, 4461 mainnet (historical: Devnet 3 answers chain id 4464 since its class v5 floor at DAA 68,400 on 8 October 2026, 4463 below it; the current id is in /release.json), design 8.1); contract verification through Sourcify or Blockscout's own verifier microservice.
## 3. What Igneum needs that must be ours

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# The paid pilot: one external customer's exact workload, with repeat paid jobs
Pin: Igneum 2.0, "Architecture and product", the proving business ladder, step two. Written 8 October 2026, 16:5x BST, from the code and the landed measurements; nothing here assumes demand. The external proving market is unbuilt and stays out of every revenue assumption until a customer has paid for repeat jobs. Prices quoted from public sources carry their URL; where a market publishes no price the cell says "no public price". Chip percentages are not published.
## 1. The customer profile that fits the fleet's demonstrated edge
What the pipeline proves today, from the code:
- One program only. The host embeds two guests and refuses to run with any other: the shard program (program id 0x2b1a81cb..., 2,832,504 bytes) and the aggregator (0x474678f3...), both pinned in `proving/igneum-prove/elf/manifest.json` (SP1 crate 6.8.1, circuit v6.1.0) and checked at every start (`proving/igneum-prove/host/src/pinned.rs`, `include_bytes!` of the committed ELFs and verifying keys). The shard program is the Igneum chain's own EVM block transition: a range of transactions over a state witness, with rewards, the proving-pool credit and payouts applied by shard 0 (`proving/igneum-prove/core/src/shard.rs`, `ShardInput`, `shard_statement`). There is no path for an outside program.
- Inputs are a block fixture cut from a node's `igneum_exportSegments` dump by `igneum-prove-export` (`proving/igneum-prove/export/src/main.rs`); the plan cuts shards at the consensus proving budget `S_p`.
- Proof stages: execute, core, compressed; the aggregator folds shard proofs by recursion into one block proof and chains it to the previous segment's (`proving/igneum-prove/core/src/agg.rs`; `--mode chain`, `aggregate`, `verify-segment` in the host). The on-chain wrap (Groth16 or Plonk over bn254) is a trait method that returns an error and is not run (`proving/igneum-prove/host/src/proof_system.rs`).
- Verification: SP1's light verifier with the pinned verifying key (`--mode verify`); the node re-executes every carried record natively and drops a record whose result differs (litepaper, "How a block gets proven").
- The job loop is the chain's own: every 10 s the app asks its node for shards assigned to its vote keys (`igneum_getAssignedShards`), exports, cuts, proves `--mode compressed`, signs and submits (`igneum_submitProofRecord`) (`app/igneum-app/src/prover.rs`). No job enters from outside.
- Hardware, measured: NVIDIA only (SP1's CUDA prover is Linux x86_64; Windows runs it in WSL2). The fixed 4,717,439-cycle shard (`proving/fixtures/fees-v1-shards2.json`, shard 0) proves compressed on the patched server at threshold 2^26 in 13.2 s on an RTX 3060 12 GB (7,525 MiB peak) and 8.2 s on an RTX 4060 8 GB (7,532 MiB), 6.3 s on an RTX 4090 and a 5090 (8.0 GB) (`docs/analysis/prover-tiers-real-cards.md`, 6 October; the 8 and 12 GB rows re-measured 8 October, v6-coexist). At the 5.5 GiB dataset floor an 8 GB or 12 GB card cannot hold the miner and the prover at once (13.6 GB together) and time-shares them; 24 GB and 32 GB cards hold both.
- Proof delivery on the devnet today: shards assigned by sortition to eight provers for a 10 s exclusive window, then open to anyone; no bond, no deadline beyond the record window of 600 chain blocks (`docs/spec/07-execution.md` 7.2, 7.7).
The profile that fits that edge, stated as constraints rather than a market claim:
1. The workload is an SP1 program (the one well-tested backend; a second backend only where justified, never interchangeable). Programs for other zkVMs are out of the pilot.
2. The job is sized in the fleet's proven range: shards of a few million cycles each, proved compressed in seconds to tens of seconds on one consumer card, and aggregated by recursion. A job that needs one proof of hundreds of millions of cycles on one card inside a wall-clock bound of seconds does not fit a consumer fleet.
3. Delivery is minutes, not seconds. A customer whose product needs a proof under 10 s of a large block (Ethereum real-time proving) needs a cluster; the fleet's edge is many independent cards on domestic power, so the fit is throughput with latency in minutes.
4. The customer verifies the proof on its own chain with its own verifier, under a program id it pins. Igneum delivers a compressed proof (or the customer's own aggregation of ours); the final wrap for an EVM verifier is either run by the customer's existing pipeline or is the first item the pilot builds (section 4).
5. The customer pays on its own chain in its own currency (the launch rule of `docs/spec/05-fees-and-economics.md` 5.4; route 4 of `docs/commercial/prover-customer-brief.md`). Settlement in IGN waits for the proof bridge.
6. Repeat is intrinsic: the customer has a steady stream of the same program with new inputs (blocks, batches, light-client updates), so "repeat paid jobs" is the normal shape of their demand, not a favour.
## 2. Three candidate customer classes, ranked
The founder's word on who is "no idea who". These are classes with one named example each, chosen for fit to the constraints above, not for known interest. Every example is from public sources as of 8 October 2026 and has not been contacted. Nothing here claims demand.
| Rank | Class | Named example | Why they would pay | What they pay today |
|---|---|---|---|---|
| 1 | OP Stack rollups proving with OP Succinct (SP1 range proofs of their own blocks, aggregated and wrapped for L1) | Celo mainnet (OP Succinct Lite on SP1 Hypercube since 26 May 2026, per the Celo forum: https://forum.celo.org/t/op-succinct-sp1-hypercube-upgrade-live-on-celo-mainnet/13349); Mantle is the other named production user (https://blog.succinct.xyz/succinct-2025-recap/) | Their workload is the closest thing to ours that exists: SP1, EVM block execution, shard-sized range proofs, compressed then aggregated, with latency in minutes. A second supplier is a liveness and price story for a chain that depends on one prover network. | No fixed public price. Succinct's network sells by reverse auction in PROVE per PGU plus a dynamic base fee, no published rate (https://docs.succinct.xyz/docs/protocol/spn/auction). Succinct's own figure for OP Succinct: average proving cost 0.5 to 1 cent per transaction (https://blog.succinct.xyz/op-succinct/). A community estimate used for budgeting is USD 1.50 per billion PGU (https://hackmd.io/@damian666/rkqyehOOge); treat as an assumption, not a rate. |
| 2 | SP1 light-client bridges (sync-committee and storage proofs on a fixed program, one job per update, on a timetable) | Gnosis OmniBridge on SP1 Helios (Succinct reports more than USD 40 million TVL and USD 1.5 billion of stablecoin flow verified by its consensus proofs: https://blog.succinct.xyz/succinct-2025-recap/); IBC Eureka connects 120 Cosmos chains the same way | A fixed program, small inputs, a clock (every sync period or every update), tolerance for delivery in minutes: the exact "repeat paid jobs" shape, and a customer that cares more about a proof arriving every period from independent operators than about raw speed. | No public price per update. Paid through the Succinct network's auction (above); no per-proof rate is published. |
| 3 | Ethereum L1 block proving for the Ethereum Foundation's zkEVM programme (optional execution proofs today, mandatory later) | The ethproofs.org provers: ZisK on 8 x RTX 5090 and Axiom OpenVM 2.1 on 16 x 5090 (https://ethproofs.org/) | The programme is the largest standing demand for SP1-class proofs and it is public and measured. The buyer class (staking operators, client teams, the Foundation) would pay for proofs from independent operators once proofs are mandatory. | Cost, not price: USD 0.0057 (ZisK, 8 x 5090) and USD 0.0068 (Axiom, 16 x 5090) per block on ethproofs.org; no one pays per proof today (provers are funded, not paid per block). Ranked third because the real-time target (10 s per block on a rig under USD 100,000) is a cluster workload, not a consumer-card one; the fleet fits only the non-real-time tier. |
Taiko, the first proving customer named in `CLAUDE.md` (a based rollup whose multi-proof design accepts SP1 proofs, per `docs/commercial/prover-customer-brief.md`, approximate), belongs to class 1 and stays a candidate inside it; Celo is the named example because its OP Succinct deployment is the exact SP1 range-program shape the pilot pins, on the public record.
Not ranked, noted for the record: Kaspa's EVM layers (Igra, Kasplex) share the node lineage and a miner community (`docs/commercial/prover-customer-brief.md`), but neither publishes an SP1 workload today, so there is no exact workload to pin.
## 3. The pilot shape
One workload, one program id, one price, one clock. Everything below is the proposal the outreach brief carries; the numbers are ours to change before signature and are not a market claim.
| Item | The pilot |
|---|---|
| Workload | The customer's SP1 range program as deployed (rank 1: the OP Succinct range program; rank 2: the SP1 Helios update program). One program, one version, for the whole pilot. |
| Program identity | The customer's verifying key hash (the SP1 `vk` hash their on-chain verifier pins), recorded in the job and checked by the prover before any work (the same rule as `pinned.rs`: setup must derive the pinned id or the job is refused). A version change is a new pilot. |
| Inputs | The customer supplies the SP1 stdin blob per job (for a range proof: the L1 head, the L2 block range and the witness their own tooling produces); Igneum does not reconstruct inputs for a foreign chain. Inputs are content-addressed (sha256 in the job) so a re-run is reproducible. |
| Output | A compressed SP1 proof of that program over those inputs, plus the public values, returned to the address and endpoint the customer names. The customer's own pipeline aggregates and wraps for L1 as it does today; a wrap by Igneum is a phase-two item (section 4). |
| Verification rule | The customer verifies every proof with SP1's verifier against the pinned vk before it is counted; a proof that fails verification is not a delivered job and is not paid. Igneum keeps the same check on its side before sending (`--mode verify` generalised to the customer's vk). |
| Delivery time | 30 minutes from job receipt to proof returned, measured on the customer's clock. Reasoning: a range of OP Stack blocks is a few shards of our measured size (seconds each on one card) plus queueing across independent operators; minutes is the honest unit for a fleet, and 30 minutes leaves room for a reassignment after one failed card. |
| Price per job | Cost-based, quoted per billion cycles of the program's execution, with a floor per job. From the measured rows: a 4060 proves 4.7 M cycles in 8.2 s at 115 W, so one billion cycles is about 29 minutes of card time, about 0.06 kWh (USD 0.01 at USD 0.15 per kWh) plus about USD 0.005 of card amortisation (USD 300 over three years); a 5090 does the same in about 22 minutes at 330 W (USD 0.018 of power, USD 0.035 of amortisation). Pilot quote: USD 0.25 per billion cycles, minimum USD 2 per job, so the operator's margin is several times its cost on every card tier and the quote sits well under the USD 1.50 per billion PGU budgeting figure the SP1 community uses. Priced in dollars, paid on the customer's chain (route 4), never a fixed number after the pilot: the launch rule prices a job at or above the subsidy the card forgoes, which moves with network hash. |
| Repeat cadence | One job per hour for rank 1 (a range proof an hour is a small slice of a chain's stream and leaves their existing supplier in place); one job per update for rank 2 (about one per sync period). |
| Pass condition | 500 paid jobs over 4 weeks, at least 99 percent delivered inside 30 minutes and every one verified by the customer, paid at the quoted rate with no job disputed. Reasoning: four weeks crosses more than 600 hourly program epochs and the operators' own churn, so a pass is not one good week; 500 jobs resolve the on-time rate to a fifth of a percent and are enough for the per-card cost table to be read back against real power bills; "paid" means money moved on the customer's chain for every counted job, so a subsidised or waived job does not count. Fewer than 500 paid jobs, or any week under 99 percent, is a fail, published either way. |
## 4. What the pipeline is missing to serve it
Checklist from the code, each item with the file or crate it touches. Nothing below is built; the first three are the gate for accepting a single job.
- [ ] External program identity. The host accepts only the embedded guests (`proving/igneum-prove/host/src/pinned.rs`; `proving/igneum-prove/elf/manifest.json`). Needed: a permitted-programs registry (program id, vk hash, SP1 circuit version) that the host loads for a job, with the same "setup must derive the pinned id" refusal; the protocol pins the list (Igneum 2.0 pin: program identities and verifier versions pinned in the protocol).
- [ ] Generic inputs. The fixture path is Igneum's block fixture (`proving/igneum-prove/export/src/main.rs`, `proving/igneum-prove/core/src/fixture.rs`). Needed: a job input blob (SP1 stdin bytes, content-addressed) fed to `prove_shard` in `proving/igneum-prove/host/src/proof_system.rs` without the shard statement wrapper.
- [ ] Verification against the customer's vk. `--mode verify` uses the pinned key (`host/src/main.rs`). Needed: verify with the job's vk before sending.
- [ ] Job intake. The only job source is the chain's shard assignment (`igneum_getAssignedShards`, `igneum_exportSegments`, `igneum_submitProofRecord`, consumed by `app/igneum-app/src/prover.rs`). Needed: a job object (program id, input hash, deadline, price, payout address, customer endpoint), an intake endpoint in the node's proof pool (the node repository, `igneum-node`), and a second branch in the app's prover loop that takes a customer job when no chain shard is assigned (spec 7.2's sortition stays untouched: external jobs never pre-empt the chain's own proofs).
- [ ] Aggregation and wrap. The aggregator guest is Igneum's segment statement (`proving/igneum-prove/core/src/agg.rs`, `aggregator/src/main.rs`); `wrap` is unimplemented (`proof_system.rs`). For the pilot the customer aggregates and wraps; phase two is a generic aggregation program and the bn254 wrap, so Igneum can deliver an on-chain-verifiable proof.
- [ ] Payment. Route 4 (customer chain, payout contract keyed by miner address) is "Designed" with no code (`docs/spec/05-fees-and-economics.md` 5.4; `docs/commercial/prover-customer-brief.md` route 4); `pool/src/payout.rs` pays IGN inside Igneum's pool only. Needed: the payout contract on the customer's chain, the job-to-payout record, and a receipt the app shows; settlement in IGN waits for the proof bridge (spec 7.3) and is out of the pilot.
- [ ] SLA. The chain has a 10 s exclusive window and open claiming with no bond and no job deadline (`docs/spec/07-execution.md` 7.2, items 3 and 4); the brief's bond and timeout are open (O-5.6). Needed for a customer: a deadline on the job, a reassignment rule when the first operator misses it, a retry budget, and a delivered-on-time log that produces the pass condition's numbers (the app's `/api/state` tile and the node's `igneum_getProvingStatus` are where the counters live today).
- [ ] Memory profile shipped. The patched `sp1-gpu-server` that fits 8 and 12 GB cards (threshold 2^26) is a served artefact, not in the shipped app (litepaper, "Proving"); the served sm_89 tarball still carries the stock server in `home/.sp1/bin` (found 8 October, with the floor lane). Needed: the patched server in the app payload for every tier, and the time-sharing rule for 8 and 12 GB cards (mine or prove, never both at the dataset floor).
- [ ] Reporting. A per-job record (program id, input hash, cycles, card, seconds, verified, paid) kept by the operator and summarised for the customer; today's RESULT lines go to a log only (`host/src/main.rs`).
## 5. Outreach brief (one page, served text rules: no founder name, UK English)
**Igneum proving pilot**
A GPU-secured network for Ethereum-compatible applications and verifiable computation.
Igneum is a proof-of-work network mined on consumer graphics cards, where the NVIDIA cards that secure the chain also prove its blocks with SP1 and can prove yours. We are looking for one customer with one exact workload for a paid pilot.
What we have measured. The chain's own block shards (about 4.7 million cycles each) prove compressed in 8 to 13 seconds on 8 GB and 12 GB cards and in 6 seconds on 24 GB and 32 GB cards, on rented hardware from eleven card models, with every proof verified. Shard proofs are aggregated by recursion into one proof per block. Proving runs on NVIDIA cards; AMD and Apple cards mine. Proven execution is not finality, EVM compatibility is not Ethereum security, and zero-knowledge proofs are not privacy.
What the pilot is. One SP1 program of yours, one version, pinned by its verifying key. You send inputs per job; we return a compressed proof you verify with SP1's verifier against that key before it counts. Delivery inside 30 minutes of receipt. One job an hour, or one per update, for four weeks. A proof that fails your verifier is not a delivered job and is not paid.
What it costs. A pilot quote of USD 0.25 per billion cycles of your program, minimum USD 2 per job, paid in your currency on your chain to a payout contract keyed by the operator who delivered. The quote is built from measured power and card cost on the fleet and is stated plainly so you can compare it with what you pay now.
What we ask of you. The program and verifying key as deployed; at least 100 historical inputs with expected public values so our provers and your verifier agree before any job carries value; the deadline and the maximum cycles per job; the address that receives proofs; and a published pass or fail at the end: 500 paid jobs over four weeks, 99 percent inside the deadline.
What we do not claim. The external proving market is not yet built and is not in our revenue assumptions. Your pilot would be the first external workload on the network; the job intake, payment contract and delivery log are built for it and published with their measurements. Nothing in this brief is an offer to sell a token.
Contact: through the repository and the site's team page.

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| BLS12-381 | Curve by Barreto, Lynn and Scott; blst by Supranational. Licence approximate: Apache-2.0. https://github.com/supranational/blst (not yet cloned) | Unchanged, credited. The header carries the BLAKE2b hash of a G1 compressed public key (48 bytes); every voter signs every 30-s checkpoint; signatures aggregate | Finality rule v2 needs one aggregate signature per checkpoint from thousands of keys | Spec section 3.1 (W1) and 2.4; `sim/results_v2.md` for the rule itself. Signature cost not yet measured |
| Hashing in the node | rusty-kaspa `crypto/hashes`, ISC, verified. Crates linked by the fork, licences read from the local cargo registry: blake2b_simd 1.0.2 (MIT), blake3 1.8.3 (CC0-1.0 or Apache-2.0), sha2 0.10.8 (MIT or Apache-2.0), keccak 0.1.6 (Apache-2.0 or MIT); sha3 0.10.8 not in the local registry, approximate: MIT or Apache-2.0 | Unchanged, credited. BLAKE2b with domain separation for block, transaction and PoW pre-hashes (`BlockHash`, `TransactionHash`, ...), BLAKE3 keyed for the sequencing-commitment and payload hashers, SHA-256 for ECDSA signing hashes, cSHAKE256 (Keccak) in the kHeavyHash stub that stays as the default engine and for pruning-proof block levels | The chain's hash for everything except the lottery is the one the forked commit uses (spec 0.6), so nothing unverified enters consensus | `hash_override_nonce_time` gained one field (fork-divergence row 1); every header-hash test vector was regenerated and the four genesis hashes re-derived |
| Address format | Bitcoin BIP 173 character set (bech32, Pieter Wuille and Greg Maxwell; BIP licence approximate: BSD-2-Clause) with the CashAddr polymod checksum of Bitcoin Cash (the source cites bch.info), as implemented in rusty-kaspa `crypto/addresses/src/bech32.rs`, ISC, verified | Prefixes only: `igneum`, `igneumtest`, `igneumsim`, `igneumdev` (Kaspa: `kaspa`, `kaspatest`, `kaspasim`, `kaspadev`). The script public key behind an address is unchanged | No Igneum address string may parse as a Kaspa address on any network | Fork-divergence row 9; test vectors in `addresses` and `txscript` regenerated and passing |
| The EVM | Ethereum (Yellow Paper and ethereum/execution-specs, CC0 approximate). Cancun opcode set, precompiles 0x01 to 0x09 | Semantics on a DAG: `block.number` is selected-chain height, `block.timestamp` is non-decreasing by a max rule, `prevrandao` is the VDF epoch seed, chain ids 4461, 4462, 4463; 0x0a absent; gas has a second dimension | Blocks on a DAG have no single parent and no header state root; proving cost is a second resource; the random beacon must be unbiasable | Spec section 7.1 (normative table); devnet measurement R9 for timestamp drift; `ethereum/tests` replay in the differential plan |
| The EVM | Ethereum (Yellow Paper and ethereum/execution-specs, CC0 approximate). Cancun opcode set, precompiles 0x01 to 0x09 | Semantics on a DAG: `block.number` is selected-chain height, `block.timestamp` is non-decreasing by a max rule, `prevrandao` is the VDF epoch seed, chain ids 4461, 4462, 4463 (historical: Devnet 3 answers chain id 4464 since its class v5 floor at DAA 68,400 on 8 October 2026, 4463 below it; the current id is in /release.json); 0x0a absent; gas has a second dimension | Blocks on a DAG have no single parent and no header state root; proving cost is a second resource; the random beacon must be unbiasable | Spec section 7.1 (normative table); devnet measurement R9 for timestamp drift; `ethereum/tests` replay in the differential plan |
| kHeavyHash (kept as a stub) | Kaspa, rusty-kaspa `crypto/hashes/src/pow_hashers.rs` and `consensus/pow/src/matrix.rs`, ISC, verified | Kept untouched as `HeavyHashEngine`, the default engine when the `igneum-pow` feature is off, and the block-level source for pruning proofs until seeds are threaded through | Lets the devnet run and lets upstream pow changes merge cleanly | Fork-divergence rows 14 and 15; open item in the same file (pruning-proof block levels) |
## What is new in Igneum

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| Parameter | Value | Label |
|---|---|---|
| Chain id | 4461 / 4462 / 4463 (mainnet / testnet / devnet) | Designed |
| Chain id | 4461 / 4462 / 4463 (mainnet / testnet / the shared devnet); Devnet 3 answers 4464 since its class v5 floor at DAA 68,400 (8 October 2026) and 4463 below it, the id a function of the block's DAA score | Designed; the Devnet 3 value measured (the current id is in /release.json) |
| BLOCKHASH reach | 256 chain blocks | Designed (Ethereum's) |
| PREVRANDAO source | 10-minute epoch VDF output, keccak256 with the chain height | Designed |
| Opcode set, precompiles | Cancun; 0x01 to 0x09 | Designed |

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<p><strong>The EVM you already know.</strong> Solidity deploys unchanged. Standard JSON-RPC, EIP-1559 transactions, the chain id in the signature, <code>cancun</code> as the EVM version. Gas has two dimensions on Igneum, execution and proving, and the node folds the second into the price it quotes, so <code>eth_estimateGas</code> and <code>eth_gasPrice</code> work as they do on Ethereum.</p>
</section>
<section class="doc-section"><h2 id="networks">Networks</h2>
<div class="tbl"><table><thead><tr><th></th><th>Devnet 3</th><th>Testnet</th><th>Mainnet</th></tr></thead><tbody><tr><td>Chain id</td><td>4464 (<code>0x1170</code>) since its class v5 floor on 8 October 2026; 4463 below it</td><td>4462 (<code>0x116e</code>)</td><td>4461 (<code>0x116d</code>)</td></tr><tr><td>Network id</td><td><code>igneum-devnet-3</code></td><td><code>igneum-testnet-1</code></td><td>not started</td></tr><tr><td>RPC</td><td><code>https://rpc.devnet.igneum.network</code> (a node you run serves <code>http://127.0.0.1:26790</code>)</td><td><code>https://rpc.testnet.igneum.network</code> (answers; nothing mines there yet, so a transaction waits)</td><td>none</td></tr><tr><td>Coins</td><td>no value, resets without notice</td><td>no value, resets with notice</td><td>not started</td></tr><tr><td>Symbol, decimals</td><td>IGN, 18</td><td>IGN, 18</td><td>IGN, 18</td></tr></tbody></table></div>
<div class="tbl"><table><thead><tr><th></th><th>Devnet 3</th><th>Testnet</th><th>Mainnet</th></tr></thead><tbody><tr><td>Chain id</td><td><span data-rm="network.chain_id">4464</span> (<code><span data-rm="network.chain_id_hex">0x1170</span></code>) since its class v5 floor on 8 October 2026; 4463 below it</td><td>4462 (<code>0x116e</code>)</td><td>4461 (<code>0x116d</code>)</td></tr><tr><td>Network id</td><td><code><span data-rm="network.id">igneum-devnet-3</span></code></td><td><code>igneum-testnet-1</code></td><td>not started</td></tr><tr><td>RPC</td><td><code><span data-rm="network.rpc">https://rpc.devnet.igneum.network</span></code> (a node you run serves <code>http://127.0.0.1:26790</code>)</td><td><code>https://rpc.testnet.igneum.network</code> (answers; nothing mines there yet, so a transaction waits)</td><td>none</td></tr><tr><td>Coins</td><td>no value, resets without notice</td><td>no value, resets with notice</td><td>not started</td></tr><tr><td>Symbol, decimals</td><td>IGN, 18</td><td>IGN, 18</td><td>IGN, 18</td></tr><tr><td>Machine-readable</td><td><a href="/release.json">/release.json</a>: the chain id, the source commits and fingerprints, the mining class, the finality rule, the proof program ids, the fee schedule and the current version per platform, with a generated date</td><td></td><td></td></tr></tbody></table></div>
<p>Devnet 3 is where you build today. It is a developer network: it resets without notice and its coins have no value. Its public RPC takes the read methods, <code>eth_sendRawTransaction</code> and a wRPC websocket at <code>/ws</code>, at 20 requests a second per address. The public testnet exists, its RPC answers, and no blocks are being produced on it until it opens. Mainnet has no date. Devnet 3 answered 4463 until its class v5 floor at DAA 68,400 on 8 October 2026 and 4464 from it; read it with <code>eth_chainId</code> rather than fixing it, since a transaction signed for the wrong id is refused.</p>
</section>
<section class="doc-section"><h2 id="endpoints-and-tools">Endpoints and tools</h2>

47
site/build.mjs
View file

@ -125,11 +125,27 @@ ${shareHtml(path, title, desc)}
<link rel="apple-touch-icon" href="/apple-touch-icon.png" sizes="180x180">
<link rel="manifest" href="/site.webmanifest">`;
}
// The release manifest (8 October 2026, an accepted external review): site/release-manifest.json is served at /release.json
// (vercel.json rewrite) and every number a status page carries from it sits in <span data-rm="a.b.c">...</span>, filled here
// at build; tools/ci/release-manifest-check.mjs holds the committed pages to the manifest and the manifest to its sources.
const RM = JSON.parse(readFileSync(join(here, 'release-manifest.json'), 'utf8'));
export function rmValue(path) {
const v = path.split('.').reduce((o, k) => (o == null ? undefined : o[k]), RM);
if (v === undefined) throw new Error(`release-manifest.json: no value at ${path}`);
return typeof v === 'number' && !/_id$/.test(path) ? v.toLocaleString('en-GB') : String(v); // an id is never grouped
}
export function fillManifest(html) {
// the hand pages carry <span data-rm>; the markdown sources carry {{rm:path}} (their renderer escapes raw HTML)
html = html.replace(/\{\{rm:([a-z0-9_.-]+)\}\}/g, (m, p) => `<span data-rm="${p}">${rmValue(p).replace(/&/g, '&amp;').replace(/</g, '&lt;')}</span>`);
return html.replace(/<span data-rm="([a-z0-9_.-]+)">[^<]*<\/span>/g, (m, p) => `<span data-rm="${p}">${rmValue(p).replace(/&/g, '&amp;').replace(/</g, '&lt;')}</span>`);
}
function sectionise(bodyHtml) {
// the markdown renderer's flat stream, cut at every h2 into <section class="doc-section"> so the contents rail and the
// text filter work on sections; anything before the first h2 is its own section
const parts = bodyHtml.split(/(?=<h2 id=")/);
return parts.filter(p => p.trim()).map(p => `<section class="doc-section">${p}</section>`).join('\n');
// a dated log entry is a historical record (8 October 2026): the label sits under its heading, the current state is /release.json
const hist = (p) => p.replace(/^(<h2 id="(\d{4}-\d{2}-\d{2})[^"]*">[\s\S]*?<\/h2>)/, (m, h, d) => `${h}<p class="src"><b>Historical record</b> of ${d}: the code and the chain as they stood that day. The chain's current state is the <a href="/release.json">release manifest</a>.</p>`);
return parts.filter(p => p.trim()).map(p => `<section class="doc-section">${hist(p)}</section>`).join('\n');
}
function page(title, desc, bodyHtml, toc, note, { path = '/bench', heading = title, eyebrow, crumb, filter = true } = {}) {
const active = path.replace(/^\//, '');
@ -282,7 +298,8 @@ for (const [src, file, title, desc, heading, lead, eyebrow] of [
]) {
const mdp = join(docs, 'build', src);
if (!existsSync(mdp)) continue; // the gate builds a copy of site/ alone: the committed page stands, as for /bench
const { html, toc } = md(readFileSync(mdp, 'utf8'));
const { html: mdHtml, toc } = md(readFileSync(mdp, 'utf8'));
const html = fillManifest(mdHtml);
const path = '/' + file.replace(/\.html$/, '');
writeFileSync(join(here, file), page(title, desc, html, toc, lead, { path, heading, crumb: heading, eyebrow, filter: false }).replace('<p class="gen">Generated from the repository at build time. Times are UTC. Machine names are model names.</p>', `<p class="gen">Generated from docs/build/${src} in the repository at build time. Times are UTC.</p>`));
built.push(file);
@ -372,7 +389,7 @@ function renderEvidence(html) {
const start = src.indexOf('\n| # | Claim |'); const end = src.indexOf('\n## Count by status');
if (start < 0 || end < 0) throw new Error('evidence.md: claims table not found');
const rows = src.slice(start, end).split('\n').filter(l => /^\| \d+ \|/.test(l));
const LABELS = ['designed', 'implemented', 'tested by the team', 'reproduced externally', 'reviewed independently'];
const LABELS = ['designed', 'implemented', 'activated', 'tested by the team', 'reproduced externally', 'reviewed independently'];
const inl = t => esc(t.trim()).replace(/`([^`]+)`/g, (m, c) => `<code>${c}</code>`);
const cells = l => l.replace(/^\| /, '').replace(/ \|$/, '').split(' | ');
const counts = Object.fromEntries(LABELS.map(k => [k, 0]));
@ -436,6 +453,30 @@ for (const [file, active] of PAGES) {
html = stampDownloads(html, file, downloads);
html = stampMarks(html);
if (file === 'evidence.html') html = renderEvidence(html);
// /economics, "Who pays for proving" (8 October 2026, an accepted external review): the model table is computed here from
// site/lib/emission.mjs (the node's constants) and the release manifest, never typed; the measured rows on the page are the
// observer's proving view as read that day. Labels: the per-day pool is modelled from the schedule; the per-shard and per-key
// lines hold today's measured shard and key counts constant; nothing here is a price.
if (file === 'economics.html' && html.includes('<!-- proving-model:start -->')) {
const em = await import('./lib/emission.mjs');
const ign = (s) => Number(em.sompiToIgn(s));
const fmt = (n, d = 2) => n.toLocaleString('en-GB', { maximumFractionDigits: d, minimumFractionDigits: d });
const PV = RM.proving_view; // the measured 24-hour read on the page (shards paid, IGN paid, keys, planned)
const daa = Number(PV.read_daa);
const poolShare = Number(RM.fees.subsidy_split.proving_pool_percent) / 100;
const rows = [];
const line = (label, subsidyIgn, when, note) => {
const poolBlock = subsidyIgn * poolShare, poolDay = poolBlock * 86400;
rows.push(`<tr><td>${label}</td><td class="num">${fmt(subsidyIgn, 3)}</td><td class="num">${fmt(poolBlock, 3)}</td><td class="num">${fmt(poolDay, 0)}</td><td class="num">${fmt(poolDay / PV.shards_planned_24h, 2)}</td><td class="num">${fmt(poolDay / 24 / PV.prover_keys_24h, 1)}</td><td>${when}${note ? `; ${note}` : ''}</td></tr>`);
};
line('Today, inside the launch ramp', ign(em.blockSubsidy(daa)), `DAA ${daa.toLocaleString('en-GB')}, ${(em.rampFactor(daa) * 100).toFixed(1)} percent of the full rate`, 'modelled; the measured payout is in the row above');
const names = ['Full rate (years 1 to 2)', 'After the first halving (years 3 to 4)', 'After the second (years 5 to 6)', 'After the third (years 7 to 8)', 'After the fourth (years 9 to 10)', 'After the fifth (years 11 to 12)'];
names.forEach((n, p) => line(n, ign(em.subsidyPerSecond(p)), `period ${p} of the schedule`, p === 0 ? 'from day 30' : ''));
const table = `<div class="tbl"><table><thead><tr><th>When</th><th>Subsidy per block, IGN</th><th>Pool per block, IGN</th><th>Pool per day, IGN</th><th>Per planned shard, IGN</th><th>Per prover key per hour, IGN</th><th>Basis</th></tr></thead><tbody>${rows.join('')}</tbody></table></div>
<p class="src"><b>Modelled</b> from <code>emission.rs</code> (the schedule as <code>site/lib/emission.mjs</code> carries it) and the release manifest at build time, with today's measured shard count (${PV.shards_planned_24h.toLocaleString('en-GB')} planned in 24 hours) and key count (${PV.prover_keys_24h}) held constant; the per-shard figure is the pool's credit per planned shard, the per-key figure the pool per day divided by the keys and by 24. More shards or more keys lower both; a block's unproven shards leave their credit in the escrow.</p>`;
html = inject(html, 'proving-model', table, file);
}
html = fillManifest(html);
if (file === 'index.html' && html.includes('<!-- journey:start -->')) html = inject(html, 'journey', `<script type="application/json" id="journey-data">${JSON.stringify(journey).replace(/</g, '\\u003c')}</script>`, file);
// /income (8 October 2026): the calculator's card list is the bench table's current rows, stock and tuned apart, inlined
// at build so the page needs no fetch; a row's watts carry their class when they were read under another (watts_class)

2
site/claims.html
View file

@ -251,7 +251,7 @@
<div class="derived"><p>Here are the limits, stated before anyone else states them.</p>
<ul>
<li><strong>A proof in seconds.</strong> Not at launch. Proving a full block today needs a cluster of 100 to 200 consumer GPUs, approximate, so Igneum launches with proofs within about a minute and tightens as hardware improves. Users still see their transaction land in one second.</li>
<li><strong>A chip is impossible.</strong> No. A chip wired for one program is a bad bet, because the program moves before it ships. A programmable chip is not stopped by the moving target: everything it needs is public at genesis and every drawn parameter is firmware to it (an address permute, a rotator, an immediate table), so the defence against it is the latency-shadow work (class v4) and the price per joule, not the schedule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane and 3.4x with one three times better, under class v4 from the first block: a memory-controller chip that stores the whole dataset and carries a GPU-class datapath beside its memory for the 100,000 ops per hash in the shadow, the range running from a chip core as costly per operation as a GPU lane (k = 1, modelled on the 5090’s measured watts at its knee, 7 October 2026) to a core three times better per operation (k about 0.33); the withdrawn Antminer X9’s claimed figure is a ratio against a CPU core, not a GPU lane, so it does not stand for a chip core against us; the ladder’s second rung takes that bracket to about 2.8x (modelled, 7 October 2026). Class v5 then makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item (designed, 7 October 2026). The baseline the work started from, never the launch state: without class v4 the same stored-dataset chip would reach 1.2x per chip and 5x to 9x per joule in our model (6 October 2026); the Ethash chips of this class reached 2.1x to 4.8x (Linzhi Phoenix 2020, Jasminer X4 2021, Antminer E9 2022). The strongest recompute chip we can price, holding the whole 256 MiB cache on-die, reaches under 1x per chip against an RTX 5090 (the published model, 5 October 2026: 0.92x per unit of silicon with a 3x fixed-function allowance, approximate). Sources: the chip model analysis (6 October 2026); the ASIC history’s Ethash rows; Counter ASIC 3.0 item 8 (the chip’s per-joule edge over the RTX 5090 falls from 5.6x to 2.1x on GDDR7 at k = 1 and to 3.4x at a core three times better, the 5090 at 0.2% less rate; gates G1 to G6 passed, 6 October 2026). No hash has stayed free of chips forever; Igneum does not claim to. Monero’s RandomX has held its miners on commodity hardware for about seven years: one chip shipped against it, Bitmain’s Antminer X5 (September 2023), at 1.46x per joule over a desktop CPU; the one announced beyond it, the Antminer X9, was withdrawn in mid-May 2026 before any unit shipped, its claimed core (k about 0.33) never measured; RandomX v2 was released on 25 March 2026 with its activation pending. That record says nothing about the price of a chip with the 256 MB cache on its die; that price is a cost model, not a measurement.</li>
<li><strong>A chip is impossible.</strong> No. A chip wired for one program is a bad bet, because the program moves before it ships. A programmable chip is not stopped by the moving target: everything it needs is public at genesis and every drawn parameter is firmware to it (an address permute, a rotator, an immediate table), so the defence against it is the latency-shadow work (class v4) and the price per joule, not the schedule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its security does not rely on identifying that hardware or retiring it through emergency changes. Class v6 adopts the 64-register window and retains it across every rotation. Current modelling places the strongest specialised designs assessed against the GPU tier at about 2.3x to 3.3x energy-efficiency advantage a node ahead (2.0x to 2.9x on the GPU's own node), a bracket that is approximate and provisional until the placed gated core rows land. The long-program and select-tree proposals were rejected. Economic resistance depends on development cost, deployment economics and productive hardware lifetime; family transitions receive an obsolescence benefit only where a loss of competitiveness is demonstrated; programmable multi-epoch designs are included in the assessment. The labels: the bracket modelled, approximate and provisional (the GPU side measured on the RTX 5080 and RTX 5090 at their core locks under class v4, 8 October 2026; the chip core synthesised on ASAP7 and scaled to N3, claimed, its placed gated row pending; its memory modelled). Class v5 makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item (designed, 7 October 2026). The strongest recompute chip we can price, holding the whole 256 MiB cache on-die, reaches under 1x per chip against an RTX 5090 (the published model, 5 October 2026: 0.92x per unit of silicon with a 3x fixed-function allowance, approximate). Sources: the class v6 close, section 10 (8 October 2026); the ASIC history’s Ethash rows; the chip model analysis (6 October 2026). No hash has stayed free of chips forever; Igneum does not claim to. Monero’s RandomX has held its miners on commodity hardware for about seven years: one chip shipped against it, Bitmain’s Antminer X5 (September 2023), an observed comparison, not a ceiling; the one announced beyond it, the Antminer X9, was withdrawn in mid-May 2026 before any unit shipped, its claimed core never measured; RandomX v2 was released on 25 March 2026 with its activation pending. That record says nothing about the price of a chip with the 256 MB cache on its die; that price is a cost model, not a measurement.</li>
<li><strong>A guaranteed income floor.</strong> No. External proving is a small market today. Igneum's miners' electricity cost in it is close to power, but the price they must charge is the subsidy they forgo, which falls as one over network hash: an edge at scale and nothing more.</li>
<li><strong>A memory-hard prototype on every vendor.</strong> Not yet. The 256 MB cache closed the shortcut on Apple silicon (computing items runs 4.8x slower than loading them, measured 3 October 2026). The same ratio on NVIDIA and on a discrete AMD card is Open.</li>
<li><strong>Finality in the first month.</strong> No. No checkpoint locks until the 30-day window has 30 days of history. The first month of mainnet is proof of work with a 12-hour depth, and the text above says so wherever a day count appears.</li>

44
site/economics.html
View file

@ -4,7 +4,7 @@
<meta charset="utf-8">
<meta name="viewport" content="width=device-width, initial-scale=1, viewport-fit=cover">
<title>Igneum economics: the emission as the node encodes it</title>
<meta name="description" content="The emission schedule, the 80/20 split, the fee routes, the proving-fee market, the switchable 1 percent client fee and the decimals, each as a table with its file and line in the node. No price, no projection.">
<meta name="description" content="The emission schedule, the 80/20 split, the fee routes, the proving-fee market, the switchable 1 percent client fee, who pays for proving under the halvings, and the decimals, each as a table with its file and line in the node. No price.">
<link rel="canonical" href="https://igneum.network/economics">
<!-- share:start -->
<meta property="og:type" content="website">
@ -215,7 +215,7 @@
<section class="page-hero"><div class="container">
<div class="breadcrumb"><a href="/">Igneum</a><span>/</span><span>Economics</span></div>
<h1>The economics, as the node encodes them.</h1>
<p class="lead">Every number below is read from the node’s source at one commit, with the file and the line. No price of IGN appears and nothing is projected: this page says what the code pays, to whom, and from what.</p>
<p class="lead">Every number below is read from the node’s source at one commit, with the file and the line, and the constants the chain runs on are the <a href="/release.json">release manifest</a>’s, filled at build time (node <span data-rm="source.node.commit">f8da7515</span>, <span data-rm="read_at_short">read 8 October 2026, 15:50 UK</span>). No price of IGN appears and nothing is projected: this page says what the code pays, to whom, and from what.</p>
</div></section>
<section class="section"><div class="container">
<p class="src"><b>Source:</b> the node fork, branch <code>release-0.3.25-node</code> at <code>e0644958</code> (the Devnet 3 cut of 8 October 2026), confirmed by the node lane on 8 October 2026; every line number is that commit’s. Devnet 3 inherits the devnet parameters (<code>consensus/core/src/config/params.rs</code> 2173 and 2207).</p>
@ -225,7 +225,7 @@
<div class="tbl"><table>
<thead><tr><th>Field</th><th><code>CURRENT</code> (Devnet 3 today, mainnet)</th><th><code>TESTNET_1</code> (igneum-testnet-1)</th><th>Where</th></tr></thead>
<tbody>
<tr><td>Launch rate</td><td class="num">3,168,808,781 base units a DAA second (10<sup>9</sup> IGN x 10<sup>8</sup> / 31,557,600, floored: one billion IGN in year one)</td><td class="num">100 IGN a DAA second</td><td><code>emission.rs</code> 85 to 123; <code>igneum.rs</code> 34</td></tr>
<tr><td>Launch rate</td><td class="num"><span data-rm="fees.emission.launch_rate_base_units_per_daa_second">3,168,808,781</span> base units a DAA second (10<sup>9</sup> IGN x 10<sup>8</sup> / 31,557,600, floored: one billion IGN in year one)</td><td class="num">100 IGN a DAA second</td><td><code>emission.rs</code> 85 to 123; <code>igneum.rs</code> 34</td></tr>
<tr><td>Ramp</td><td class="num">2,592,000 s (30 days) from 10 percent</td><td class="num">7,776,000 s (90 days) from 10 percent</td><td><code>igneum.rs</code> 76 <code>launch_ramp</code></td></tr>
<tr><td>Step</td><td class="num">63,115,200 s (two years), the rate halved each step (decay 2<sup>31</sup> of 2<sup>32</sup>)</td><td class="num">2,629,800 s (a month), the rate times 2<sup>-1/24</sup> each step (decay 4,172,697,914 of 2<sup>32</sup>: a two-year half-life)</td><td><code>emission.rs</code> 85 to 123</td></tr>
<tr><td>Tail</td><td class="num">none: the curve runs to zero and the sum is the hard cap, 4,000,000,000 IGN</td><td class="num">1 percent of supply a year (100 basis points) once the glide falls below it</td><td><code>emission.rs</code> 69 to 71</td></tr>
@ -238,8 +238,8 @@
<div class="tbl"><table>
<thead><tr><th>Share</th><th>Goes to</th><th>State</th><th>Where</th></tr></thead>
<tbody>
<tr><td class="num">80 percent</td><td>the miner whose key found the block</td><td>in consensus on every network</td><td><code>consensus/core/src/igneum.rs</code> 44 (<code>PROVING_POOL_SHARE_PERCENT = 20</code>), applied at 87 and 202</td></tr>
<tr><td class="num">20 percent</td><td>the proving pool, paid per shard to the provers of a segment record from a keyless escrow account</td><td>in consensus; the escrow is <code>PROVING_POOL_ADDRESS</code> in the execution layer</td><td><code>igneum.rs</code> 44; <code>igneum/exec/src/config.rs</code></td></tr>
<tr><td class="num"><span data-rm="fees.subsidy_split.miner_percent">80</span> percent</td><td>the miner whose key found the block</td><td>in consensus on every network</td><td><code>consensus/core/src/igneum.rs</code> 44 (<code>PROVING_POOL_SHARE_PERCENT = 20</code>), applied at 87 and 202</td></tr>
<tr><td class="num"><span data-rm="fees.subsidy_split.proving_pool_percent">20</span> percent</td><td>the proving pool, paid per shard to the provers of a segment record from a keyless escrow account</td><td>in consensus; the escrow is <code>PROVING_POOL_ADDRESS</code> in the execution layer</td><td><code>igneum.rs</code> 44; <code>igneum/exec/src/config.rs</code></td></tr>
<tr><td>A silent block’s bonus</td><td>a slice of the producer’s share moved to the pool when the producer did not sign its checkpoints, nothing destroyed</td><td>designed and in the code, not active: <code>signing_bonus_activation_daa</code> is <code>u64::MAX</code> on every object</td><td><code>igneum.rs</code> 96 <code>silent_split</code>; <code>params.rs</code> 1717</td></tr>
<tr><td class="num">0</td><td>any team, foundation, fund or treasury</td><td>no such output exists in the subsidy and no protocol tip reaches any address</td><td><code>igneum.rs</code>; spec 05 section 5.5</td></tr>
</tbody>
@ -249,15 +249,15 @@
<div class="tbl"><table>
<thead><tr><th>Route</th><th>What happens</th><th>State</th><th>Where</th></tr></thead>
<tbody>
<tr><td>Base fee, execution gas</td><td>burned in full: gas used times the execution base fee, debited and credited to no one; the proving dimension is the proving payment two rows down</td><td>in the code on Devnet 3</td><td><code>igneum/exec/src/executor.rs</code> 320 to 371 (327 and 357, 328 and 360)</td></tr>
<tr><td>Priority fee (the tip)</td><td>80 percent to the block’s miner; 20 percent to the developer registrations of the contracts whose code ran, pro rata by each frame’s gas; an unregistered frame’s part is credited to nobody, which is a burn; no part of the tip reaches the provers (spec O-5.7 closed at zero, 8 October 2026)</td><td>in the code on Devnet 3</td><td><code>executor.rs</code> 335 to 339; <code>igneum/exec/src/pgas.rs</code> 290; <code>igneum/exec/src/config.rs</code> 76 (<code>DEVELOPER_SHARE_PERCENT = 20</code>)</td></tr>
<tr><td>The proving payment (pgas used times the proving base fee, the congestion price of proving capacity)</td><td>90 percent to the block’s proving pool, paid per shard to its provers by consensus proving cost; 10 percent burned (the decision of 8 October 2026 that resolves the tip-share question: provers are paid by users for proving, not from the tip)</td><td>designed, not in the code: on Devnet 3 the whole proving base fee is still burned (<code>executor.rs</code> 357 and 360); the routing is pinned behind an activation constant</td><td>spec 05 sections 5.1 and 5.3; <code>docs/design/proving-payment.md</code></td></tr>
<tr><td>Base fee, both gas dimensions</td><td>burned in full: gas used times the execution base fee, pgas used times the proving base fee, debited and credited to no one</td><td>in the code on Devnet 3</td><td><code>igneum/exec/src/executor.rs</code> 320 to 371 (327 and 357, 328 and 360)</td></tr>
<tr><td>Priority fee (the tip)</td><td><span data-rm="fees.priority_fee.miner_percent">80</span> percent to the block’s miner; <span data-rm="fees.priority_fee.developer_percent">20</span> percent to the developer registrations of the contracts whose code ran, pro rata by each frame’s gas; an unregistered frame’s part is credited to nobody, which is a burn</td><td>in the code on Devnet 3</td><td><code>executor.rs</code> 335 to 339; <code>igneum/exec/src/pgas.rs</code> 290; <code>igneum/exec/src/config.rs</code> 76 (<code>DEVELOPER_SHARE_PERCENT = 20</code>)</td></tr>
<tr><td>External proving jobs</td><td>90 percent to the provers who delivered, 10 percent burned, once jobs settle in IGN</td><td>designed, not in the code: no constant exists; at launch a job is paid on the customer’s own chain</td><td>spec 05 section 5.4; the litepaper’s Proving section</td></tr>
<tr><td>The provers’ part of the tip</td><td>designed: a share of the producer’s <span data-rm="fees.priority_fee.miner_percent">80</span> percent paid per block to the block’s provers in the proportion the proving protocol defines, per shard with the pool credit</td><td>designed, not in the code: no constant exists; the executor credits the whole <span data-rm="fees.priority_fee.miner_percent">80</span> percent to the miner (<code>executor.rs</code> 335 to 339)</td><td>spec 05 sections 5.2 and 5.3</td></tr>
</tbody>
</table></div>
<h2>The proving-fee market</h2>
<p>The second income of a card is the proving pool above: 20 percent of every block, paid per shard against a valid proof record, plus 90 percent of every block’s proving payment, which users pay at the congestion price of proving capacity (the proving base fee); nothing from the priority fee, which stays whole to the block. The price a prover must charge an outside customer is the subsidy it forgoes while it proves, which falls as one over the network’s hash rate; the formula and its measured inputs are in the litepaper (<a href="/litepaper#building">Building on Igneum</a>). The market itself is designed and not built. What the pool pays today is measured: on Devnet 3 in the 24 hours to 12:16 UK on 8 October 2026 the chain paid 8,209 shards, 9,913.09 IGN in all, to 29 prover keys; 905 shards were paid in the hour to that minute; the lag from a proven block to the block that pays its shards read p50 514 and p90 953 DAA seconds; 40,502 shards were planned and 54 proving at that minute (the observer’s proof tables, read through <code>/api/explorer?proving=1</code>; the same numbers live on <a href="/proving">the proving page</a>). Devnet 3 IGN has no value; the rows show the mechanism paying, not an income.</p>
<p>The second income of a card is the proving pool above: 20 percent of every block, paid per shard against a valid proof record. A provers’ part of the priority fee is designed (spec 05, 5.2: a share of the producer’s 80 percent paid per block to the block’s provers) and is not in the code: today the whole 80 percent of the tip goes to the miner, the executor’s line above, and the pool is the only thing that pays an internal prover. The price a prover must charge an outside customer is the subsidy it forgoes while it proves, which falls as one over the network’s hash rate; the formula and its measured inputs are in the litepaper (<a href="/litepaper#building">Building on Igneum</a>). The market itself is designed and not built. What the pool pays today is measured: on Devnet 3 in the 24 hours to 12:16 UK on 8 October 2026 the chain paid 8,209 shards, 9,913.09 IGN in all, to 29 prover keys; 905 shards were paid in the hour to that minute; the lag from a proven block to the block that pays its shards read p50 514 and p90 953 DAA seconds; 40,502 shards were planned and 54 proving at that minute (the observer’s proof tables, read through <code>/api/explorer?proving=1</code>; the same numbers live on <a href="/proving">the proving page</a>). Devnet 3 IGN has no value; the rows show the mechanism paying, not an income.</p>
<h2>The client fee and the fund it fills</h2>
<div class="tbl"><table>
@ -269,6 +269,30 @@
</tbody>
</table></div>
<h2 id="who-pays-for-proving">Who pays for proving</h2>
<p>Three incomes, kept apart. Each has its own source and its own state.</p>
<div class="tbl"><table><thead><tr><th>Income</th><th>Where it comes from</th><th>Who gets it</th><th>State</th></tr></thead><tbody>
<tr><td>Block security</td><td>the block subsidy (<span data-rm="fees.subsidy_split.miner_percent">80</span> percent of each block) and <span data-rm="fees.priority_fee.miner_percent">80</span> percent of the priority fee</td><td>the miner whose key found the block</td><td>in consensus on every network (measured)</td></tr>
<tr><td>Internal proving</td><td>the proving pool: a fifth of each block’s subsidy (<span data-rm="fees.subsidy_split.proving_pool_percent">20</span> percent), paid per shard against a valid proof record; nothing else pays an internal prover today</td><td>the prover keys that delivered the shards</td><td>in consensus on Devnet 3 (measured below); the provers’ part of the tip designed, not in the code</td></tr>
<tr><td>External customers</td><td>payments from other chains for proofs, settled in IGN: <span data-rm="fees.external_jobs.provers_percent">90</span> percent to the provers, <span data-rm="fees.external_jobs.burn_percent">10</span> percent burned</td><td>the provers who took the job</td><td>designed, not implemented: no constant exists, no job has been paid</td></tr>
</tbody></table></div>
<p><b>The proving base fee pays nobody.</b> A transaction’s pgas times the proving base fee is burned in full today (<code>executor.rs</code>, the base-fee row above). It is not a prover’s income and it does not fill the pool. The pool is filled by the subsidy alone, and the subsidy halves every two years.</p>
<h3>What the pool pays, measured</h3>
<p>On Devnet 3 in the 24 hours to <span data-rm="proving_view.read_at">12:16 UK on 8 October 2026</span>: <span data-rm="proving_view.shards_paid_24h">8,209</span> shards paid, <span data-rm="proving_view.ign_paid_24h">9,913.09</span> IGN in all, to <span data-rm="proving_view.prover_keys_24h">29</span> prover keys; <span data-rm="proving_view.shards_planned_24h">40,502</span> shards planned, so about a fifth of the planned shards were proven and paid and the rest left their credit in the escrow; <span data-rm="proving_view.paid_per_hour">905</span> shards paid in the last hour; the lag from a proven block to the block that pays p50 <span data-rm="proving_view.lag_p50_daa">514</span> and p90 <span data-rm="proving_view.lag_p90_daa">953</span> DAA seconds. Per shard paid that is about 1.21 IGN; per key about 12 shards and 14 IGN an hour averaged over the day, across keys that prove at very different rates (measured; the observer’s proof tables through <code>/api/explorer?proving=1</code>).</p>
<h3>What reaches provers under the schedule, modelled</h3>
<p>Low fees and no external demand, which is the chain today: the pool is a fifth of the subsidy and nothing else. The table holds today’s shard count and key count constant and walks the halvings. No price of IGN appears; whether a row covers a card’s electricity depends on the price, which this page does not state.</p>
<!-- proving-model:start -->
<div class="tbl"><table><thead><tr><th>When</th><th>Subsidy per block, IGN</th><th>Pool per block, IGN</th><th>Pool per day, IGN</th><th>Per planned shard, IGN</th><th>Per prover key per hour, IGN</th><th>Basis</th></tr></thead><tbody><tr><td>Today, inside the launch ramp</td><td class="num">3.894</td><td class="num">0.779</td><td class="num">67,286</td><td class="num">1.66</td><td class="num">96.7</td><td>DAA 65,900, 12.3 percent of the full rate; modelled; the measured payout is in the row above</td></tr><tr><td>Full rate (years 1 to 2)</td><td class="num">31.688</td><td class="num">6.338</td><td class="num">547,570</td><td class="num">13.52</td><td class="num">786.7</td><td>period 0 of the schedule; from day 30</td></tr><tr><td>After the first halving (years 3 to 4)</td><td class="num">15.844</td><td class="num">3.169</td><td class="num">273,785</td><td class="num">6.76</td><td class="num">393.4</td><td>period 1 of the schedule</td></tr><tr><td>After the second (years 5 to 6)</td><td class="num">7.922</td><td class="num">1.584</td><td class="num">136,893</td><td class="num">3.38</td><td class="num">196.7</td><td>period 2 of the schedule</td></tr><tr><td>After the third (years 7 to 8)</td><td class="num">3.961</td><td class="num">0.792</td><td class="num">68,446</td><td class="num">1.69</td><td class="num">98.3</td><td>period 3 of the schedule</td></tr><tr><td>After the fourth (years 9 to 10)</td><td class="num">1.981</td><td class="num">0.396</td><td class="num">34,223</td><td class="num">0.84</td><td class="num">49.2</td><td>period 4 of the schedule</td></tr><tr><td>After the fifth (years 11 to 12)</td><td class="num">0.990</td><td class="num">0.198</td><td class="num">17,112</td><td class="num">0.42</td><td class="num">24.6</td><td>period 5 of the schedule</td></tr></tbody></table></div>
<p class="src"><b>Modelled</b> from <code>emission.rs</code> (the schedule as <code>site/lib/emission.mjs</code> carries it) and the release manifest at build time, with today's measured shard count (40,502 planned in 24 hours) and key count (29) held constant; the per-shard figure is the pool's credit per planned shard, the per-key figure the pool per day divided by the keys and by 24. More shards or more keys lower both; a block's unproven shards leave their credit in the escrow.</p>
<!-- proving-model:end -->
<h3>Per card, per hour, now and at each halving</h3>
<p>A card’s proving income is its shards times the credit per shard. Measured rates: an RTX 5090 proves an empty live shard beside its miner in 7.0 to 7.7 s and a full shard in 10.9 s alone, about 37 s a shard end to end (export, cut, key set-up, prove, sign, submit), 1.4 shards a minute; an RTX 3060 (12 GB) proves the v1 shard beside its miner in 37.5 s; an RTX 4060 (8 GB) proves it alone in 18.4 s (the engineering log, 4 to 6 October 2026). At those rates one card can prove 80 to 100 shards an hour, more than the <span data-rm="proving_view.paid_per_hour">905</span> an hour the whole chain paid to <span data-rm="proving_view.prover_keys_24h">29</span> keys, so today a prover is limited by the shards on offer, not by its card: the hourly figure per key in the table is the ceiling an evenly shared pool gives, and a 5090 and a 3060 take the same credit per shard. At each halving the credit per shard halves with the pool; a card’s watts do not. (Modelled from the measured rates; the chain’s shard count is the real limit.)</p>
<h3>Two honest routes to sustain it</h3>
<div class="tbl"><table><thead><tr><th>Route</th><th>What it does</th><th>What it is worth</th><th>State</th></tr></thead><tbody>
<tr><td>A defined share of fees to the proving pool</td><td>a fixed percentage of the base fees burned today (both gas dimensions) credited to the pool instead, by a rule at genesis or a class change</td><td>each percent of the share adds one percent of the day’s burned base fees to the pool. Priced per unit, not predicted: at 100,000 IGN of base fees burned in a day (a hypothetical volume, not a forecast) a 10 percent share adds 10,000 IGN a day, about today’s measured payout; at Devnet 3’s fee volume today it adds almost nothing, because almost nothing is burned</td><td>designed as an option; no constant exists</td></tr>
<tr><td>External settlement in IGN</td><td>other chains pay for proofs in IGN; <span data-rm="fees.external_jobs.provers_percent">90</span> percent to the provers, <span data-rm="fees.external_jobs.burn_percent">10</span> percent burned</td><td>the price a prover must charge is the subsidy it forgoes while it proves: per shard, (card hash ÷ network hash) × 0.8 × the block subsidy × shard seconds. For an RTX 5090 at 136 MH/s on a 1 GH/s network and a 37 s shard that is about 16 IGN a shard inside the ramp today and about 128 IGN at the full rate, against the pool’s 1.2 IGN a shard measured; the quote falls as one over network hash and is competitive near 100 GH/s (the litepaper, Building on Igneum)</td><td>designed; the settlement contract is not built</td></tr>
</tbody></table></div>
<p>The chip question (whether a chip gets built against the hash, and what it would earn) is a conditional argument of its own on the litepaper’s <a href="/litepaper#chip-model">chip model</a>, not part of this page.</p>
<h2>Units and decimals</h2>
<div class="tbl"><table>
<thead><tr><th>Network</th><th>Consensus side</th><th>EVM side</th><th>Where</th></tr></thead>
@ -281,7 +305,7 @@
<p>The symbol is IGN on every network. A wallet shows 18 decimals everywhere; on Devnet 3 the chain pays in 8 and the bridge shows the same amount at 18.</p>
<h2>What this page does not do</h2>
<p>It names no price, projects no income and models no market. The <a href="/income">income page</a> turns these rules into IGN a day for a card you pick, and money a day only at a price you type. Devnet and testnet IGN have no value.</p>
<p>It names no price and models no market; the proving model above walks the subsidy schedule at today’s measured shard and key counts and states no price. The <a href="/income">income page</a> turns these rules into IGN a day for a card you pick, and money a day only at a price you type. Devnet and testnet IGN have no value.</p>
<p>Not legal advice.</p>
</div></section>
</main>

58
site/evidence.html
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2
site/index.html
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@ -265,7 +265,7 @@
<div class="home-three rows">
<div class="home-row"><span class="n">01</span><div><b>The same card finds the block and proves it.</b><p>Both jobs pay. When you stop, the card still games.</p></div></div>
<div class="home-row"><span class="n">02</span><div><b>A fair start.</b><p>Nobody holds a coin before block one. The protocol carries no fee. The one payment to the project is the Ember software’s optional 1% dev fee, like other GPU miners, off with one flag.</p></div></div>
<div class="home-row"><span class="n">03</span><div><b>Built for graphics cards.</b><p>At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane, 3.4x with one three times better, under class v4 from the first block; a 5090 locked at its knee pays 82 W for that shadow work. Class v5 then makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item. Without class v4 the same chip would reach 5x to 9x. <a href="/litepaper#chip-model">The model and every measurement are public.</a></p></div></div>
<div class="home-row"><span class="n">03</span><div><b>Built for graphics cards.</b><p>Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its security does not rely on identifying that hardware or retiring it through emergency changes. Class v6 adopts the 64-register window and retains it across every rotation. Current modelling places the strongest specialised designs assessed against the GPU tier at about 2.3x to 3.3x energy-efficiency advantage a node ahead (2.0x to 2.9x on the GPU's own node), a bracket that is approximate and provisional until the placed gated core rows land. The long-program and select-tree proposals were rejected. Economic resistance depends on development cost, deployment economics and productive hardware lifetime; family transitions receive an obsolescence benefit only where a loss of competitiveness is demonstrated; programmable multi-epoch designs are included in the assessment. Modelled on measured cards (8 October 2026), the chip core synthesised, claimed and awaiting its placed row; a 5090 locked at its knee pays 82 W for the class v4 shadow work (measured, 7 October 2026). <a href="/litepaper#chip-model">Every number with its label, the harness and the scoring rules.</a></p></div></div>
</div>
</div>
</section>

4
site/lc/core.js
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@ -265,7 +265,7 @@ export function verifyBalance(cp, proof, deps) {
const step = (name, fn) => { try { const d = fn(); steps.push({ name, ok: true, detail: d }); return d; } catch (e) { steps.push({ name, ok: false, detail: String(e.message || e) }); throw e; } };
const done = extra => ({ ...extra, steps, ms: Math.round((now() - t0) * 10) / 10 });
try {
const cert = step('certificate: BLS aggregate over the checkpoint, 2/3 of active and 17/30 of total weight', () => {
const cert = step('certificate: BLS aggregate over the checkpoint, 2/3 of active and 2/3 of total weight', () => {
const r = verifyCheckpoint(cp, { blake2b, bls });
if (!r.verified) throw new Error(r.reason);
return `checkpoint ${r.index}, ${r.signers} of ${r.voters} voters, ${(r.weight_fraction_total * 100).toFixed(1)}% of total weight, ${r.headers_checked} headers to the previous lock`;
@ -338,7 +338,7 @@ export function verifyReceipt(receipt, deps) {
const done = extra => ({ ...extra, steps, ms: Math.round((now() - t0) * 10) / 10 });
try {
const cp = receipt.checkpoint.certificate;
const cert = step('certificate: BLS aggregate over the checkpoint, 2/3 of active and 17/30 of total weight', () => {
const cert = step('certificate: BLS aggregate over the checkpoint, 2/3 of active and 2/3 of total weight', () => {
const r = verifyCheckpoint(cp, { blake2b, bls });
if (!r.verified) throw new Error(r.reason);
if (strip(cp.hash) !== strip(receipt.checkpoint.hash) || receipt.chain_id !== cp.chain_id) throw new Error('the receipt names another checkpoint or chain than its certificate');

2
site/lc/verify-receipt.js
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@ -5390,7 +5390,7 @@ function verifyReceipt(receipt2, deps2) {
const done = (extra) => ({ ...extra, steps, ms: Math.round((now() - t0) * 10) / 10 });
try {
const cp = receipt2.checkpoint.certificate;
const cert = step("certificate: BLS aggregate over the checkpoint, 2/3 of active and 17/30 of total weight", () => {
const cert = step("certificate: BLS aggregate over the checkpoint, 2/3 of active and 2/3 of total weight", () => {
const r2 = verifyCheckpoint(cp, { blake2b: blake2b2, bls: bls2 });
if (!r2.verified) throw new Error(r2.reason);
if (strip(cp.hash) !== strip(receipt2.checkpoint.hash) || receipt2.chain_id !== cp.chain_id) throw new Error("the receipt names another checkpoint or chain than its certificate");

8
site/ledger.html
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@ -1383,15 +1383,15 @@ blockquote{margin:10px 0;padding:10px 14px;border-left:3px solid var(--line-2);c
<details><summary>The answer as first written</summary><p>The precedent Igneum cites is now a complete one: a fixed random program held CPU mining for about seven years and then a chip shipped. Igneum's program changes every hour from a genesis-fixed schedule, its dataset grows, and the chip model on the numbers page prices the chip that stores the dataset rather than assuming none can be built. The X9's rate and power are Bitmain's published figures, not our measurement.</p></details>
</article>
<article class="entry" id="X35" data-bucket="Fixed or built">
<div class="head"><span class="id">X35</span><h3>The class v4 chip headline stated as one number, 2.1x</h3><span class="date">7 October 2026</span></div>
<div class="head"><span class="id">X35</span><h3>The class v4 chip headline stated as one number, 2.1x</h3><span class="date">8 October 2026</span></div>
<blockquote>The home page said the strongest chip reaches 'about 2x once the lever now in its gates ships' and the litepaper said the latency-shadow work 'brings the chip to about 2x' and that its edge 'falls from 5.6x to 2.1x ... at a chip core equal to the GPU's'. That 2.1x assumes the chip's core costs what the GPU's does per operation (k = 1). Bitmain's Antminer X9 reached about a third of its honest device's energy on a latency-bound random program, so k about 0.33 is a shipped product class, and at that k the same model gives 3.9x.</blockquote>
<div class="status"><span class="badge b-fixed-or-built">Fixed, stated; restated</span> <span class="did">7 October 2026, evening, by order of the coordinator; the chip-text rewrite e57da45a, on master at 25f38035): the served texts give the floor and the premium at the 5090's measured knee: 2.1x per joule with a core as good as a GPU lane (k = 1), 3.4x with one three times better (k about 0.33), no core below about 1.8 pJ per op in the model's range, the premium 81.8 W at the best points, Ember Tune named as how a user gets there; the ledger pin for X35 moved to the new sentence; <code>a repository file#chip-model</code> and the home line.</span></div>
<div class="status"><span class="badge b-fixed-or-built">Fixed, stated; restated</span> <span class="did">8 October 2026, afternoon, by order of main after two accepted external reviews of the class v6 close; <code>a repository file</code> 10.0f to 10.0h): the served chip text is the third review's claim statement (&quot;Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its security does not rely on identifying that hardware or retiring it through emergency changes.&quot;) above the review's sentence, both verbatim on the home line, the litepaper's abstract, chip section and limits item, and the miner page, with rotation named an optional improvement and no threshold as the economic headline (the coexistence model owed): &quot;Class v6 adopts the 64-register window and retains it across every rotation. Current modelling places the strongest specialised designs assessed against the GPU tier at about 2.3x to 3.3x energy-efficiency advantage a node ahead (2.0x to 2.9x on the GPU's own node), a bracket that is approximate and provisional until the placed gated core rows land. The long-program and select-tree proposals were rejected. Economic resistance depends on development cost, deployment economics and productive hardware lifetime; family transitions receive an obsolescence benefit only where a loss of competitiveness is demonstrated; programmable multi-epoch designs are included in the assessment.&quot; Every number carries its label (the bracket about 2.3x to 3.3x a node ahead and 2.0x to 2.9x node for node, modelled, approximate and provisional, served on main's &quot;serve the bracket now&quot; order of 16:2x UK until the k lane's placed gated core row lands; the GPU side measured on the RTX 5080 and RTX 5090 lock rows of 8 October 2026 and the card's measured cost of the window (a rented 5090 and 4090 at stock, within 5 percent per load); the chip core synthesised on ASAP7 and scaled to N3, claimed, its memory modelled; the node column claimed scaling). The three statements (energy resistance, economic resistance, response capability) are served separate; the harness and the scoring rule are linked beside the sentence. Struck from every served page: the 2.1x and 3.4x launch line, the 5x to 9x baseline, the ladder's 2.8x row, the USD 100 M pay-back row and the k about 0.33 column; never served and not to be: the lifetime claim, the USD 300 M and 340 M lines, any chip-arrival probability, the 725d2945 sentence. The pins for X35 moved to the new sentence (<code>a repository file</code>). Was: the 2.1x to 3.4x range at the 5090's knee, below.</span></div>
<details><summary>The answer as first written</summary><p>One number was the model's k = 1 column; the X9 made the k = 0.33 column a product rather than a claim, so the public figure is the range. Rung 2 of the ladder (the top admissible rung on 6 October 2026) takes the X9 bracket from about 3.9x to about 2.8x and does not close it; the ladder moves at the pace of the cards that pay for it (M34).</p></details>
</article>
<article class="entry" id="X36" data-bucket="Fixed or built">
<div class="head"><span class="id">X36</span><h3>The X9 described as a shipping chip</h3><span class="date">7 October 2026</span></div>
<div class="head"><span class="id">X36</span><h3>The X9 described as a shipping chip</h3><span class="date">8 October 2026</span></div>
<blockquote>X34 and X35 said Bitmain's Antminer X9 'ships from July 2026' and called it 'the shipping RandomX chip'. It never shipped: Bitmain opened pre-orders on 26 December 2025 for July 2026 delivery, resellers told buyers in mid-May 2026 that Bitmain had discontinued it and refunded them, no unit was delivered and none was independently benchmarked.</blockquote>
<div class="status"><span class="badge b-fixed-or-built">Fixed, stated; restated further</span> <span class="did">7 October 2026, evening, from the counter-asic-4 research file d7721ebe; on master at 25f38035): the X9's claimed ratio is against a CPU core, not a GPU lane, so the texts no longer use it as a pessimistic chip core; every served sentence says so; the pin for X36 moved.</span></div>
<div class="status"><span class="badge b-fixed-or-built">Fixed, stated; restated</span> <span class="did">8 October 2026, afternoon, with X35): the X9 appears on the served pages only as a precedent (the pre-order, the withdrawal, no benchmark) and no served sentence uses its claimed core as a chip core against the model; the Antminer X5 is served as an observed comparison, not a ceiling (the close's 10.0f); the pin for X36 moved to that phrase. Was: the k about 0.33 column carried as the X9's claimed core, below.</span></div>
<details><summary>The answer as first written</summary><p>The k about 0.33 column stays in the public range as the X9's claimed, unmeasured core: Bitmain's figures (1,000 KH/s at 2,472 W, 2.47 J/KH) were a pre-order sheet, never a benchmark, and the RandomX team's own reading (sech1, 25 January 2026) was &quot;no, X9 is not an ASIC... Only 2x efficiency gap (hash/Joule) is not 'cracked'&quot;: a box of commodity Sophgo SG2044 server SoCs with an AES block and over sixty DRAM sticks, no tapeout, about 2x per joule over a tuned Zen 4 part and about 3x over a stock desktop CPU. It was withdrawn rather than face a RandomX re-tune of 1.5x or more. The lesson the public text now carries is that one: a maintained algorithm with a credible upgrade path held, which is what the latency ladder is for Igneum. Monero's hashrate shows no X9 fleet (about 6.1 GH/s before and after, approximate).</p></details>
</article>
<article class="entry" id="X37" data-bucket="Answered with evidence">

2
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@ -275,7 +275,7 @@
<h2 id="checked">What is checked, in order</h2>
<ol>
<li>The certificate: the aggregate BLS signature of the signers over <code>igneum-vote-v1/igneum-devnet-3 || index || checkpoint hash</code>, the canonical voter order, the rule (two thirds of active weight, 17/30 of total), and the header chain from the previous lock.</li>
<li>The certificate: the aggregate BLS signature of the signers over <code>igneum-vote-v1/igneum-devnet-3 || index || checkpoint hash</code>, the canonical voter order, the rule (two thirds of active weight and two thirds of total weight), and the header chain from the previous lock.</li>
<li>The header path from the carrier block up to the certified checkpoint: every header hash recomputes (BLAKE2b-256 keyed BlockHash over the header fields), every next header names the previous as a direct parent.</li>
<li>The coinbase transaction is in the carrier block: its hash recomputes (BLAKE2b-256 keyed TransactionHash over the serialized transaction) and the merkle path reaches the header's <code>hash_merkle_root</code>.</li>
<li>The segment record in the coinbase extra data: the aggregator's BLS signature over the record under the network's tag, whether the key is a voter with weight or a prove-only key, and the statement names the chain and the block whose state it commits.</li>

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<article>
<section id="abstract">
<h2>Abstract</h2>
<p class="lead">Igneum is a proof-of-work blockchain built for graphics cards, where NVIDIA cards also prove every block with zero-knowledge proofs and sell proving to other chains. At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane, 3.4x with one three times better, under class v4 from the first block; class v5 makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item; without class v4 the same chip would reach 5x to 9x: <a href="#chip-model">the chip model</a>, every number labelled measured, modelled, claimed or designed.</p>
<p class="lead">Igneum is a proof-of-work blockchain built for graphics cards, where NVIDIA cards also prove every block with zero-knowledge proofs and sell proving to other chains. Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its security does not rely on identifying that hardware or retiring it through emergency changes. Class v6 adopts the 64-register window and retains it across every rotation. Current modelling places the strongest specialised designs assessed against the GPU tier at about 2.3x to 3.3x energy-efficiency advantage a node ahead (2.0x to 2.9x on the GPU's own node), a bracket that is approximate and provisional until the placed gated core rows land. The long-program and select-tree proposals were rejected. Economic resistance depends on development cost, deployment economics and productive hardware lifetime; family transitions receive an obsolescence benefit only where a loss of competitiveness is demonstrated; programmable multi-epoch designs are included in the assessment. <a href="#chip-model">The chip model</a>: every number labelled measured, modelled or claimed, the harness and the scoring rules beside it.</p>
<p>It runs the Ethereum virtual machine, so anything built for Ethereum runs on Igneum unchanged. Transactions are included in about one second, proven within about a minute at launch, and locked by miners within about two. There is no premine, no pre-sale, no treasury taken from emission, no stake anywhere in consensus, and no dependence on any other chain. Mining stays open to anyone with a GPU because the mining program changes every hour, so a chip built for one program is useless for the next, and a chip for the whole program space is a GPU without the graphics parts. No scheduled human release is needed to keep it that way. Writing new code, including an emergency fix to the proof system, is the one thing that takes a person, and it activates only on miner signalling.</p>
<div class="stats">
<div class="stat"><div class="v">1 / s</div><div class="k">blocks, rising to 10</div></div>
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<div class="cap">Five layers plus the external proving market. A block flows down the column; outside demand feeds the same miners from the side.</div>
</div>
<h3>Live on Devnet 3, 7 October 2026</h3>
<p>Devnet 3 (igneum-devnet-3, chain id 4463) made its first block at 18:06 UK on 7 October 2026 with every upgrade on from block zero, and locked its first checkpoint at 20:02 UK. The first devnet ran from 3 October 2026 and took each upgrade by height. Coins on Devnet 3 have no value and the chain may be reset. What is on it:</p>
<p>Devnet 3 (<span data-rm="network.id">igneum-devnet-3</span>, chain id <span data-rm="network.chain_id">4464</span> since its class v5 floor at DAA <span data-rm="mining.class_since_daa">68,400</span>, 4463 from genesis to the floor; the chain’s current state is the <a href="/release.json">release manifest</a>) made its first block at 18:06 UK on 7 October 2026 with every upgrade on from block zero, and locked its first checkpoint at 20:02 UK. The first devnet ran from 3 October 2026 and took each upgrade by height. Coins on Devnet 3 have no value and the chain may be reset. What is on it:</p>
<div class="tbl"><table>
<thead><tr><th>Layer</th><th>State</th><th>Since</th></tr></thead>
<tbody>
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</tbody>
</table></div>
<p>Three ideas carry the chip resistance. <strong>The hash rewrites itself.</strong> A new program every hour, drawn from the chain. Its memory pattern changes with it. The rules change on a schedule fixed at launch. No release, no vote. These are automatic schedule changes: they defeat a chip wired for one datapath and they need no human fork. Against a chip that stores the dataset every drawn parameter is firmware, and what meets that chip is the latency-shadow work (class v4) and the price per joule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). <strong>It waits on memory, not maths.</strong> Every hash is a chain of random reads into a table too big for a chip to carry. Measured (8 October 2026; lane D’s family harness at the acceptance rule’s own 2^20 sample over 4,900 drawn eras, and the chained-cache pass’s reading of the night before): every hash’s 128 dependent reads land across the whole dataset and the distinct-index floor holds at 0.995 on every accepted program; about half of epochs carry one load site whose address bit at the era’s stride rotation is biased, which prices about 1.6 percent of a hash’s reads to a chip storing half the dataset and nothing to a chip storing all of it; the next class folds the product’s low bits before the rotation, so no era lands a biased bit on an address bit. The wait is the same physics for everyone. <strong>Miners hold the switch.</strong> Spare defences are written into the rules, switched off. A miner signal turns one on, at the class-change threshold: miners signal three things at three thresholds, 60 percent of blue blocks over two weeks for a parameter genesis leaves open, 90 percent for an upgrade (new code), and 95 percent with a floor height for a class change. No fork.</p>
<p><strong>The work that waits can grow.</strong> Class v4 adds a block of latency-shadow arithmetic to every hash, about 100,000 integer operations that run while the memory reads are in flight, so a chip that stores the whole dataset still has to pay for a core. That size sits on a ladder fixed at genesis, six rungs from about 100,000 to about 1,000,000 operations, and it moves one rung at a time only when 90 percent of blue blocks in each of seven consecutive days ask for it; it can never move two rungs inside a week and never past a rung the reference verifier cannot check under 10 ms with its sibling thread busy (measured on the build server, 6 October 2026: the first three rungs pass at 8.8, 8.9 and 9.2 ms, the fourth misses by 0.08 ms on a loaded box and stays out until a quiet re-measurement, the two doublings are out at 12.4 and 15.0 ms). What it buys, on the measured cards: against a dataset-storing chip whose core costs what an RTX 5090's does per operation, the chip's per-joule edge falls from 2.1x at the first rung to 1.3x at the third; against a core as good as the one Bitmain claimed for its withdrawn Antminer X9 (about 3x per joule over a desktop CPU, never measured), from 3.4x to 2.8x. What it costs, per rung, is measured too: the Apple tier gives up 3 points of rate at the first step and 6 more at the second, the RTX 5090 nothing until the second; so the miners who pay for a step are the ones who take it (<a href="/ledger#M34">ledger M34</a>).</p>
<p><strong>The work that waits can grow.</strong> Class v4 adds a block of latency-shadow arithmetic to every hash, about 100,000 integer operations that run while the memory reads are in flight, so a chip that stores the whole dataset still has to pay for a core. That size sits on a ladder fixed at genesis, six rungs from about 100,000 to about 1,000,000 operations, and it moves one rung at a time only when 90 percent of blue blocks in each of seven consecutive days ask for it; it can never move two rungs inside a week and never past a rung the reference verifier cannot check under 10 ms with its sibling thread busy (measured on the build server, 6 October 2026: the first three rungs pass at 8.8, 8.9 and 9.2 ms, the fourth misses by 0.08 ms on a loaded box and stays out until a quiet re-measurement, the two doublings are out at 12.4 and 15.0 ms). What it buys against a chip is scored under the rule in the chip model below. What it costs, per rung, is measured too: the Apple tier gives up 3 points of rate at the first step and 6 more at the second, the RTX 5090 nothing until the second; so the miners who pay for a step are the ones who take it (<a href="/ledger#M34">ledger M34</a>).</p>
<h3 id="chip-model">The chip model</h3>
<p>We price the strongest chip we can design against an RTX 5090 and publish the arithmetic. Class v4 is live from the first block on the testnet and the mainnet (the ladder’s rung 0 at genesis), so the launch number is the class v4 row. The honest card: an RTX 5090 mines class v3 at 136 MH/s on 350 W in the bench and 290 W in the app (measured, 6 October 2026); under class v4 the same card reads 136.84 MH/s at 475.5 W unlocked and 134.98 MH/s at 316.3 W at a 1,400 MHz core lock, and 133.80 MH/s at 305.1 W at 1,200 MHz, against a class v3 control of 134.68 MH/s at 228.0 W (measured, 7 October 2026); an Apple M5 Max at 27 MH/s on 21 W (measured, 6 October 2026); an H100 SXM at 249 MH/s, 98 percent of its random-read ceiling like the 5090, 1.78x the 5090’s hash at 1.15x the tuned 5090’s hash per watt and a third of the hash per rented dollar (measured, 7 October 2026), so datacentre silicon does not change the chip question. The CPU verifier takes 2.33 ms per warp of 32 hashes on one M5 Max core under class v4 (measured, 6 October 2026), against a gate of 10 ms.</p>
<div class="tbl"><table><thead><tr><th>The chip and the class</th><th>Edge over an RTX 5090 per joule</th><th>Label and date</th></tr></thead><tbody>
<tr><td>At launch: a memory-controller chip that stores the whole dataset, under class v4 (about 100,000 integer ops per hash in the latency shadow, so the chip carries a GPU-class datapath beside its memory)</td><td>2.1x with a core as costly per op as a GPU lane (k = 1); 3.4x with a core three times better per op (k about 0.33); no core below about 1.8 pJ per op is in the model’s range, and the withdrawn Antminer X9’s claimed figure is a ratio against a CPU core, not a GPU lane, so it is not a chip core against us</td><td>modelled on the 5090’s measured watts at its knee, 7 October 2026 (the shadow’s premium 81.8 W at the best points: class v4 at the 1,200 MHz lock 133.80 MH/s at 305.1 W against class v3 at 1,300 MHz 134.62 at 223.3 W; a user gets there through Ember Tune’s core-clock knob, 0.3.24)</td></tr>
<tr><td>The same chip at the ladder’s second rung (about 200,000 ops per hash), reached by miner signal</td><td>about 2.8x</td><td>modelled, 7 October 2026</td></tr>
<tr><td>Any chip under class v5, where the dataset is the chain’s own state</td><td>a stateless or stale chip is wrong on every item, so the stored-dataset chip and the recompute chip are removed as categories; the verifier pays 0.2 ms more per warp</td><td>designed, 7 October 2026</td></tr>
<tr><td>A chip caching the hottest 0.1 percent of items (about 1 MB of SRAM)</td><td>bounded at 1.067x at the ceiling, 1.005x on about half the hours and 1.048x on 5 percent</td><td>measured census of 1,024 programs, 7 October 2026; the source rule in the next class</td></tr>
<tr><td>A per-day FPGA that recomputes the dataset with cheap multipliers on a weak day</td><td>at most 12 percent more multiplier area on an FPGA’s per-day build on 15 days a century, nothing on the other days and nothing for any chip</td><td>measured census of 2^24 days, 7 October 2026; the rule in the next class</td></tr>
<tr><td>When a stored-dataset chip pays for itself</td><td>at about USD 100 M of market cap in the first two years, not before</td><td>modelled, 7 October 2026</td></tr>
<tr><td>The baseline the work started from: the same chip under class v3, without the shadow (the Ethash class)</td><td>5x to 9x (5.1x on GDDR7, 9.2x on eight HBM3 stacks; the Ethash chips of this class reached 2.1x to 4.8x)</td><td>modelled, 6 October 2026; the precedent measured by others, 2020 to 2022; never the launch state</td></tr>
<p><b>Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its security does not rely on identifying that hardware or retiring it through emergency changes.</b> Class v6 adopts the 64-register window and retains it across every rotation. Current modelling places the strongest specialised designs assessed against the GPU tier at about 2.3x to 3.3x energy-efficiency advantage a node ahead (2.0x to 2.9x on the GPU's own node), a bracket that is approximate and provisional until the placed gated core rows land. The long-program and select-tree proposals were rejected. Economic resistance depends on development cost, deployment economics and productive hardware lifetime; family transitions receive an obsolescence benefit only where a loss of competitiveness is demonstrated; programmable multi-epoch designs are included in the assessment.</p>
<p><b>The labels.</b> The bracket is modelled and provisional: its floor is the clock-gated base core and its ceiling the first placed core, which came in 64 percent above synthesis (wires and the clock tree); the honest figure is the placed gated core’s and replaces the bracket when its row lands. The GPU side is measured: an RTX 5080 at its 1,100 MHz core lock, 2.06 microjoules per hash, and an RTX 5090 at its 1,300 MHz lock, 2.33 microjoules per hash, both under class v4, on the project’s own rigs and rented pods, 8 October 2026; the card’s cost of the window is measured too (a rented RTX 5090 and RTX 4090 at stock, 8 October 2026: within 5 percent per load with the liveness chain, no register spill). The chip side is synthesised and claimed: the clock-gated sequencer core with the 64-register window on ASAP7, scaled to N3 on the foundry’s headline factors (k about 0.37 at N3 and 0.51 node for node for the base core, the gated window adding about 0.13 of k against an adversary with a flop register file; the window’s liveness measured at 61 of 64 values necessary, its cost to the card measured under 5 percent); the window’s k is synthesis-derived and not a lower bound, and the multi-family adversary lane’s first core (its state in a macro) reads the window’s defence as close to nothing, a disagreement between two models that the placed rows settle. The chip’s memory is modelled: the GDDR7 board of the chip model. The placed gated figure is expected near 2.6x to 3.1x a node ahead and 2.3x to 2.7x node for node (approximate) and is served when its row lands.</p>
<p>Three statements, kept separate. The baseline is the hash as it stands under the scoring rule; rotation is an optional improvement to that baseline, not the mechanism the claim rests on.</p>
<div class="tbl"><table><thead><tr><th>Statement</th><th>What it says</th><th>Label and date</th></tr></thead><tbody>
<tr><td>Energy resistance</td><td>The bracket above: about 2.3x to 3.3x for the strongest specialised design a node ahead of the GPU tier, 2.0x to 2.9x on the GPU’s own node, provisional until the placed gated core row lands; two nodes ahead follows from that row. The honest tier moves to the next node with every GPU generation; a chip must tape out again.</td><td>modelled on measured cards, 8 October 2026, approximate and provisional; the node column is claimed scaling</td></tr>
<tr><td>Economic resistance</td><td>Whether a chip gets built depends on development cost, deployment economics and productive hardware lifetime. The first cut of the profitability surface: the price at which a project pays scales as the project cost over its share of the chain times its discounted life, and moves by under 5 percent with the per-joule edge; a fixed-lane chip under rotation needs 4x the price a programmable one needs. No threshold is the headline: the coexistence model that prices the conditions (<code>docs/analysis/class-v6/coexistence-model.md</code>) is owed and is served when it exists.</td><td>modelled, first cut, 8 October 2026; conditional until the cut lands</td></tr>
<tr><td>Response capability</td><td>Rotation is an optional improvement, not the mechanism. A passed rotation boundary proves the rotation works, not that hardware dies. The schedule: a new program every hour, a parameter era every week, a family epoch every 180 days, an emergency vote when miners call one.</td><td>measured per boundary, 8 October 2026</td></tr>
</tbody></table></div>
<p>What a miner sees from this. Class v4 costs a 5090 145 W more unlocked, 88 W more at a 1,400 MHz core lock and 82 W at the best operating points (class v4 at 1,200 MHz, class v3 at 1,300; the knee is 1,300 MHz on both), for 0.2 percent more rate (measured, 7 October 2026; the 80 W read on 6 October was at the app's tuned cap); an M5 Max 16 W more for 1.5 percent, an RX 9070 XT and an RTX 4070 nothing (measured, 6 October 2026). The ladder that sets how much work rides in the shadow starts at rung 0 at genesis and climbs by miner signal; its third rung is inadmissible today because a server core verifies it in 10.85 ms, over the gate (measured, 7 October 2026). Devnet 3 runs class v4 from its first block (7 October 2026); the first devnet started on class v3 and reaches class v4 by miner signal at a published height. Classes rotate on findings and at least yearly; a class change is a release activated by block height. Class v5 crosses on Devnet 3 by height; class v6 is the design in progress (opened 8 October 2026), with four layers as its spine: per-era draws of the parameters a release now fixes, a dataset whose size tracks the chain state, scheduled family epochs by height, and the acceptance floor generalised to every era’s draw. The next test of the model is an internal adversarial pass, not an independent review: three lanes that have never worked on the hash code attack the mixer, the chained cache and the acceptance rule with only what an outsider has (the public kit, the frozen object, the spec, the harnesses) and publish the break or the bound they reach. No outside review has run yet.</p>
<p>No hash has stayed free of chips forever. Igneum does not claim to. It states the gain its own model finds, the response takes a week, and both are measured. The model is public: <a href="/bench#counter-asic-2-0-the-numbers">the numbers</a>; the claim is tested by the in-house adversarial pass and the public benchmark. Monero has run on RandomX since November 2019; one chip shipped against it, Bitmain’s Antminer X5 (September 2023), a board of RISC-V chips at 1.46x per joule over a desktop CPU, on silicon believed mining privately from about 2021; RandomX v2 was released on 25 March 2026 with its mainnet activation pending. Bitmain opened Antminer X9 pre-orders on 26 December 2025 for July 2026 delivery, then withdrew the product in mid-May 2026 and refunded buyers before any unit shipped; none has been independently benchmarked. A box with about a 2x per joule edge over the best CPUs, and about 3x over a desktop, was withdrawn rather than face a RandomX re-tune of 1.5x or more. That is the band Igneum’s class v4 model sits in (2.1x to 3.4x over an RTX 5090), and the defence that held was a maintained algorithm with a credible upgrade path, which is what the ladder is.</p>
<p>No hash has stayed free of chips forever. Igneum does not claim to. It states the gain its own model finds and the response the rotation makes, and both carry their labels. The precedents, as sourced (nameplate and community tables, about 20 percent either way; every figure with its URL and date in the close): Monero has run on RandomX since November 2019, its rules stable since then and its programs varying per hash; one chip shipped against it, Bitmain’s Antminer X5 (September 2023), 46 months after the fork, at 6.37 J per kH at the wall against a stated CPU measurement, an observed comparison, not a ceiling. Bitmain opened Antminer X9 pre-orders on 26 December 2025 for July 2026 delivery, then withdrew the product in mid-May 2026 and refunded buyers before any unit shipped; none has been independently benchmarked. RandomX v2 was released on 25 March 2026 with its mainnet activation pending. Ethash ran 36 months to a first chip worse than a GPU; the iPollo V2H reads about 14x today. Kaspa ran 21 months to its first chip, at 167x to 725x. The commodity cohort Igneum protects is the discrete-GPU population; the Apple row is reported beside it, never as the headline.</p>
<p><b>The scoring rule and the harness.</b> The edge is the minimum over workloads of the maximum over free adversarial designs of the GPU’s joules per hash over the adversary’s, under four conditions: the 10 percent GPU-cost budget at the lock, the verifier limit, cross-vendor correctness and hardware accessibility. The rejected designs stand as negative controls with their measured rows: the long program, the select tree, the wide read, the scratchpad. The next programme: the connected-state experiment, the mixed integer and FP32 candidate, the multi-family programmable adversary; rotation is not expected to deliver the missing joule. <a href="https://git.igneum.network/igneum-network/igneum/src/branch/master/docs/design/class-v6-rotating-family.md">The scoring rules and every row, section 10</a>. <a href="https://git.igneum.network/igneum-network/igneum/src/branch/class-v5/docs/design/class-v5-harness/">The harness</a> and <a href="https://git.igneum.network/igneum-network/igneum/src/branch/class-v5/docs/design/class-v5-stored-state.md">its readings</a> (measured, 8 October 2026): the acceptance floor at 0.995 refuses nine of nine hot sets (0.9809 to 0.9919) and 2.435 percent of 4,600 drawn programs, 0 of 61 in the era reading (section 14); the attack families F8, F4, F9 and F1 pass, F8 with a residue of 61 of 64 (section 13); the attempts census and the attempt-3 read (section 0).</p>
<p>One thing takes a person, here and on every chain that exists: writing new code. A chain cannot safely write its own generator, and it cannot safely tell a chip from a wave of honest new cards by hashrate alone. If the design above ever failed, anyone could publish a new generator and miners would switch it on by signalling, as Monero's community can fork. Igneum is built to make that day unlikely, and does not depend on avoiding it.</p>
</section>
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<div class="tbl"><table>
<thead><tr><th>Lever</th><th>What it does</th><th>State, 5 Oct 2026</th><th>Measured</th></tr></thead>
<tbody>
<tr><td>1. Compiler race every hour</td><td>At every hourly program the worker compiles up to 17 variants of the kernel (unroll, load path, register budget, threads per block), checks each bit for bit against the base kernel, times each for 2 s with mining paused, and keeps the fastest for the hour. The hash never changes</td><td>Shipped in the Metal and CUDA workers</td><td>+17.3% on the genesis seed and +21.2% on the hourly seed, Apple M5 Max, Metal, 14 variants, under load, ratios only. The RTX 5090 race is built and not yet run</td></tr>
<tr><td>1. Compiler race every hour</td><td>At every hourly program the worker compiles up to 17 variants of the kernel (unroll, load path, register budget, threads per block), checks each bit for bit against the base kernel, times each for 2 s with mining paused, and keeps the fastest for the hour. The hash output is bit for bit the same</td><td>Shipped in the Metal and CUDA workers</td><td>+17.3% on the genesis seed and +21.2% on the hourly seed, Apple M5 Max, Metal, 14 variants, under load, ratios only. The RTX 5090 race is built and not yet run</td></tr>
<tr><td>2. Per-card auto-tune from the fleet</td><td>Every race writes a record to the fleet log. The best variant per card model is aggregated and sent back to every machine inside the signed update manifest, so a new card starts from the fleet's best and keeps racing</td><td>Shipped. The fleet is small, so no table yet</td><td>No fleet table yet</td></tr>
<tr><td>3. Hash per watt</td><td>Steps an NVIDIA card's power cap from 100% to 50% of its default in 10% steps, holds each for 60 s, and keeps the best MH per watt. The tile shows live MH per watt. The sweep never restarts the worker, so the hour's program is never lost</td><td>In the app for NVIDIA cards. AMD and Apple: not supported</td><td>The first sweep on a card is pending. The RTX 5090 drew 290 W at p95 under a 460 W cap, so the cap did not bind</td></tr>
<tr><td>4. Template latency</td><td>The miner subscribes to new templates instead of polling, the node builds the next template ahead, and the workers switch without draining the batch. Target under 50 ms from a new block to the card working on it, solo against the local node</td><td>In 0.3.6</td><td>Switched p50 46 to 52 ms, p90 118 to 130 ms, 3-node fast-time network, CPU miners, 0 rejected</td></tr>
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<p>Here are the limits, stated before anyone else states them.</p>
<ul>
<li><strong>A proof in seconds.</strong> Not at launch. Proving a full block today needs a cluster of 100 to 200 consumer GPUs, approximate, so Igneum launches with proofs within about a minute and tightens as hardware improves. Users still see their transaction land in one second.</li>
<li><strong>A chip is impossible.</strong> No. A chip wired for one program is a bad bet, because the program moves before it ships. A programmable chip is not stopped by the moving target: everything it needs is public at genesis and every drawn parameter is firmware to it (an address permute, a rotator, an immediate table), so the defence against it is the latency-shadow work (class v4) and the price per joule, not the schedule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane and 3.4x with one three times better, under class v4 from the first block: a memory-controller chip that stores the whole dataset and carries a GPU-class datapath beside its memory for the 100,000 ops per hash in the shadow, the range running from a chip core as costly per operation as a GPU lane (k = 1, modelled on the 5090’s measured watts at its knee, 7 October 2026) to a core three times better per operation (k about 0.33); the withdrawn Antminer X9’s claimed figure is a ratio against a CPU core, not a GPU lane, so it does not stand for a chip core against us; the ladder’s second rung takes that bracket to about 2.8x (modelled, 7 October 2026). Class v5 then makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item (designed, 7 October 2026). The baseline the work started from, never the launch state: without class v4 the same stored-dataset chip would reach 1.2x per chip and 5x to 9x per joule in our model (6 October 2026); the Ethash chips of this class reached 2.1x to 4.8x (Linzhi Phoenix 2020, Jasminer X4 2021, Antminer E9 2022). The strongest recompute chip we can price, holding the whole 256 MiB cache on-die, reaches under 1x per chip against an RTX 5090 (the published model, 5 October 2026: 0.92x per unit of silicon with a 3x fixed-function allowance, approximate). Sources: the chip model analysis (6 October 2026); the ASIC history’s Ethash rows; Counter ASIC 3.0 item 8 (the chip’s per-joule edge over the RTX 5090 falls from 5.6x to 2.1x on GDDR7 at k = 1 and to 3.4x at a core three times better, the 5090 at 0.2% less rate; gates G1 to G6 passed, 6 October 2026). No hash has stayed free of chips forever; Igneum does not claim to. Monero’s RandomX has held its miners on commodity hardware for about seven years: one chip shipped against it, Bitmain’s Antminer X5 (September 2023), at 1.46x per joule over a desktop CPU; the one announced beyond it, the Antminer X9, was withdrawn in mid-May 2026 before any unit shipped, its claimed core (k about 0.33) never measured; RandomX v2 was released on 25 March 2026 with its activation pending. That record says nothing about the price of a chip with the 256 MB cache on its die; that price is a cost model, not a measurement.</li>
<li><strong>A chip is impossible.</strong> No. A chip wired for one program is a bad bet, because the program moves before it ships. A programmable chip is not stopped by the moving target: everything it needs is public at genesis and every drawn parameter is firmware to it (an address permute, a rotator, an immediate table), so the defence against it is the latency-shadow work (class v4) and the price per joule, not the schedule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its security does not rely on identifying that hardware or retiring it through emergency changes. Class v6 adopts the 64-register window and retains it across every rotation. Current modelling places the strongest specialised designs assessed against the GPU tier at about 2.3x to 3.3x energy-efficiency advantage a node ahead (2.0x to 2.9x on the GPU's own node), a bracket that is approximate and provisional until the placed gated core rows land. The long-program and select-tree proposals were rejected. Economic resistance depends on development cost, deployment economics and productive hardware lifetime; family transitions receive an obsolescence benefit only where a loss of competitiveness is demonstrated; programmable multi-epoch designs are included in the assessment. The labels: the bracket modelled, approximate and provisional (the GPU side measured on the RTX 5080 and RTX 5090 at their core locks under class v4, 8 October 2026; the chip core synthesised on ASAP7 and scaled to N3, claimed, its placed gated row pending; its memory modelled). Class v5 makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item (designed, 7 October 2026). The strongest recompute chip we can price, holding the whole 256 MiB cache on-die, reaches under 1x per chip against an RTX 5090 (the published model, 5 October 2026: 0.92x per unit of silicon with a 3x fixed-function allowance, approximate). Sources: the class v6 close, section 10 (8 October 2026); the ASIC history’s Ethash rows; the chip model analysis (6 October 2026). No hash has stayed free of chips forever; Igneum does not claim to. Monero’s RandomX has held its miners on commodity hardware for about seven years: one chip shipped against it, Bitmain’s Antminer X5 (September 2023), an observed comparison, not a ceiling; the one announced beyond it, the Antminer X9, was withdrawn in mid-May 2026 before any unit shipped, its claimed core never measured; RandomX v2 was released on 25 March 2026 with its activation pending. That record says nothing about the price of a chip with the 256 MB cache on its die; that price is a cost model, not a measurement.</li>
<li><strong>A guaranteed income floor.</strong> No. External proving is a small market today. Igneum's miners' electricity cost in it is close to power, but the price they must charge is the subsidy they forgo, which falls as one over network hash: an edge at scale and nothing more.</li>
<li><strong>A memory-hard prototype on every vendor.</strong> Not yet. The 256 MB cache closed the shortcut on Apple silicon (computing items runs 4.8x slower than loading them, measured 3 October 2026). The same ratio on NVIDIA and on a discrete AMD card is Open.</li>
<li><strong>Finality in the first month.</strong> No. No checkpoint locks until the 30-day window has 30 days of history. The first month of mainnet is proof of work with a 12-hour depth, and the text above says so wherever a day count appears.</li>

3
site/miner.html
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@ -298,6 +298,7 @@ pre b{color:var(--molten-text);font-weight:500}
<div class="download-platform"><span class="osmark" data-os="hive" title="HiveOS"><svg viewBox="0 0 24 24" width="22" height="22" aria-hidden="true" focusable="false" fill="none" stroke="currentColor" stroke-width="1.7" stroke-linejoin="round" stroke-linecap="round"><path d="M12 2.6 20.2 7.3v9.4L12 21.4 3.8 16.7V7.3z"/><path d="M12 7.4 16 9.7v4.6L12 16.6 8 14.3V9.7z"/><path d="M12 7.4V2.6M16 9.7l4.2-2.4M16 14.3l4.2 2.4M12 16.6v4.8M8 14.3l-4.2 2.4M8 9.7 3.8 7.3"/></svg></span><div><h3>Ember for Linux and HiveOS</h3><p>a tarball for rigs and Hive flight sheets</p></div></div>
<p class="download-note">For the rig people. One tarball, the miner and the node inside, the same signed manifest as the desktop apps.</p>
<a data-dl="miner-hive" href="https://dl.igneum.network/public/igneum-miner-hive.tar.gz" class="btn primary"><svg class="icon" viewBox="0 0 24 24" aria-hidden="true"><path d="M12 3v12m-5-5 5 5 5-5M5 16v4h14v-4"/></svg>Download the tarball <span data-dl-meta="miner-hive" style="font-weight:400;opacity:.85">v0.3.22 · 28.8 MB</span></a>
<p class="fair" id="versions">Current versions: Windows <span data-rm="versions.miner-windows.version">0.3.20</span>, macOS <span data-rm="versions.miner-mac.version">0.3.20</span>, HiveOS <span data-rm="versions.miner-hive.version">0.3.22</span>, the wallet <span data-rm="versions.wallet-mac.version">0.1.5</span>; the node on Devnet 3 <span data-rm="source.node.version_string">igneumd/2.1.0-f8da7515</span>, <span data-rm="read_at_short">read 8 October 2026, 15:50 UK</span>. The machine-readable list, with every file’s SHA-256, is <a href="/release.json">/release.json</a>.</p>
<div class="hive-sheet" id="hive"><b>HiveOS Flight Sheet.</b> Miner: <b>Custom</b>. Installation URL: <code data-dl-url="miner-hive">https://dl.igneum.network/dl/public/igneum-hive-0.3.22.tar.gz</code>. Miner name <code>igneum</code>, wallet and worker <code>0x&lt;your 40-hex payout address&gt;.%WORKER_NAME%</code>. Hive itself is untested on our side: tell us what breaks.</div>
<p class="sha">sha256 <span data-dl-sha="miner-hive">8ad6dcef9edc57dcd33e8d5a97cbef5cdda0e384a6e56d3f62f8903029c4c764</span></p>
</div>
@ -335,7 +336,7 @@ pre b{color:var(--molten-text);font-weight:500}
</tbody>
</table></div>
<p class="fair"><b>Graphics cards only.</b> A new mining program every hour, so no chip is built for it. 80% of every block to the card that finds it, 20% to the cards that prove it. No premine, no stake, no fee to any team. Every number above has a row in <a href="/miners">the bench table</a>.</p>
<p class="fair">Your card against the strongest chip we can price: an RTX 5090 at 136 MH/s on 350 W (measured 6 October 2026); at launch the chip reaches 2.1x per joule under class v4 with a core as good as a GPU lane, 3.4x with one three times better (modelled on measured watts at the 5090's knee: the shadow costs that card 82 W at its best point, and Ember Tune lands the lock by itself), and under class v5 it is wrong on every item because the dataset is the chain’s own state (designed). Without class v4 it would be 5x to 9x. <a href="/litepaper#chip-model">The model and the measurements are public</a>.</p>
<p class="fair">Your card against the strongest chip we can price. Igneum remains competitive on accessible commodity GPUs even when specialised mining hardware is assumed to exist, remain compatible and seek profit; its security does not rely on identifying that hardware or retiring it through emergency changes. Class v6 adopts the 64-register window and retains it across every rotation. Current modelling places the strongest specialised designs assessed against the GPU tier at about 2.3x to 3.3x energy-efficiency advantage a node ahead (2.0x to 2.9x on the GPU's own node), a bracket that is approximate and provisional until the placed gated core rows land. The long-program and select-tree proposals were rejected. Economic resistance depends on development cost, deployment economics and productive hardware lifetime; family transitions receive an obsolescence benefit only where a loss of competitiveness is demonstrated; programmable multi-epoch designs are included in the assessment. The GPU side is measured: an RTX 5080 and an RTX 5090 at their core locks under class v4 (8 October 2026); the chip core is synthesised and claimed, its placed row pending; its memory is modelled. Under class v5 the chip is wrong on every item because the dataset is the chain’s own state (designed). <a href="/litepaper#chip-model">Every number with its label, the harness and the scoring rules</a>.</p>
</div>
</section>

2
site/provenance.html
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site/receipt.html
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@ -278,7 +278,7 @@
<li>The transaction hash is keccak256 of the raw signed transaction in the file, so the recipient, the amount and the data are the signed ones.</li>
<li>The transaction is a leaf of the including block's <code>hash_merkle_root</code> (BLAKE2b-256 keyed MerkleBranchHash up the path).</li>
<li>Every header from the including block to the certified checkpoint recomputes and links to the next by a direct parent.</li>
<li>The certificate over that checkpoint verifies: the aggregate BLS signature of the signers, the voter order, two thirds of active weight and 17/30 of total.</li>
<li>The certificate over that checkpoint verifies: the aggregate BLS signature of the signers, the voter order, two thirds of active weight and two thirds of total weight.</li>
</ol>
<p class="note">The payment receipt adds: the record's carrier block up to the checkpoint, the segment record's signature, the shard receipts roots hashing to the statement's commitment, the shard's receipts rebuilding that root with this transaction's receipt at its position. Not proven by either file: the voter table with weights comes from the node (spec 10.1), and the SP1 proof behind the statement is verified by nodes, not here. In the four words below: the inclusion receipt authenticates included and finalised, reports executed and claims nothing about proven; the payment receipt authenticates included, executed, proven and finalised under the trust assumptions stated.</p>
<!-- terms:start -->

243
site/release-manifest.json Normal file
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@ -0,0 +1,243 @@
{
"format": "igneum-release-manifest-v1",
"generated": "2026-10-08T15:55:00Z",
"read_at": "read 8 October 2026, 15:50 UK, from the Devnet 3 seed and the fleet census (the node lane), the download index and the ELF manifest",
"labels": {
"measured": "read from a running node, a binary or a record",
"designed": "in the specification or the design document, not yet carried by code on the live chain",
"modelled": "a model's figure",
"claimed": "stated by a third party, not measured here"
},
"network": {
"id": "igneum-devnet-3",
"name": "Igneum Devnet 3",
"kind": "developer network: resets without notice, its coins have no value",
"chain_id": 4464,
"chain_id_hex": "0x1170",
"chain_id_below_floor": 4463,
"chain_id_note": "4464 since the class v5 floor at DAA 68,400 (crossed 8 October 2026, 12:57 UK); 4463 from genesis to the floor; a transaction carries the id in force at its block",
"genesis": {
"first_block_utc": "2026-10-07T17:06:00Z",
"first_lock_utc": "2026-10-07T19:02:00Z",
"note": "every upgrade on from block zero: era VDF, finality v3, fees v1, proving v1, the latency ladder at rung 0"
},
"rpc": "https://rpc.devnet.igneum.network",
"explorer": "https://igneum.network/explorer",
"faucet": "https://faucet.igneum.network",
"vote_domain": "igneum-vote-v1/igneum-devnet-3",
"decimals": 8,
"block_target_seconds": 1,
"consensus_digest": "2066aa57505e5ecbd585d061364abb0032d5b5b29cc41c54f4b38cb81c2ba6eb",
"label": "measured",
"others": [
{
"id": "igneum-testnet-1",
"chain_id": 4462,
"chain_id_hex": "0x116e",
"rpc": "https://rpc.testnet.igneum.network",
"state": "armed: three seed nodes and the public RPC are up, nothing mines until the go word",
"genesis_hash": "87617621714af1bf33bd17f291f90a7e0bff760a669bba53083ea8c0f7cbd840",
"decimals": 18
},
{
"id": "igneum-mainnet",
"chain_id": 4461,
"chain_id_hex": "0x116d",
"state": "not started",
"decimals": 18
}
]
},
"source": {
"repository": "https://git.igneum.network/igneum-network/igneum",
"repository_note": "the public reference repository: the specifications, the igneum-pow crate, the simulators and the test material; the full node, the miner and the proving code open later",
"node": {
"fork_of": "rusty-kaspa v2.1.0 (01b532e8)",
"branch": "release-0.3.25-node",
"commit": "f8da7515",
"version_string": "igneumd/2.1.0-f8da7515",
"pin": "c9ad753a (the move of 8 October 2026, 15:25 UK)",
"pending": "acaf08b0, cut 15:43 UK, gates running, its move not yet named",
"label": "measured"
},
"pow": {
"crate": "igneum-pow",
"version": "0.2.0",
"commit": "1c420786",
"freeze": "class-v5-freeze 2026-10-07",
"tree_fingerprint": "cbc5bd0aa10585c8576e71e37a8ee47a045ae51754e9ddf749d0c21e6a535f88",
"binary_line": "igneum-pow fingerprint cbc5bd0aa10585c8 (the freeze)",
"below_floor": "017e7037 (class v4 sub-version 3, the audit-freeze-2026-10-07 tag) paired below the class v5 floor",
"label": "measured"
},
"app": {
"name": "Ember",
"channel": "devnet-3",
"note": "the shipped artefacts and their SHA-256 are the versions block; the app ships from the same repository"
}
},
"mining": {
"class": "v5",
"class_since_daa": 68400,
"class_at_genesis": "v4",
"class_note": "class v4 (the latency shadow, about 100,000 integer ops per hash at the ladder's rung 0) from block zero; class v5 (the dataset keyed by the chain's own state) from DAA 68,400",
"block_version": 1538,
"program": {
"epoch_daa": 3600,
"epoch_lead_daa": 601,
"vdf_minutes": 10,
"instructions": 64,
"loads_per_program": 16,
"lanes": 32,
"registers_per_lane": 8,
"dataset_reads_per_hash": 128
},
"dataset": {
"items_log2": 24,
"size": "1 GiB on the devnets (2^24 items at the genesis size)",
"keyed_by": "the execution state after the epoch's reference block (class v5)",
"cache": "256 MiB day cache (class v3 lineage)",
"growth": "no growth step is set on Devnet 3; the genesis-fixed schedule of spec 1.13.3 is a mainnet matter; class v6's step schedule (5.5 / 8.5 / 11.5 GiB) is a design on its branch, not live"
},
"ladder": {
"rung": 0,
"ops_per_hash": "about 100,000",
"move_rule": "90 percent of blue blocks in each of seven consecutive days, one rung at a time"
},
"label": "measured; the dataset growth line designed"
},
"finality": {
"rule": "v3",
"since_checkpoint_daa": 0,
"statement": "a checkpoint locks when the signers hold at least two thirds of active weight and at least two thirds of total weight; weight is blue blocks per vote key over a flat 30-day window of past-median time",
"checkpoint_interval_daa": 30,
"checkpoint_depth": 20,
"weight_window_seconds": 2592000,
"presence_window_seconds": 7200,
"dust": 5,
"presence": 20,
"aggregators": 8,
"ban_daa": 7200,
"certificate_fold_daa": 3,
"frozen_table": "the weight table is frozen at the last certified checkpoint on the selected chain (spec 03 Q5), active for every checkpoint from DAA 0 on Devnet 3",
"node_line": "Finality v2 (igneum-devnet-3): interval 30 depth 20 window 7200 DAA dust 5 presence 20 aggregators 8 ban 7200 fold 3; rule v3 from checkpoint DAA 0",
"label": "measured"
},
"proving": {
"verifier_in_consensus": "off",
"verifier_note": "proving v0: every producer verifies off the consensus path; consensus checks the record's statement against native execution and its signature; the in-consensus verifier switches on when the proven share of blocks reads one (ledger P21)",
"shard_market": "on from DAA 0: segment records of 8 blocks, unproven after 600 DAA, aggregator share 1,000 bps",
"proof_system": "SP1",
"sp1_circuit_version": "v6.1.0",
"sp1_crate_version": "6.8.1",
"pinned_at": "2026-10-05T16:20:38Z",
"shard_program_id": "0x2b1a81cb413236cf063077b46ed3111628f6c41036bcf6e23ee4cbbf5679ef7a",
"shard_elf_sha256": "0x150f4c05a2951fc56174a87089707a030b18df8fbe7e053a66459edb83053083",
"shard_vk_sha256": "0x8b4da5bff86d963f4210a78e5d800a1cd00ab41b158f6962f4ac009edc249d4c",
"aggregator_program_id": "0x474678f35f7545db28055d5e5bbc308231d84a5a072202087a2a8d5b09123896",
"aggregator_elf_sha256": "0x143d9c243dd12e87e90be71f6b8cd42353e513bf8ce78903ef6f972f1bc9aa7b",
"aggregator_vk_sha256": "0xad17bc1ae5be816554dbb13cb5b4d242678adfb8e1a4f7247ceb8b5ba9001b9f",
"manifest_file": "proving/igneum-prove/elf/manifest.json",
"label": "measured"
},
"fees": {
"subsidy_split": {
"miner_percent": 80,
"proving_pool_percent": 20,
"where": "consensus/core/src/igneum.rs 44"
},
"base_fee": {
"route": "burned in full, both gas dimensions (gas times the execution base fee, pgas times the proving base fee)",
"where": "igneum/exec/src/executor.rs 320 to 371"
},
"priority_fee": {
"miner_percent": 80,
"developer_percent": 20,
"note": "the developer part goes to the registrations of the contracts whose code ran, pro rata by each frame's gas; an unregistered frame's part is a burn",
"where": "executor.rs 335 to 339; pgas.rs 290"
},
"proving_fee_ceiling": {
"value": 90000,
"multiple": 4,
"note": "the proving-fee ceiling of the live object"
},
"external_jobs": {
"provers_percent": 90,
"burn_percent": 10,
"state": "designed, not in the code"
},
"dev_fee": {
"percent": 1,
"mechanism": "one block template in a hundred with the dev payout address, a counter, not a draw",
"default": "on",
"off": "--dev-fee 0, the app switch, DEV_FEE=0 on HiveOS; none in pool mode",
"where": "igneum/miner/src/main.rs 718"
},
"emission": {
"launch_rate_base_units_per_daa_second": 3168808781,
"year_one_ign": 1000000000,
"ramp_seconds": 2592000,
"ramp_start_percent": 10,
"halving_seconds": 63115200,
"cap_ign": 4000000000,
"tail": "none",
"where": "consensus/core/src/emission.rs 85 to 123; igneum.rs 34, 76"
},
"label": "measured in the code on Devnet 3; external jobs designed"
},
"versions": {
"miner-hive": {
"version": "0.3.22",
"file": "igneum-hive-0.3.22.tar.gz",
"sha256": "8ad6dcef9edc57dcd33e8d5a97cbef5cdda0e384a6e56d3f62f8903029c4c764",
"size": 28771228,
"url": "https://dl.igneum.network/dl/public/igneum-hive-0.3.22.tar.gz"
},
"miner-mac": {
"version": "0.3.20",
"file": "Igneum-Miner-0.3.20.dmg",
"sha256": "73796c5febc2050646f038c1f8c32a1d854033d125d0c02478b983ea8020419e",
"size": 44467804,
"url": "https://dl.igneum.network/dl/public/Igneum-Miner-0.3.20.dmg"
},
"miner-windows": {
"version": "0.3.20",
"file": "Igneum-Miner-Setup-0.3.20.exe",
"sha256": "45b2f3fb54f40f839cde8efac53b40eca3738a4009af1a4e356f6445883df6b5",
"size": 63025372,
"url": "https://dl.igneum.network/dl/public/Igneum-Miner-Setup-0.3.20.exe"
},
"wallet-mac": {
"version": "0.1.5",
"file": "Igneum-Wallet-0.1.5.dmg",
"sha256": "daf259f272934f0c1a8155ef68762c344164ae8a77c8d0621d0fceed0fb163fa",
"size": 20122390,
"url": "https://dl.igneum.network/dl/public/Igneum-Wallet-0.1.5.dmg"
}
},
"versions_updated": "2026-10-07T20:43:23Z",
"sources": {
"network": "docs/build/build.md (the Networks table); the node lane's read of build-1's seed",
"node": "docs/plans/release-0.3.22.md and the node lane's read; the version string from igneumd --version",
"pow": "packaging/pow-freeze.txt; the binaries' fingerprint line",
"finality": "docs/spec/03-finality.md 3.3; the node's start line",
"proving": "proving/igneum-prove/elf/manifest.json; docs/fud-ledger.md P21",
"fees": "site/economics.html (the file and line of every constant); site/lib/emission.mjs",
"versions": "site/downloads.json (dl.igneum.network's index)"
},
"read_at_short": "read 8 October 2026, 15:50 UK",
"proving_view": {
"read_at": "12:16 UK on 8 October 2026",
"read_daa": 65900,
"read_daa_note": "approximate: DAA seconds since genesis at 17:06 UTC on 7 October 2026, one a second",
"shards_paid_24h": 8209,
"ign_paid_24h": "9,913.09",
"prover_keys_24h": 29,
"shards_planned_24h": 40502,
"paid_per_hour": 905,
"lag_p50_daa": 514,
"lag_p90_daa": 953,
"source": "the observer's proof tables through /api/explorer?proving=1, the proving page",
"label": "measured"
}
}

4
site/vercel.json
View file

@ -37,6 +37,10 @@
"source": "/address/:addr",
"destination": "/address"
},
{
"source": "/release.json",
"destination": "/release-manifest.json"
},
{
"source": "/benchmarks",
"destination": "/miners"

1
tools/ci/checks.txt
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@ -9,6 +9,7 @@ no founder name, personal login, earlier business or personal address in any tra
every check in tools/ci/checks.txt has its run line here and every run line is listed (a conflict resolution cannot drop a check unseen; self-test first)
site build (in a temporary copy here, in place only inside GitHub Actions)
internal link check of site/*.html
the release manifest: site/release-manifest.json parses, its versions are downloads.json's, its proof ids the ELF manifest's, /release.json served, every data-rm span on a committed page carries its value
every served page carries the slim bar (mark, Mine, Network, Learn, Download) with every route in its panels and the sheet (self-test, then the tree)
vendor marks: site/lib/marks.mjs is brand/marks/vendor-marks.mjs byte for byte (the app and the site draw one set)
the phone menu opens and is seen at 390 px on every page (self-test first; needs the box or CI browser, says so without one)

11
tools/ci/ledger-text-check.mjs
View file

@ -14,8 +14,9 @@ const REQUIRED = {
['X2', 'Public testnet: not yet open; the devnet build is here for people who want to look'],
['X7', 'hello@igneum.network'],
['X31', 'The public testnet is armed: three seed nodes and the public RPC are up, and it opens on the go word.'],
// 7 Oct 2026, 18:3x: the launch-first chip line of docs/plans/counter-asic-3-public-text-2026-10-07.md section 1
['X35', 'At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane, 3.4x with one three times better, under class v4 from the first block'],
// 8 Oct 2026, afternoon: the class v6 close's served sentence (docs/design/class-v6-rotating-family.md 10.0h), verbatim
['X35', 'a bracket that is approximate and provisional until the placed gated core rows land'],
['X35', 'its security does not rely on identifying that hardware or retiring it through emergency changes'],
],
'litepaper.html': [
['X3', 'Live rows arrive with the public testnet.'],
@ -25,9 +26,9 @@ const REQUIRED = {
['C2', 'Monero has run on RandomX since November 2019'],
['X34', 'was withdrawn in mid-May 2026 before any unit shipped; RandomX 2.0 shipped on 25 March 2026'],
['X36', 'Bitmain opened Antminer X9 pre-orders on 26 December 2025 for July 2026 delivery, then withdrew the product in mid-May 2026 and refunded buyers before any unit shipped; none has been independently benchmarked.'],
['X35', 'so the launch number is the class v4 row'],
['X35', '3.4x with a core three times better per op (k about 0.33); no core below about 1.8 pJ per op is in the model’s range'],
['X36', 'the withdrawn Antminer X9’s claimed figure is a ratio against a CPU core, not a GPU lane, so it is not a chip core against us'],
['X35', 'Class v6 adopts the 64-register window and retains it across every rotation.'],
['X35', 'The long-program and select-tree proposals were rejected.'],
['X36', 'an observed comparison, not a ceiling'],
['M34', 'The work that waits can grow.'],
['M2', 'computing items on the fly runs 4.8x slower than loading them'],
['M4', 'ProgPoW, as KAWPOW on Ravencoin since 2020'],

5
tools/ci/link-check.mjs
View file

@ -23,6 +23,9 @@ function resolves(target) {
return candidates.some(c => existsSync(c) && statSync(c).isFile());
}
// a literal vercel.json rewrite (no :param) resolves to its destination (/release.json -> /release-manifest.json, 8 October 2026)
const rewrites = Object.fromEntries((JSON.parse(readFileSync(join(site, 'vercel.json'), 'utf8')).rewrites || []).filter(r => !r.source.includes(':')).map(r => [r.source, r.destination]));
const resolvesOrRewritten = (p) => resolves(p) || (rewrites[p.replace(/[?].*$/, '')] != null && resolves(rewrites[p.replace(/[?].*$/, '')]));
for (const page of pages) {
const html = readFileSync(join(site, page), 'utf8');
const ids = new Set([...html.matchAll(/\sid="([^"]+)"/g)].map(m => m[1]));
@ -34,7 +37,7 @@ for (const page of pages) {
checked++;
if (t.startsWith('#')) { if (t.length > 1 && !ids.has(t.slice(1))) broken.push(`${page}: fragment ${t}`); continue; }
const [path, frag] = t.split('#');
if (!resolves(path)) { broken.push(`${page}: ${t}`); continue; }
if (!resolvesOrRewritten(path)) { broken.push(`${page}: ${t}`); continue; }
if (frag) {
const rel = path.replace(/[?].*$/, '').replace(/^\//, '');
const file = [join(site, rel), join(site, `${rel}.html`), join(site, rel, 'index.html')].find(c => existsSync(c) && statSync(c).isFile());

1
tools/ci/pre-push.sh
View file

@ -107,6 +107,7 @@ never_push_checks() {
tree_checks() {
run "site build (in a temporary copy here, in place only inside GitHub Actions)" site_build
run "internal link check of site/*.html" node tools/ci/link-check.mjs
run "the release manifest: site/release-manifest.json parses, its versions are downloads.json's, its proof ids the ELF manifest's, /release.json served, every data-rm span on a committed page carries its value" node tools/ci/release-manifest-check.mjs
run "every served page carries the slim bar (mark, Mine, Network, Learn, Download) with every route in its panels and the sheet (self-test, then the tree)" bash -c 'node tools/ci/site-nav-check.mjs --self-test && node tools/ci/site-nav-check.mjs'
run "vendor marks: site/lib/marks.mjs is brand/marks/vendor-marks.mjs byte for byte (the app and the site draw one set)" cmp brand/marks/vendor-marks.mjs site/lib/marks.mjs
run "the phone menu opens and is seen at 390 px on every page (self-test first; needs the box or CI browser, says so without one)" node tools/site/sheet-test.mjs --self-test

50
tools/ci/release-manifest-check.mjs Normal file
View file

@ -0,0 +1,50 @@
// Release manifest check (8 October 2026, an accepted external review): site/release-manifest.json is served at /release.json
// and is the one source of the chain's identity, sources, class, finality rule, proof ids, fees and versions on the status
// pages. This holds it together: the manifest parses and carries every block; its versions are the download index's; its
// proof ids are the ELF manifest's (when the tree carries it); vercel.json serves it at /release.json; every <span data-rm>
// on a committed page carries the manifest's value; and no forbidden string is in it.
// node tools/ci/release-manifest-check.mjs exit 1 listing every fault
import { readFileSync, existsSync, readdirSync } from 'node:fs';
import { join, dirname } from 'node:path';
import { fileURLToPath } from 'node:url';
const root = join(dirname(fileURLToPath(import.meta.url)), '..', '..');
const site = join(root, 'site');
const fails = [];
const m = JSON.parse(readFileSync(join(site, 'release-manifest.json'), 'utf8'));
for (const k of ['format', 'generated', 'read_at', 'network', 'source', 'mining', 'finality', 'proving', 'fees', 'versions', 'sources']) if (!(k in m)) fails.push(`manifest: no "${k}" block`);
if (!/^\d{4}-\d{2}-\d{2}T\d{2}:\d{2}:\d{2}Z$/.test(m.generated || '')) fails.push('manifest: "generated" is not an ISO UTC date');
if (m.network?.chain_id !== 4464 || m.network?.chain_id_hex !== '0x1170') fails.push('manifest: Devnet 3 chain id is 4464 (0x1170)');
if (!/two thirds of active weight and at least two thirds of total weight/.test(m.finality?.statement || '')) fails.push('manifest: the finality statement must say two thirds of active and two thirds of total weight');
if (m.proving?.verifier_in_consensus !== 'off') fails.push('manifest: the verifier is off in consensus (ledger P21) until that row moves');
const dl = JSON.parse(readFileSync(join(site, 'downloads.json'), 'utf8'));
for (const [k, v] of Object.entries(dl.files)) {
const w = m.versions?.[k];
if (!w) { fails.push(`manifest: versions.${k} missing (in downloads.json)`); continue; }
for (const f of ['version', 'file', 'sha256', 'size']) if (w[f] !== v[f]) fails.push(`manifest: versions.${k}.${f} is ${w[f]}, downloads.json says ${v[f]}`);
}
if (m.versions_updated !== dl.updated) fails.push(`manifest: versions_updated ${m.versions_updated} is not downloads.json's ${dl.updated}`);
const elfp = join(root, 'proving', 'igneum-prove', 'elf', 'manifest.json');
if (existsSync(elfp)) {
const e = JSON.parse(readFileSync(elfp, 'utf8'));
for (const [a, b] of [['shard_program_id', e.shard.program_id], ['shard_elf_sha256', e.shard.elf_sha256], ['shard_vk_sha256', e.shard.vk_sha256], ['aggregator_program_id', e.aggregator.program_id], ['aggregator_elf_sha256', e.aggregator.elf_sha256], ['aggregator_vk_sha256', e.aggregator.vk_sha256], ['sp1_circuit_version', e.sp1_circuit_version], ['sp1_crate_version', e.sp1_crate_version], ['pinned_at', e.pinned_at]])
if (m.proving[a] !== b) fails.push(`manifest: proving.${a} is ${m.proving[a]}, the ELF manifest says ${b}`);
}
const vercel = JSON.parse(readFileSync(join(site, 'vercel.json'), 'utf8'));
if (!(vercel.rewrites || []).some(r => r.source === '/release.json' && r.destination === '/release-manifest.json')) fails.push('vercel.json: no rewrite /release.json -> /release-manifest.json');
const value = (p) => { const v = p.split('.').reduce((o, k) => (o == null ? undefined : o[k]), m); return v === undefined ? undefined : (typeof v === 'number' && !/_id$/.test(p) ? v.toLocaleString('en-GB') : String(v)); };
let spans = 0;
for (const f of readdirSync(site).filter(f => f.endsWith('.html'))) {
const html = readFileSync(join(site, f), 'utf8');
for (const [, p, text] of html.matchAll(/<span data-rm="([a-z0-9_.-]+)">([^<]*)<\/span>/g)) {
spans++;
const want = value(p);
if (want === undefined) fails.push(`${f}: data-rm="${p}" names no manifest value`);
else if (text.replace(/&amp;/g, '&').replace(/&lt;/g, '<') !== want) fails.push(`${f}: data-rm="${p}" carries "${text.slice(0, 60)}", the manifest says "${want.slice(0, 60)}" (rebuild the site)`);
}
}
if (spans < 10) fails.push(`only ${spans} data-rm spans on the committed pages; the status pages read the manifest`);
const raw = readFileSync(join(site, 'release-manifest.json'), 'utf8');
for (const pat of readFileSync(join(root, 'tools', 'ci', 'forbidden-strings.txt'), 'utf8').split('\n').filter(l => l && !l.startsWith('#')))
if (new RegExp(pat).test(raw)) fails.push(`manifest: forbidden string ${pat}`);
if (fails.length) { console.error(`release-manifest check: ${fails.length} fault(s)\n ${fails.join('\n ')}`); process.exit(1); }
console.log(`release-manifest check: manifest ${m.generated}, ${Object.keys(m.versions).length} platform versions match downloads.json, proof ids match the ELF manifest, /release.json served, ${spans} data-rm spans carry the manifest's values`);