Counter ASIC 3.0 status: the gh switch owned by the attack-pass lane and the rule to every lane, the Intel fix on master (66192d65), the pairs on the pin, class-v5 a55fcc10 and the rebuilt kit (65b47211), the AMD grid prepared, the AP-F8-1 record line (3fe56509) and the card-in job, the in-house pass's last landing (9649f51e), the attack-pass tail (6ce6aabb), the signal-15 hook note

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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>

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docs/plans/counter-asic-3-status.md

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