Class v6: lane C's drawn-era re-read of the sound per-load form (254 of 256 at 0.819; the 16 x 27 form dead on both instruments; eras spread the bit-0 refusals); the hash lane's two F8-256 attributions on layer 4's bucket-bound row (both tests carried, labelled estimate)

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>

docs/design/class-v6-rotating-family.md

@@ -150,7 +150,7 @@ Every test the generator applies to a candidate program is today a function of t
 |---|---|---|---|---|
 | (c''') the distinct-item ratio floor | 0.995 over the 64 units at the genesis width and mixer | the same floor evaluated with the era's width (a 16-byte load touches one item too) and dataset size; 2.435 percent of candidates under it today, attempts +3.4 percent | class-v5 section 14 (measured census of 4,600 candidates) | a candidate below 0.995 on the exemplar seed 100767 is refused |
 | F8's uniformity (the largest 64-line bucket within 6 sigma over 2^28 derivations; the top 0.1 percent of items within 1.2x of the window model over 2^24 nonces on 64 seeds) | a gate run by hand per class on the attack board | run by the census tool per era draw at genesis (the band's corners plus 64 random eras) and by the node's acceptance as the per-site version below; a draw whose corner fails is excluded from the band | f8-uniform.md section 7: +4.84 sigma against the control's +4.18, PASS; the tail p4, p8, p10, p34 attributed this morning as per-site bucket concentration at a narrow-window site | the `quarter-lines` and `const-item` plants fire at +75.97 and +92,682 sigma (f8-uniform.md 2.1) |
-| The per-site largest-bucket bound (this morning's attribution) | named for a next class | per load site, the largest 256-item bucket over the units' addresses, stated in SIGMA against its own window's Poisson expectation, never as a ratio: ratios of 2.2 to 2.4 at full-window sites are the CLEAN maximum (65,536 Poisson(16) buckets read +4.4 sigma), so a ratio bound would refuse clean programs; lane D's rebuild carries the sigma column | AP-F8-1's tail: p10 1.50x, p8 1.38x, p34 1.25x, p4 1.22x, each a narrow-window site's bucket; the sigma figures from lane D's family-gate.md (17:00 UK) | the four tail seeds must be refused on sigma; the 60 passing seeds accepted |
+| The per-site largest-bucket bound (this morning's attribution) | named for a next class | per load site, the largest 256-item bucket over the units' addresses, stated in SIGMA against its own window's Poisson expectation, never as a ratio: ratios of 2.2 to 2.4 at full-window sites are the CLEAN maximum (65,536 Poisson(16) buckets read +4.4 sigma), so a ratio bound would refuse clean programs; lane D's rebuild carries the sigma column | AP-F8-1's tail: p10 1.50x, p8 1.38x, p34 1.25x, p4 1.22x, each a narrow-window site's bucket; the sigma figures from lane D's family-gate.md (17:00 UK). **Two F8-256 attributions in hand (the hash lane, 14:0x UK, labelled estimate): p212 (the attack-pass lane, the gate's line) is site 9's bucket concentration at 1.75x its window expectation with 0.019 bits short, and p225 (the hash lane's run on the 1c420786 crate) is a value-level concentration at a mad-written site with the bucket at expectation and full entropy; so a per-site bucket bound at about 2x, which catches all four of the morning's tail (3.1x to 5.6x), catches neither: p212 sits under 2x and p225 has no bucket signature. Layer 4 carries both tests: adv-cache-2's value-level bias test (the item histogram's top against the window model per site) is the one that sees p225, and a bucket bound would need to sit near 1.5x to take p212 at a clean-seed cost now put at 3 to 6 percent rather than 1 to 3 (the clean spread's buckets read up to about 1.5x on the sites read today); the generalised era-level uniformity test is unchanged** | the four tail seeds must be refused on sigma; the 60 passing seeds accepted; p212 and p225 the two cases the bucket bound alone misses |
 | The value-level bias test (adv-cache-2; the research file's 20.2b) | named for a next class | per load site, the one-count of every index bit over the 64 units within 6 sigma of n / 2 (the per-load prototype's `BiasedIndexBit`, built last night, measured as the record); AS A TEST ONLY AFTER the index fold of layer 1 is in, because on today's `load_index` it would redraw about 40 percent of epochs (lane D: 7 of 16 drawn eras at abs z 130 to 511); with the fold in, the test is the guard that the fold holds | a product's low bits at P(bit 0) = 1/4 placed at address bit R by the stride rotation; 6 of 16 drawn eras over 1.04x, 14 of 17 eras flagged by the instrument on the pre-amendment generator | a program whose site is sourced by a product under an era with R under 28 is refused; the devnet era's R = 29 is not relied on |
 | The duplicate-lane test (the research file's 20.2a) | built for the per-load class only | kept as a per-load-only test unless a drawn block shape ever places shadow work between loads (layer 1 does not: the block shape is the size, the placement stays after instruction 63) | 1,482 duplicate lanes on the per-load record, 0 to 2 on every sound class | the per-load candidate 0 is refused |
 
@@ -267,7 +267,7 @@ The wording this lane proposes for main's word, if the SRAM-store reading stands
 
 | Layer | What it is | The chip rows | The card cost | Status |
 |---|---|---|---|---|
-| 5. The shadow placed per load, in its sound form (`mx8+shl4096x1`: one pass of a 256-instruction sub-block after every load, the same 4,096 shadow instructions per iteration as class v4) | the capex lever of the research file's section 16.2: the chip's core sits inside every read's dependency, so controller and core share one N5-class die or an interposer | the project about USD 60 M against 30 M, the break-even cap about USD 200 M against 100 M (modelled); `k` unchanged | measured on build-1 (10:4x UTC, this crate): 234 of 256 seeds accept within 32 attempts at 0.927 rejection per candidate (P(exhaust at 256) about 4e-9); the verifier 8.28 to 8.82 ms on core 40 with core 88 loaded against 8.33 to 8.63 for class v4's shape; **the 5090 rows MEASURED (the hash lane's v6 job, 11:14 to 11:20 UTC, every pack PASS at both states): mx8-genesis 137.65 MH/s at 312.2 W unlocked and 127.39 at 212.6 W at 1,300 (0.599 MH/W); class v4's shape mx8_sh256x27 137.62 at 464.6 and 126.99 at 296.8 (0.428); the sound per-load form mx8_shl4096x1 135.99 at 428.6 and 126.08 at 271.8 (0.464); mx8_shl2304x3 135.85 at 483.6 and 125.88 at 303.4 (0.415). The rate within 1.3 percent of the control on both forms; the premium over class v3: shl4096x1 116.4 W unlocked and 59.2 W at the lock against the whole block's 152.4 and 84.2, so at class v4's instruction count the one-pass per-load form costs the 5090 24 percent LESS unlocked and 30 percent less at the knee (the 16-instruction block effect of 6 October, now with a sound construction); shl2304x3 (three passes of 2,304) costs 19 W MORE unlocked and 6.6 W more at the lock than the whole block, so the saving is the one-pass shape, not the placement**; the Apple footprint of a 4,096-line block owed (the 1,024-line block cost the M5 Max 17 percent on 6 October) | a candidate class; the 16 x 27 iterated form stays dead (20.2a-close of the research file, corrected to the no-era figure) |
+| 5. The shadow placed per load, in its sound form (`mx8+shl4096x1`: one pass of a 256-instruction sub-block after every load, the same 4,096 shadow instructions per iteration as class v4) | the capex lever of the research file's section 16.2: the chip's core sits inside every read's dependency, so controller and core share one N5-class die or an interposer | the project about USD 60 M against 30 M, the break-even cap about USD 200 M against 100 M (modelled); `k` unchanged | measured on build-1 (10:4x UTC, this crate): 234 of 256 seeds accept within 32 attempts at 0.927 rejection per candidate (P(exhaust at 256) about 4e-9); **under DRAWN ERAS (lane C's re-read on 0ab27582, build-2, 14:0x UK: 256 seeds each under igneum-era-test/<seed mod 16>, every candidate through igneum-pow accept, the 32-attempt cap; the no-era sweep re-run on the same binary beside it) the sound form accepts 254 of 256 seeds at 0.819 per candidate, mean accepted attempt 4.3 (P(exhaust at 256) about 10^-22), the no-era row on the same binary 234 of 256 at 0.927; mx8+shl2304x3 254 of 256 at 0.811 (no-era 224 at 0.935); every form with a sub-block of 36 or more instructions reads 0.80 to 0.84 under eras; the iterated 16 x 27 form 66 of 256 at 0.991 under eras and 128 of 256 at 0.979 no-era, dead on both instruments; class v4's own shape through the same binary 256 of 256 at 0.666 under eras and 0.682 no-era, so the rows sit on one instrument. Eras read better for the per-load forms because no-era 1,563 of 2,329 of the sound form's bias refusals name index bit 0 (the product's quarter law at the load's source) and under an era the odd stride multiplier and the rotation R spread that bit across bits 0, 3, 6, 10, 15, 17, 19 and 22 at a third of the count; what remains is the dataflow rule the research file's 20.2 asks for, not the placement; zero window-bit refusals. Logs with lane C's 15:00 cut under `docs/analysis/class-v6/logs/` (census-0ab27582-none.tsv, census-0ab27582-era.tsv); the Apple footprint of the 4,096-line block still owed;** the verifier 8.28 to 8.82 ms on core 40 with core 88 loaded against 8.33 to 8.63 for class v4's shape; **the 5090 rows MEASURED (the hash lane's v6 job, 11:14 to 11:20 UTC, every pack PASS at both states): mx8-genesis 137.65 MH/s at 312.2 W unlocked and 127.39 at 212.6 W at 1,300 (0.599 MH/W); class v4's shape mx8_sh256x27 137.62 at 464.6 and 126.99 at 296.8 (0.428); the sound per-load form mx8_shl4096x1 135.99 at 428.6 and 126.08 at 271.8 (0.464); mx8_shl2304x3 135.85 at 483.6 and 125.88 at 303.4 (0.415). The rate within 1.3 percent of the control on both forms; the premium over class v3: shl4096x1 116.4 W unlocked and 59.2 W at the lock against the whole block's 152.4 and 84.2, so at class v4's instruction count the one-pass per-load form costs the 5090 24 percent LESS unlocked and 30 percent less at the knee (the 16-instruction block effect of 6 October, now with a sound construction); shl2304x3 (three passes of 2,304) costs 19 W MORE unlocked and 6.6 W more at the lock than the whole block, so the saving is the one-pass shape, not the placement**; the Apple footprint of a 4,096-line block owed (the 1,024-line block cost the M5 Max 17 percent on 6 October) | a candidate class; the 16 x 27 iterated form stays dead (20.2a-close of the research file, corrected to the no-era figure) |
 | 6. The register-file width drawn per era in {8, 16, 32} | the link tax on layer 5: 4.5 to 9 TB/s of die-to-die traffic closes the interposer branch (modelled, the link figures approximate) | forces the single die | about 0 rate on every card by the occupancy arithmetic (unmeasured) | research |
 | 7. Warp-uniform data-dependent block selection (B drawn sub-blocks, one selected per iteration by a warp-folded register, no divergence) | moves the FPGA lane only (a per-program bitstream must carry every block) | nothing against the `f = 1` chip | B capped by the Apple compile footprint | research |
 | The reserve ordered by hardware orthogonality inside layer 3 | shfla first, the int8 tile last | section 4.2's order | | taken |