Counter ASIC 3.0 status: the 9070 XT bench row on master (the AMD watts no longer owed), the hot-table ldcs rows (a dead lever; the hot family latency-bound), the PC 1 list main set closed on measured rows

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Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>

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docs/plans/counter-asic-3-status.md

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