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Counter ASIC 3.0 status: the gate run opened on mx8+sh256x27 (the project lead 16:50 UTC), the gate table

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igneum-labs 2026-10-06 15:38:44 +00:00
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docs/plans/counter-asic-3-status.md
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@ -164,6 +164,23 @@ Judged on measurements against the six gates of `docs/plans/counter-asic-2-rollo
So: one class v4 candidate, `mx8+sh256x27`, defined and measured on the hash's own numbers, with gates G1 (AMD), G2, G3 (Metal runs), G4, G5 and G6 still to run before any publish, by the two-publish rollout of 2.0 and a `program_class_v4_activation_daa` at tip + 14,400.
### 5a. The gate run (the project lead, 16:50 UTC: "3.0 run it now"; opened 16:5x UTC)
No publish, no manifest, nothing on the live devnet; PC 2 one job at a time with the installed app untouched; the Mac's miner stays paused. Two lanes: the hash side (branch ca3-v4-hash: G1 Metal, Apple OpenCL and CUDA, G2, G3 and the verifier benchmark; one PC 2 job first) and the node side (branch ca3-v4-node and the fork worktree igneum-node-ca3v4 from release-0.3.13-node: the v4 switch through igneum-pow, the fork, the workers, the miner and the app, then G4, G4b, G6 with `--features igneum-pow`, G5; its PC 2 jobs after the hash lane's). G1 AMD rides in PC 1 job 1 on "go PC 1 AMD". Evidence lands in docs/plans/counter-asic-3-gate/.
| Gate | What | State | Evidence |
|---|---|---|---|
| G1 | bit-exact v4 on every vendor against the Mac reference (2^24 fingerprint, self-test) | RUNNING: Metal, Apple OpenCL, CUDA (PC 2); AMD waits on PC 1 | |
| G2 | the CPU verifier exact on 1,024 random hashes per card | RUNNING (Mac; the 5090 in the same PC 2 job); AMD waits on PC 1 | |
| G3 | the soundness suite green on the class (crate suite; Metal fuzz, edge, stats, determinism) | RUNNING | |
| Verifier benchmark | ms per warp on one core, v2 / x8 / v4 in one session, gate 10 ms | RUNNING | |
| G4 | the fast-time 3-node network across a v4 activation (class-v4.mjs), plus the known-failed case | WAITING on the node change | |
| G4b | a real Metal miner across a v4 boundary through --prepare-packs | WAITING on the node change | |
| G5 | the PC-built Windows workers and the Mac workers from the same commit, sha256s | WAITING | |
| G6 | the node suites on PC 2 with --features igneum-pow, from a fork branch off the current release tip | WAITING | |
The per-tier cost line of the candidate (item 8, measured): the 5090 -0.2 percent of rate at 350 to 431 W (a rig about 23 percent more electricity), the M5 Max -1.5 percent at 21 to 37 W, pool users nothing, the verifier +0.17 ms per warp; the 9070 XT and the 4070 rows land with the PC 1 jobs. The one line for the project lead is written when every gate has a colour.
## 6. Decisions for the project lead
1. The public claim. "Under 2x" is true of the recompute chip per chip at the op budget and false of the stored-dataset chip per joule (item 1). Nothing on the site or in the litepaper changes from this run; the two drafts below are for the project lead's decision, with the rows that bound them.