From 6de6185a24fb4ae8d260739612d9bb12a656e41c Mon Sep 17 00:00:00 2001 From: igneum-josh <337424239+igneum-josh@users.noreply.github.com> Date: Wed, 7 Oct 2026 11:17:34 +0100 Subject: [PATCH] Counter ASIC 3.0 status: AP-F1-1's fraction set at 3.0 percent by the v5 lane --- docs/plans/counter-asic-3-status.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/plans/counter-asic-3-status.md b/docs/plans/counter-asic-3-status.md index da74663c8..d896957df 100644 --- a/docs/plans/counter-asic-3-status.md +++ b/docs/plans/counter-asic-3-status.md @@ -347,7 +347,7 @@ The cryptanalysis brief's rank-3 question (a weak-key class in the day's rotatio ### AP-F1-1, the shadow redundancy bound (the attack-pass lane, 7 October, 12:3x UK): PASS against v4, a class v5 rule -Over 100,000 class v4 programs the shadow block's peephole-removable instructions (a register written twice from one source with no write between) average 0.62 percent of the 256 per pass, maximum 5.078 percent, 1 in 100,000 over 5 percent; nothing crosses a pass; clang -O3 removes the same instructions from the honest kernel, so it is a bound on the shadow's useful work, not a chip shortcut (`docs/analysis/attack-pass/f1-shadow.md`). Consequence per tier: nothing for any miner or chip; the chip model is unmoved. The rule for the next class (sent to the v5 lane with F1's harness on 64 seeds as the gate; v4 untouched): the generator refuses a shadow block whose honest-compiler simplification exceeds a fraction set from the census (a 5 percent bound rejects about 1e-5 of draws, 3 percent about 4e-3) and redraws. +Over 100,000 class v4 programs the shadow block's peephole-removable instructions (a register written twice from one source with no write between) average 0.62 percent of the 256 per pass, maximum 5.078 percent, 1 in 100,000 over 5 percent; nothing crosses a pass; clang -O3 removes the same instructions from the honest kernel, so it is a bound on the shadow's useful work, not a chip shortcut (`docs/analysis/attack-pass/f1-shadow.md`). Consequence per tier: nothing for any miner or chip; the chip model is unmoved. The rule for the next class (sent to the v5 lane with F1's harness on 64 seeds as the gate; v4 untouched): the generator refuses a shadow block whose honest-compiler simplification exceeds 3.0 percent (the v5 lane's fraction, 4af21977: the bins from 3.0 percent up hold 384 of 100,000 draws, about 4e-3, under one attempt lost per 250 seeds, inside the 2.0 rule's bounds) and redraws from the next stream values; it lands in generator.rs behind the v5 class once ca3-v4-amend is merged into class-v5. ## 8. Close