From 381a5745ab69fe83dec3d269692c62c2c2ca9d06 Mon Sep 17 00:00:00 2001 From: igneum-labs <337424239+igneum-labs@users.noreply.github.com> Date: Wed, 7 Oct 2026 18:42:47 +0000 Subject: [PATCH] class v5 page, section 13: the kit rows closed by branch v5-kits (every host uploads the leaves; Metal and Apple OpenCL read 82b19cbde8557ea5 at 18:34Z under the measure lock; the kit zip packs-ca3-v5-20261007T183921Z sha256 e6c088bb...; the NVIDIA, AMD and Intel runs asked of their lanes) Co-Authored-By: Claude Fable 5.1 --- docs/design/class-v5-stored-state.md | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/docs/design/class-v5-stored-state.md b/docs/design/class-v5-stored-state.md index df6a3edd9..055eaa8c7 100644 --- a/docs/design/class-v5-stored-state.md +++ b/docs/design/class-v5-stored-state.md @@ -264,10 +264,11 @@ Every item of this page that has no code, no test or no measurement yet, with th | The weak-day FPGA rule (AP-F4-1, NAF sum at least 163, at least 4 distinct rotations) | NO code, NO test: recorded in section 11 with the rule text; lands in `memhard.rs` `MixParams::with_shape` behind the v5 class (the mixer draw redrawn from the next stream values), with the known-failed case (the worst calendar day 29,337 at 1.121x redrawn) and the per-day rejection count (6.1e-4) | this lane | 3 | | The shadow-redundancy rule (AP-F1-1, 3.0 percent) | NO code, NO test: recorded in section 11 with the fraction; lands in `generator.rs` beside the shadow draw behind the v5 class (a block whose peephole-removable share exceeds 3.0 percent redrawn), with the known-failed case (the census's 5.078 percent block redrawn) | this lane | 3 | | The attack-pass families on v5 (F1, F4, F8's 64-seed gate at 2^24 with the 1.2x line, F9's exhaustion count) | NOT run on v5; the harnesses exist on branch attack-pass for v4 | attack-pass lane; this lane hands it the v5 stream (`--program-class v5 --state`) and the pinned pack | 4 (its) | -| The kit for every platform: Metal | the kernel text is emitted (the leaf buffer on `igneum_build`); the Metal pack bench takes `leaves.bin` as of 19:0x UK (this commit); the one-click worker's Metal host (`proto-metal/main.swift`) does NOT yet upload the leaves | this lane (packbench), the worker lane for main.swift | 2 | -| The kit: CUDA | the kernel text emitted and measured on the 4090 through `proto-newpow/class-v5/bench.cu` (section 7); the one-click NVRTC host (`proto-cuda/nvrtc`) does NOT yet upload the leaves | worker lane | 2 | -| The kit: OpenCL (AMD), Intel | the kernel text emitted; no host, no run | worker lane (host), fleet or PC 1 (the 9070 XT run) | 3 | -| Fingerprints equal across platforms, G1 on the 5090 and the Mac, AMD and Intel after | the 4090 pack fingerprints are in (section 7); the Mac's Metal fingerprint is the clock reading below; the 5090 (PC 2) and AMD rows owed | this lane (Mac), the fleet and PC lanes (5090, 9070 XT) | 2 | +| The kit for every platform: Metal | done (branch `v5-kits`, 7 October 2026, 19:3x UK): `proto-metal/main.swift` `servePackDataset` reads `leaves.bin`, checks the pack's count and FNV-1a 64, binds buffers 2 and 3 as `packbench.swift` does, self-tests the dataset head and last word against `vectors.json` and drops the leaf buffer after the build; a v5 prepare and job served on the M5 Max at 18:37:32Z | kits lane | 0 | +| The kit: CUDA | done (`v5-kits`): `packfile.h` reads `IGNEUM_STATE_LEAVES`, the FNV, file, root and block (generator 5 = class v5; a v5 pack without the count or another class with one is refused), `pf_load_leaves` reads and checks `leaves.bin`; `worker.cpp` uploads it (`cuMemcpyHtoD`) for `igneum_build(ds, cache, leaves, nLeaves, nItems)` and frees it after; the CPU emulation runs `--check` on v5-dn3-epoch0: PASS on igneum-build-1 at 18:40:52Z (cache FNV 7334fa46e5d972eb, dataset head, word [268435455], 64 samples, 96 of 96 lanes); the loader test carries the class v5 cases known-failed first (46 ok) | kits lane | 0 | +| The kit: OpenCL (AMD), Intel | host done (`v5-kits`): `proto-opencl/host.c` sets the build arguments for both kernel shapes in one place and uploads the leaves in `--bench-pack`, `--serve` and the compiled-in bench (the host reference derives words from the same leaves); the Linux and Windows workers are in the kit zip; the 9070 XT and B580 runs owed through the Counter ASIC coordinator (`tools/class-v5/pc1-amd-v5-bench.ps1`, expected 82b19cbde8557ea5) | coordinator (PC 1 queue), the B580's holder | 1 | +| Fingerprints equal across platforms, G1 on the 5090 and the Mac, AMD and Intel after | v5-dn3-epoch0 reads 82b19cbde8557ea5 on Metal (packbench, 18:34:47Z, 14.163 MH/s GPU time) and on Apple OpenCL (the kit host `--bench-pack`, 18:34:59Z, 15.265 MH/s wall), both under the Mac's measure lock, cache FNV and vectors PASS; the fleet 5090 or 4090 row asked of the fleet lane (`tools/class-v5/fleet-cuda-v5-bench.sh`, the kit's Linux NVRTC worker and `bench.cu`); AMD and Intel owed as the row above | fleet lane (NVIDIA), coordinator (AMD, Intel) | 1 | +| The kit zip | `igneum-build-1:/srv/artefacts/packs/packs-ca3-v5-20261007T183921Z.zip`, sha256 e6c088bb34fecdc3ff297dbb06438a14ade7d8c55273357726d28f7a1334a25e, 919,129 bytes, 56 files (v4-genesis, v5-genesis, v5-dn3-epoch0 with `leaves.bin`; `bin/linux` and `bin/windows` NVRTC and OpenCL workers; sources; the two bench scripts; SHA256SUMS), built by `tools/class-v5/kits-remote.sh` on build-1 at 18:41:15Z after the loader test and the emulation check | kits lane | 0 | | The crossing on Devnet 3 by height after its gate | NOT started: the floor in the Devnet 3 override, the Devnet 2 style gate (zero rejected across the flip, exec roots agreeing, every node holding the epoch's stream); the harness's flip case is the rehearsal (PASS twice) | node lane (a283f5f0d364ceef0) owns the fork, the shipper (ae892a8b0f78fe31c) the cut; this lane the gate's v5 checks | 3 | | Miner cost rows per card (5090, M5 Max, 9070 XT, 4070) | the 4090 row only (rate equal within 0.01 percent, build +0.24 ms); the four named cards owed, each labelled measured with the date | fleet (5090, 4070), this lane (M5 Max under the lock), PC 1 (9070 XT) | 3 | | The exec snapshot wire carrying the day streams (a proof-synced node's trusted-data path) | NO code: the executor persists nothing of the captures across a restart and the p2p snapshot carries none | node lane | 3 |