1.5x lab: the first cohort cells and the X10 measured cell on the table, sets v2 and v3, the X10 facts of record (8a.1), the scoreboard rulings of the fourth to sixth reviews (8c), the bundle (8d), the 4 GiB rule (8e)
Documents only; nothing on the devnet touched. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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@ -15,9 +15,12 @@ docs/analysis/class-v6/1p5x/lab/README.md on the box mirror's master; the live t
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hash in BOTH conventions, cold-verification cost per unit), and an id: controls `ctl-v6`, `ctl-progpow-094`, `ctl-fishhash`,
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`ctl-coop-arx`; search candidates `cand-<nn>`.
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- The frozen v6 control (`ctl-v6`): tree 1a938abe4 (branch class-v6, source fingerprint 5f4d6dc6…), signing object
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2a1d6caab4c24564, dataset policy 70a6c703 (4 GiB), the research pairing hl-v6-all 0x9d40978601a7df2a (kernel fingerprint
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59e6708e46f1e87c), the l8off kit c20999d1… with the CUDA worker 218ca414…; 256 random reads per hash over 4 GiB, 62,120 ALU
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instructions per hash (102,612 in the counted-op convention), layer 8 ON.
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2a1d6caab4c24564 AT 2^30 WORDS = 4 GiB (dataset policy 70a6c703): the pack x1-ctrl-ds30.tgz 7606c13d (its read-only twin
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x1-ctrl-ds30-readonly.tgz 7629ed95) under build-1:/srv/artefacts/lab/controls/frozen-v6/ (CONTROLS, 12:2x UK on main's
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correction), run by the l8off kit's worker (kit c20999d1…, CUDA worker 218ca414… Windows / 9bfcf728… Linux) or the gen-6 Linux
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worker 804a6f7f…; 256 random reads per hash over 4 GiB, 62,120 ALU instructions per hash (102,612 in the counted-op
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convention), layer 8 ON. The 1 GiB research pairing hl-v6-all 0x9d40978601a7df2a (kernel fingerprint 59e6708e46f1e87c) serves
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the fingerprint cross-check row only; no 1 GiB figure is ever a cohort row of ctl-v6.
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- The work unit is energy per ACCEPTED work. For v6 and like-for-like candidates: joules per hash at equal difficulty. For a
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changed work unit (ProgPoW, FishHash, any proof-carrying unit): an accepted-work equivalence (lottery contribution per unit at
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an equal security budget) written by CONTROLS or SEARCH and approved by LAB before any number is served; raw hashes per
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@ -61,6 +64,11 @@ lab's rules. Every figure's software, pack, card, clock and boundary are pinned
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wall_w=<x|BLOCKED> nj_per_hash=<x> nj_twin=<x|none> f=<x|none> fingerprint=<16 hex> check=PASS|FAIL twin_addr=PASS|FAIL|none
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spread_pct=<x> utc=<start>..<end>`, the worker's own RESULT line beside it verbatim; the nvidia-smi samples in the job folder;
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the folder tarred to build-1:/srv/artefacts/lab/<cand id>/<pod>/ with SHA256SUMS; rows.jsonl beside it with the same fields.
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11. Power-capped pods (COHORT's finding, 12:17 UK): on a host whose card runs at a vendor power cap the twin reads f near 1 and is
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meaningless (the card spends the saved ALU power on clock and reads the same watts), so f is read only on uncapped cards; the
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gate refuses capped hosts for the f cells; a capped row stands as a named capped row (`cap_state=capped` and the cap in the
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row) and its f is credible only where the card did not reach its cap (watts under the cap in the row). Every rented pod today
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refuses `-lgc`, so every cohort row is stock and the knee rows are the house record's until a pod that locks is found.
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10. The P03 cost line per candidate and card: rate and joules per accepted work as percent of the paired frozen v6 at the same
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state (the budget: at most 5 percent joules and 2 percent throughput for a like-for-like change, read at the knee where a
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lock exists, else at stock).
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@ -225,6 +233,34 @@ rest of the ALU mix is dropped), so the twin's address stream equals the full ke
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<kernel sha>` without a trace instrument; the same ruling covers ctl-v6 (the X7 twin, kernel 93a6a5ce): `twin_addr=none` is accepted
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on the control rows and no instrument is built before the first candidate.
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### 8a.1 X10 facts of record (12:2x UK)
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- The readwidth fact (CONTROLS): the frozen v6 reads ONE 32-bit word per load site and never folds the sector. Proof lines in the
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l8off kit's packs/hl-v6-all (program.json 9eec9e325a820c16, program.h bfd9230e231ffb2c, kernel_bound.cu 77cabb0602ee7ad5):
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program.h `IGNEUM_LOADS_PER_HASH 128`, `IGNEUM_WIDE_LOADS_PER_HASH 0`, `IGNEUM_LOAD_WIDTH_COUNTS { 16, 0, 0 }`; kernel_bound.cu
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line 115 a 4-byte `ds[...]` xor into one register; the reg64c mirror repeats each site: 256 executed loads per hash, 1,024 bytes
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consumed of the 8,192 bytes of 32-byte sectors the memory system moves. The read-width rows of record (the first rig's 5090 at the
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1,300 lock, 8 Oct): W = 4 words 2.29 uJ per hash, W = 8 2.55 (+11 percent), W = 16 4.09 (+78 percent). So X10's premise (the
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card moves a sector and consumes 4 bytes of it) is true of record, and folding the sector costs the card's ALU (+11 percent at
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8 words on that row).
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- The fault of record in the Sector reference as written (SEARCH): the sector index reads lane registers 0 and 1; the fold writes
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dst = (load x 8 + k) & 63, so registers 0 and 1 are rewritten only every eighth load; 7 of every 8 loads re-read the same sector
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(every fixture's lane-0 trace: two fresh addresses, then six repeats); about 16 distinct dependent sector addresses per lane-hash;
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the other 102 loads are L1 or L2 hits on the card and free on a chip. The author's split (memory 35 / fold 55 / tax 10) and the
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10 percent budget rest on 118 real misses. Evidence scratchpad/lab/x10-sector/cuda/fixtures.txt (columns 5 to 12), hash.ts lines
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95 to 112. RULING: cand-x10 is built and measured bit-exact to the reference as written (its own row, labelled "16 real misses");
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cand-x10b is main's ratified address rule (load n reads the two registers the previous load's fold wrote last; zero repeats in
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every trace), measured beside it; both kits under build-1:/srv/artefacts/lab/cand-x10/kit/ (sector.cu 16417ce6, run-x10.sh;
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VARIANT=x10b for the corrected one) and cand-x10b/. The CUDA kernel is bit-exact with the reference on all 18 fixtures (a rented
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4090, 11:11 UTC; 112 registers, no spills).
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- The accepted-work contract for X10, APPROVED by LAB: the lottery unit is the warp digest; the column comparable to the frozen
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v6's joules per hash is joules per LANE-WORK (per digest over 32); both are printed on every row; the P03 budget and every ratio
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are read per lane-work; the ratio is unit-independent while both sides use the same unit; the security-budget line (energy per
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lottery draw at an equal target) is printed beside it per the units rule (8c.2).
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- The first X10 rows (SEARCH, a rented 4090 at stock, SCREEN until COHORT's paired rows): 118 loads 810 to 845 nJ per lane-work
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(25.9 to 27.0 uJ per digest) at 264 to 275 W; 64 loads 567 nJ per lane-work at 294 W; a tenth of v6's 8,091 nJ on the same card
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class, which is the cache hits of the fault, not a design gain.
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## 8b. The coexistence table (the founder, 12:0x UK; the scoreboard's headline beside the energy ratio; ADVERSARY's job, due with the controls this afternoon)
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The outcome the founder has set is COEXISTENCE: GPU owners remain competitive, no lasting overwhelming supplier advantage, no
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@ -252,6 +288,85 @@ The table's file: scratchpad/lab/adv/<cand id>-coexistence.json beside the desig
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object per adversary row with its assumptions) and the lane's README section; LAB carries the four verdict cells (one per
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adversary row at USD 0.10) on TABLE.md beside the score, the full table in the landed README.
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## 8c. Scoreboard rulings (the founder's fourth and fifth reviews, through main, 12:5x and 13:1x by main's clock; binding on every served or committed sentence)
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1. Labels: every ratio names its adversary (the same-node DRAM board, the stored-half hybrid, the N2 SRAM die, the node-ahead
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board), its column (energy, capital, cost ratio), its clock state (knee or stock), the card and the set version; never a blended
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figure.
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2. The coexistence table's last column is "cost ratio" (the chip's all-in cost per TH over the GPU owner's electricity-only cost
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per TH), never "margin". A revenue column: the block reward times the token price under growing, flat and falling scenarios, as
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revenue per accepted work in each algorithm's OWN units (the units rule, CONTROLS), never raw terahashes across algorithms.
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3. "All three tested tariffs" (USD 0.05, 0.10, 0.15 per kWh), never "every electricity price"; the tariff at which the two curves
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meet is stated per row (the reviewer's linear read on ctl-v6's board row: about USD 0.33 per kWh).
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4. "No fleet size reaches break-even" appears only with its fleet, amortisation and revenue rows shown.
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5. Two phases per adversary (board, hybrid, die), with the development cost both recoverable and sunk. Phase A, before investment:
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can the maker recover its spend under growing, flat and falling demand with realistic hardware sales. Phase B, after investment
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with the spend sunk: the ongoing cost per TH on both sides (the chip's electricity, hosting and maintenance itemised: of the
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chip's USD 0.265 per TH at ten cents about 0.043 is electricity, the other 0.222 itemised as capital, design or recurring), the
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realised contribution against revenue, who exits first as difficulty rises, GPU participation and supplier concentration over
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time.
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6. The SRAM die stays a live opponent in both phases; where it is called implausible the row names the assumption that fails.
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7. The NEW-BUYER column: a new card's capital plus electricity against the chip's, per tier, with the indifference point; under
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each growth schedule with the chip's memory capital scaling with the set (4, 8, 16 GiB) against a card buyer who already holds
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16 to 32 GB, and the set size at which the chip's capital per MH/s meets the card's. The USED-CARD column: a 4090 and a 3090 at
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today's used prices (source stated), resale retained at 24 months, the chip's resale zero after a program-draw change. No
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sentence about supplier advantage appears before the new-buyer column exists; ADVERSARY's first result (12:1x): the new buyer
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picks the chip on every row and tier (the board 0.24x to 0.43x a new card's all-in at ten cents; the die 0.04x; indifference at
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USD 9.7 per MH/s on the 5090 knee, 10.5 on the 5080, 5.4 on the 5090 stock, 2.6 on the 4090; the only hold the project share
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below about 13,500 boards sold).
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8. The card's random-read headroom (COHORT with CONTROLS; the lab's most important physical row, the only lever on phase B): the
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achieved sector reads per second on v6 (rate x 256) per cohort card against that card's random-activation bound from its memory
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timing (channels, banks, tRC) and against the chip's 148 MH/s on the same memory kind; if the card sits well under its bound the
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miner-side lever is more loads in flight per core (software pipelining across lane-hashes, occupancy, batch shape) and SEARCH
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cuts a worker variant that measures it: a faster card at the same price is the direct answer to the chip's USD 14 per MH/s.
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9. The approved wording, verbatim, until the two-phase rows exist: "The current model finds that existing GPU electricity costs
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are below the assessed DRAM-board specialist's all-in costs at the tested tariffs and stated lifetime assumptions. This supports
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a conditional entry-deterrence result. It does not yet establish post-deployment competitiveness, viable GPU replacement or new
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entry, or coexistence against the modelled SRAM fleet at sufficient scale. Those outcomes remain separately assessed."
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Withdrawn everywhere: "the winning outcome is met", "only one design decision remains", "no lasting supplier advantage", "no
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other GPU chain has this written down" (the last needs a comparative review of what other chains publish: a row of the table,
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NOT RUN until done). The sentence the rows support today: a DRAM-board chip can be built and does not undercut a card its owner
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already has; the store-on-die chip is the residual, held by the growth schedule.
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10. The 4 GiB proving cap defined precisely on the record: which of the mining state, the proof-generation allocation, the
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verifier requirement or the advertised hardware profile it limits (CONTROLS states it from the proving manifest and the record;
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ADVERSARY the economics).
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11. (the sixth review, 12:3x UK) The revenue column splits revenue by hardware: a GPU earns the mining share plus the proving
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share of the block reward (the ratified split from the Token Value volume on master, D01 to D06 and TV-04, taken from the
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documents by path and sha, never invented), a hash chip the mining share only; phase B (spend sunk) is recomputed with that
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split for the board, the hybrid and the die, with the proving share at which the chip's operating advantage over the GPU
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disappears at ten cents; the row is labelled NOT LIVE until a shipped package runs a prover (today the HiveOS package mines
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only; proving turns on at 24 GB) and a shipping row is open for it.
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12. (the sixth review) The per-epoch tuple rotation (bytes folded per line, register-window depth, shuffle distance, chosen from a
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committed list and published one epoch early) is costed by ADVERSARY as versatility tax on the programmable core (what it
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adds to the chip's shadow and what it costs the card) beside the hourly and weekly draws, and is NOT scored as a defence
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against the programmable adversary; the lab's measured X10 verdict (31 against 31.6 nJ per read, 5.8x against 5.4x on the same
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4090) is the answer to the review's rule 2 and the growth rows the answer to its rule 3.
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13. A SCREEN cell under 1.5 (the first: cand-x10 at 520k ALU on set v3, 1.03x with the card assumed equal to v6) is never served
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as a result; it is a measurement order (SEARCH builds the point, COHORT measures it paired with v6, the P03 line decides
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before the ratio).
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Owners: ADVERSARY 2 to 7, 10's economics, 11 and 12; CONTROLS the units rule and 10's definition; COHORT 8 with CONTROLS; LAB the
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wording, the layout and the labels.
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## 8d. The founder's lab bundle (14:00 UK with the measured controls)
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build-1:/srv/artefacts/lab/founder-bundle-<stamp>.zip, built by /srv/artefacts/lab/make-bundle.sh (no identity text: no names,
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logins, rig names or the zone word; the script greps every text file and refuses on a hit): the interface, the scoreboard with the
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coexistence table and its assumptions, the adversarial set v2 design notes and the placed rows, the frozen-v6 control kit with the
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4 GiB packs and sidecars, the cohort rows, the controls' rows, the X10 record; the path and sha256 to main.
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## 8e. The 4 GiB rule and the post-deployment lever (main, 12:3x UK)
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CONTROLS measured the live 4 GiB signing object (x1-ctrl-ds30, 2^30 words) at 13.16 MH/s on a rented 4090 at stock against 31.28
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for the 1 GiB research pack on the same card and session (3.4 against 7.9 G dataset reads per second on the same memory). Rules:
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(1) the 4 GiB figure is the one every scoreboard row carries from now; every 1 GiB row is relabelled research and is never a cohort
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cell; (2) the decider (COHORT, one session per card: the 1 GiB pack, the 4 GiB pack, both twins, ABBA, the dataset words on every
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row), then the cause read directly (the worker's occupancy and loads in flight at 4 GiB from its RESULT line; CONTROLS' pure-read
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kernel at 1, 2 and 4 GiB in steps against the card's page size and L2 TLB coverage; the layer-8 window shape over 2^30 words),
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then the first worker-side fix the cause names (SEARCH: larger pages or a different allocation, more independent lane-hashes in
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flight per warp, a window shape that keeps the page set hot), measured as a pair against the frozen worker on the same card with a
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bit-exact fingerprint, the gain in MH/s per card and the new nJ per hash; (3) one line to main at the decider, one at the cause,
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one at the first fix pair. Recovering the loss halves every card's USD per MH/s at no gain to the chip: it is the phase B lever.
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## 9. The lane briefs, one line each
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- CONTROLS: the four controls as rows of the table: `ctl-v6` from the record and re-measured on the cohort; `ctl-progpow-094`
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@ -1,52 +1,75 @@
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<!-- the landed copy of the lab's candidate table at this landing; the live table is scratchpad/lab/TABLE.md on the LAB lane's Mac -->
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# The 1.5x laboratory candidate table (LAB; current as of 12:1x UK 9 October 2026; the interface: scratchpad/lab/INTERFACE.md)
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# The 1.5x laboratory candidate table (LAB; current as of 12:2x UK 9 October 2026 by `date`; the interface: scratchpad/lab/INTERFACE.md)
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Score = the WORST comparison over the cohort (same node and one node ahead), the candidate's GPU energy per accepted work over the
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lowest credible specialist energy for the same work (section 3 of the interface). The working scope since 11:5x UK (section 8a):
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the same-node board is the energy claim; the die and node-ahead chips are coexistence rows. The coexistence table (section 8b) is
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the headline beside the score. PASS is never written here. Every chip figure is a WITNESS (E_D) unless marked BOUND or CLAIMED.
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Energies in nJ per hash unless stated.
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lowest credible specialist energy for the same work (interface section 3). The working scope since 11:5x UK (8a): the same-node
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board is the energy claim; the die and node-ahead chips are coexistence rows. The coexistence table (8b, under the rulings of 8c) is
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the headline beside the score. Every ratio names its adversary, column, clock state, card and set (8c.1). PASS is never written
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here. Every chip figure is a WITNESS (E_D) unless marked BOUND, CLAIMED or SCREEN. Energies in nJ per hash (per lane-work for X10).
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| id | kind | tree and packs | resource line | cohort rows (board power; wall BLOCKED on every rented pod) | adversary rows (adv-set v1, instruction convention, complete machine) | worst score (band) | coexistence (section 8b) | status | next move (owner, clock UK) |
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The approved claim wording (8c.9), verbatim: "The current model finds that existing GPU electricity costs are below the assessed
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DRAM-board specialist's all-in costs at the tested tariffs and stated lifetime assumptions. This supports a conditional
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entry-deterrence result. It does not yet establish post-deployment competitiveness, viable GPU replacement or new entry, or
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coexistence against the modelled SRAM fleet at sufficient scale. Those outcomes remain separately assessed."
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## The controls and candidates
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| id | kind | tree, packs, kits | resource line | cohort rows (board power, stock on every rented pod, lock refused everywhere; wall BLOCKED; median of three) | adversary rows (set v2, instruction convention, complete machine) | worst score (band), labelled | coexistence (8b under 8c) | status | next move (owner, clock UK) |
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|---|---|---|---|---|---|---|---|---|---|
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| ctl-v6 | control (frozen) | 1a938abe4; hl-v6-all 0x9d40978601a7df2a (fp 59e6708e46f1e87c); signing 2a1d6caab4c24564; l8off kit c20999d1, worker 218ca414; COHORT's set: the X7 kit's gen-6 worker f5f3846c, pack x1-ctrl-ds30 (0x2a1d6caab4c24564) | 4 GiB dataset, 256 reads per hash, W = 1 (4 B of a 64 B item; CONTROLS to confirm the readwidth fact of record by 12:30), 62,120 instructions (102,612 counted), state class, layer 8 ON | record: house 5090 knee 4,011 / stock 5,842 (report 05f00bd8, enclosure caveat); rented 5090 stock 6,470; rented 4090 stock 8,091 with twin 6,899 (f 0.853). IN FLIGHT (COHORT, from 11:49): 5090 x2, 4090 x2, 3090 x2, 5080 x2 rented pods, three timed runs per pack per state with the twin, rows 12:1x to 12:3x. AMD and Intel: NOT RUN "no rented card; the house rigs unreachable by software" (hourly retry, next 12:4x) | v1 (ADVERSARY 12:0x, commit 0344ec150 on class-v6-adversary; the calibration reproduces X0 5b: 1,706 vs 1,707 nJ on the v0 board, the die 511 vs 513): a_same 353 (277 to 463; the N2 die with the sized and fused lane), a_ahead 286; the cheapest DRAM board 1,558 (fused lane) = 2.57x (2.04 to 3.00) same node, 2.68x a node ahead, USD 8.91 per MH/s against the card's 30.6; ProgPoW's premise column 1.01x to 1.02x (f 0.908). The fused tail (0.6 of the row) is CLAIMED until the routed arxf lanes land (about 12:4x) | on the 5090 knee numerator only, set v2 (12:0x; the routed arxf lanes: 1.87 pJ per fused add-rotate-xor triple on an 8-register window, WITNESS): the board (the claim column) 2.60x (2.06 to 3.02) same node, 2.70x ahead, a = 1,543 nJ with the split memory 527 / ALU 167 / tax 849 (the chip's largest term is its tax: 35 W claimed static and controller at the activation-bound 68 MH/s plus PSU, VRM, cooling and host; a chip that lifts its rate dilutes it and the ratio RISES, so 2.60x is the chip's worst case); the card's split memory 3,642 / compute 369 / tax 0; ProgPoW's premise 1.01x to 1.02x; the die a_same 337 nJ = 11.9x (coexistence row). RE-RANK from v0: 2.35x to 2.60x. NOT the lab's score until the cohort rows are in | ctl-v6, set v2 (WITNESS; a 100,000-machine fleet, a 24-month straight-line life, design USD 35 M for the board chip and USD 300 M for the N2 die, the card sunk at USD 30.6 per MH/s on v6 at the knee, 15.7 of record beside it; scratchpad/lab/adv/ctl-v6-coexistence.json): the same-node board, edge 2.60x, chip capital USD 14.04 per MH/s (die 0.34, memory 5.42, board 3.15, design 5.13), GPU electricity-only 0.056 / 0.111 / 0.167 USD per TH at 0.05 / 0.10 / 0.15 per kWh against the chip's all-in 0.244 / 0.265 / 0.287: COEXISTENCE HOLDS at every price (4.4x / 2.4x / 1.7x), no fleet size breaks even at 0.10; the stored-half hybrid, edge 3.80x, USD 9.17: holds 2.9x / 1.6x / 1.1x; the N2 die, edge 11.9x, USD 1.59: PUSHED OUT at every price (0.5x / 0.3x / 0.2x) once the fleet passes 14,300 dies at 0.10; the node-ahead board, edge 2.70x: holds 4.4x / 2.4x / 1.7x. Reading: on v6 the GDDR7 board's capital per MH/s carries coexistence, not the energy ratio; only the reticle die at a fleet above 14,000 pushes the GPU owner out | NOT RUN (cohort in flight: the 4090b pod re-rented at 12:1x, the rest in their timed runs; adversary v2 in; CONTROLS pinned ctl-v6 at build-1:/srv/artefacts/lab/controls/frozen-v6/ with sidecars and the 4090 self-tests PASS) | COHORT: the eight rows 12:3x; ADVERSARY: the routed fused lanes 12:4x, the coexistence table this afternoon; LAB: the worst-cohort score within an hour of the last row |
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| ctl-progpow-094 | control | CONTROLS to pin: the official ProgPoW 0.9.4 reference from source with its test vectors (kawpowminer master a proxy only); ADVERSARY's v1 rows use the KAWPOW census as the proxy until the pin | CONTROLS to state (its own equivalence contract before any number); 16 KB per hash of DRAM traffic (ADVERSARY) | NOT RUN (the record's 4090 stock row 6,920 used by ADVERSARY as the numerator) | v1 (proxy): a_same 526 (417 to 873; near-memory in HBM3 base dies, fused lane) = 13.2x (7.9 to 16.6) vs the 4090 at stock, a_ahead 447 = 15.5x, USD 4.95; the cheapest DRAM board 1,614 = 4.29x (3.50 to 5.22) same node, 4.51x ahead, USD 6.89 against 29.7; the board bandwidth-bound at 16 KB per hash (93 MH/s per board; the 11:3x conventions row corrected: 2,003 nJ at USD 6.89, 3.45x on the same core); recomputation from the 85 MB cache 60 to 80 uJ, never credible; ProgPoW's premise column 1.1x to 1.2x (no twin) | on the 4090 stock numerator, proxy: the board 4.29x (3.50 to 5.22) same, 4.51x ahead; the die 13.2x. NOT the lab's score: the pinned 0.9.4 build, the cohort rows and a twin pending | NOT RUN | NOT RUN (proxy rows only) | CONTROLS: the pinned build, the test vectors read back, the equivalence contract, by 15:00; COHORT rows 15:00 with a read-only twin for the premise column; ADVERSARY re-prices on the pinned object |
|
||||
| ctl-fishhash | control | CONTROLS to pin: Iron Fish's implemented GPU design (the reviewed version named by commit); ADVERSARY read cpp/FishHash.cpp | 32 iterations x 3 fetches of 128 B = 96 random reads over a fixed 4.83 GB dataset, about 9,400 lane-instructions of 64-bit multiply-add and FNV (ADVERSARY's read) | NOT RUN (COHORT's card row owed) | v1: a_same 162 (128 to 225; three N2 reticles, fused lane), a_ahead 155, USD 0.35; the cheapest DRAM board 1,044 (872 to 1,251), 124 MH/s per board bandwidth-bound, USD 4.78; 95 percent of the board's energy is the memory path | waits on COHORT's card row (6.2x per uJ of card energy at a; 0.96x per uJ at the board) | NOT RUN | NOT RUN | CONTROLS: the pinned build and the equivalence contract by 15:00; COHORT's card rows 15:00 (the ratio follows within the hour) |
|
||||
| ctl-coop-arx | control and candidate | CONTROLS: the cooperative ARX kernel (lanes on one 256 B entry per fetch, every byte consumed, the arithmetic feeding the next address) plus the CPU reference, by 14:00 | target: the card's non-ARX energy share f at or under 14.8 percent (the screen R = 1 / ((1 - f) / 1.3 + f / 13)); spills, sync, generation and finalisation counted; ADVERSARY's parametric form: 64 coalesced 256 B fetches | NOT RUN (the card MODELLED by ADVERSARY: 35 nJ per coalesced read, 8.5 pJ per ARX instruction at the knee, both CLAIMED pending COHORT) | v1 (parametric, at 1.6 M ARX per hash, f 0.14): the board 1.35x (0.80 to 2.07) against the un-improved programmable core, 1.72x against the sized register file, 2.59x (1.94 to 3.41) against the fused add-rotate-xor lane, 3.19x a node ahead; a_same 5,024 (near-memory, fused) = 3.15x; USD 13 to 15 per MH/s against 15.7: the one control where the chip's hardware per MH/s approaches the card's | SCREEN only (the card modelled): 2.59x board same node on the fused lane, 3.19x ahead; the ranking turns on the measured ARX instruction cost (6.2 marginal to 11.8 pJ at the knee moves it 0.7x to 1.4x of nominal) | NOT RUN | NOT RUN (SCREEN) | CONTROLS 14:00; COHORT card rows (f, J per hash, stock and knee where a lock holds, 4090 and 5090) 15:00; ADVERSARY redesign on the measured rows 16:00; LAB reading 16:00 |
|
||||
| cand-x10 | candidate (the founder's third review, 11:5x UK; the scoped same-node board claim; interface section 8a) | SEARCH: the full-sector fold object exactly as reviewed (it enters the search system as a corner through the +labw weight table), CPU reference + CUDA kernel by 14:00, the kit and the trace 14:30 | 4 GiB dataset; dependent 32 B sector loads, every byte folded (32-bit MAD, XOR, shifts); 64 loads to start, the count set by the 10 percent joules budget on the locked 5090; 64-register window; a 32-lane shuffle every four ops; no mul64, division, wide permute or matmul; the 0.995 address-share floor; the verifier one warp under 10 ms | NOT RUN (the frozen denominator: locked 5090 and 5080, a 4090, one AMD card; v6 and X10 paired; COHORT's pair-mode harness ready for the kit at 14:30) | set v2 pre-pricing with the CARD MODELLED (ADVERSARY 12:0x; COHORT's X10 row replaces the card side): cand-x10-sector (118 dependent fully folded 32 B loads per lane-hash; the card modelled at 1,900 nJ, memory-bound: 118 x 14 nJ all-in plus 8,500 instructions at 5.9 to 11.8 pJ plus the floor share): the same-node board 634 nJ (553 to 798) = 3.00x (2.38 to 3.44), 3.03x ahead; the split chip memory 243 / fold 22 / tax 369 against the card's 1,650 / 70 / 180; the fold gap 1.2x to 3.9x by core; the die 73 nJ (26x) and node-ahead as coexistence rows. X10 at 130k / 260k / 520k ALU with the card = v6 by the reviewer's construction: the board 4.67x / 2.89x / 1.63x (1.27 to 2.06) same node, 5.52x / 3.56x / 2.08x ahead | SCREEN: the board 3.00x at 118 loads, 1.63x (1.27 to 2.06) only at 520k ALU, with the card modelled; the lab's verdict line waits on COHORT's measured X10 row (the measurement settles it, not the model). ADVERSARY's reading: folding every byte does not move the board under 1.5x; the fold is 3 to 4 percent of either side; the memory path decides (X7) | set v2 at USD 0.10 (card modelled): the board holds 2.2x; the die pushed out above 5,800 dies | SCREEN | CONTROLS: the readwidth fact of record 12:30, the sector-read rows (with and without the full fold, 5090 and 4090, twin method) 14:00; SEARCH 14:00 and 14:30; ADVERSARY: the v6 split 13:30, the X10 board rows within an hour of the trace; COHORT: the X10 rows within an hour of the kit; LAB: the verdict line within an hour of the last row |
|
||||
| cand-01 to cand-10 (SEARCH batch 1) | candidates (the workload-search system) | SEARCH on build-9 (tools/lab/search on branch lab-search off 1p5x-int8, pid /srv/queue/pids/build-9-lab-search.pid): the first ten with census rows and ds28 packs (CPU reference, kernel.cu, SHA256SUMS) at build-1:/srv/artefacts/lab/candidates/cand-NN/ with trace.json by 13:00 (a 20-minute slip on a parse fault at +arxr48+flat, absorbed) | the six knobs with explicit limits (verifier 10 ms proxy, dataset at or under 8 GiB, P03 at or under 5 percent, regs under 96, 16,384 to 340,000 instructions per unit); the best realisable region ARX-only, 48 to 64 reads, 170k to 225k instructions per unit | NOT RUN (the GPU self-test of the packs on a one-shot 4090 pod by 13:30; the top three to COHORT and ADVERSARY by 14:00 at ds30) | NOT RUN (priced on v1 within the hour of each trace.json) | SCREEN (SEARCH's cost model, calibrated on v0 and the measured 5090 knee and 4090 stock rows): the ARX-only region reads 1.72x at the 5090 knee against the board and 3.67x on the worst cell; every scattered design held by the die cell at the 3090 and 4090 stock rows (3.7x to 5.5x). RECALIBRATION OWED on v1 (the board 2.57x, the die a 353 nJ) | NOT RUN | SCREEN | SEARCH: packs and traces 13:00, the self-test 13:30, the top three 14:00; the +ilp<W> and +labw cuts building on build-9 |
|
||||
| ctl-v6 | control (frozen) | 1a938abe4; the signing object 0x2a1d6caab4c24564 at 2^30 words = 4 GiB (pack x1-ctrl-ds30.tgz 7606c13d, twin 7629ed95; CONTROLS 12:2x on main's correction, build-1:/srv/artefacts/lab/controls/frozen-v6/ with sidecars); kits: l8off c20999d1 (CUDA 218ca414 / 9bfcf728 Linux), gen-6 bb66a546 (Linux CUDA 804a6f7f, OpenCL 371dbb27); COHORT's rows on kit bf9b85d6, worker f5f3846c; the 1 GiB pairing only a cross-check row | 4 GiB; 256 loads per hash of ONE 32-bit word each (1,024 bytes consumed of 8,192 moved; the readwidth fact of record, 8a.1); 62,120 instructions (102,612 counted); state class; layer 8 ON; cold verification 8.3 to 8.6 ms per warp of 32 on one core (the record; the fresh F2 row 13:30) | STOCK (COHORT 12:17, fp b1f90e91cadb15b6 PASS on every cell): RTX 3090 pod 55006505 (capped 260 of 350 W) 8,429 at 30.80 MH/s; RTX 3090 pod 55006552 (capped 220 of 420) 7,109 at 30.90; RTX 5090 pod 55006481 (384 of a 500 W cap, uncapped in effect) 5,597 at 68.66, f 0.811; RTX 5090 pod 55006478 (capped 400 of 600) 5,828 at 68.64; RTX 5080 pod 55006521 (189 of 330, clean) 5,410 at 35.03, f 0.806; the 3090 twins read f 1.02 (meaningless on a capped card). KNEE: the house record only (5090 at 1,300: 4,011). In flight: 4090a (repeat triple at 3.98 percent spread), 4090b, 5080b, uncapped 5090c and 3090c. AMD, Intel: NOT RUN "no rented card; the house rigs unreachable by software" | v2 (ADVERSARY 12:0x to 12:1x; commits f9cb259cc routed lanes, 923f76e74 coexistence, 7c6b538f1 price sheet on class-v6-adversary): the cheapest same-node DRAM board a = 1,543 (1,328 to 1,947) = 2.60x (2.06 to 3.02) at the 5090 knee, 2.70x a node ahead; the split chip memory 527 / ALU 167 / tax 849 against the card's 3,642 / 369 / 0; the tax ladder: the record's static 2.60x, half 3.28x, zero (the bound) 4.43x; ProgPoW's premise 1.01x to 1.02x; the N2 die a = 337 = 11.9x (coexistence) | PARTIAL over {3090, 5090, 5080 at stock; the 5090 knee from the record}; the 4090 cells pending; AMD and Intel NOT RUN. The worst cell: the RTX 3090 at stock on the same-node DRAM board, set v2: 5.46x (4.33 to 6.35) same node, 5.68x a node ahead; the die at that cell 25.0x. The other cells on the board: 3090 (capped) 4.61x, 5090 stock 3.63x, 5090 (capped) 3.78x, 5080 stock 3.51x, 5090 knee 2.60x; the record's rented 4090 at stock (8,091) would read 5.24x | ctl-v6 on set v2 (WITNESS; a 100,000-machine fleet, a 24-month straight-line life, design USD 35 M board chip and 300 M die, the card sunk at USD 30.6 per MH/s on v6 at the knee, 15.7 of record beside it): the same-node board, edge 2.60x at the knee, chip capital USD 14.04 per MH/s (die 0.34, memory 5.42, board 3.15, design 5.13); GPU electricity-only 0.056 / 0.111 / 0.167 USD per TH at the three tested tariffs against the chip's all-in 0.244 / 0.265 / 0.287: cost ratio 4.4x / 2.4x / 1.7x (the curves meet about USD 0.33 per kWh, the reviewer's linear read; ADVERSARY's exact figure owed); the stored-half hybrid, edge 3.80x, USD 9.17: 2.9x / 1.6x / 1.1x; the N2 die, edge 11.9x, USD 1.59: 0.5x / 0.3x / 0.2x, the GPU owner's electricity above the chip's all-in once the fleet passes 14,300 dies at ten cents (break-even 14,300 to 25,000 under the growth schedules; no schedule kills the die at 100,000 dies); the node-ahead board, edge 2.70x: 4.4x / 2.4x / 1.7x. NEW BUYER (8c.7): picks the chip on every row and tier (the board 0.24x to 0.43x a new card's all-in at ten cents, the die 0.04x; indifference USD 9.7 per MH/s on the 5090 knee, 10.5 on the 5080, 5.4 on the 5090 stock, 2.6 on the 4090; the hold is the project share below about 13,500 boards). The two-phase rows, the revenue column, the used-card column and the exact meeting tariff: NOT RUN (ADVERSARY, this afternoon) | MEASURED-partial (the 4090 cells pending) | COHORT: the 4090 and uncapped cells; the read-headroom row (8c.8) with CONTROLS; ADVERSARY: the two phases, revenue, used-card, the meeting tariff, the growth-scaled new buyer; LAB: the full score when the 4090 rows land |
|
||||
| ctl-progpow-094 | control | CONTROLS building the official 0.9.4 reference from source with its test vectors on build-5 (pid build-5-lab-controls-progpow.pid), by 14:00; ADVERSARY's v2 rows use the KAWPOW census as the proxy | the equivalence contract before any number; 16 KB per hash of DRAM traffic (ADVERSARY) | NOT RUN (the record's 4090 stock row 6,920 is ADVERSARY's numerator) | v2 (proxy): the board 4.24x at the 4090 stock numerator (the 32-register lane costs more than the 8-register one), a_same 545 = 12.7x; the board bandwidth-bound at 16 KB per hash (93 MH/s per board), USD 6.89 per MH/s against 29.7; ProgPoW's premise 1.1x to 1.2x (no twin) | proxy, 4090 stock, board, v2: 4.24x; NOT the lab's score (the pinned build, the cohort rows and a twin pending) | v2 at ten cents, proxy: the board holds 1.1x (the GPU's electricity above the chip's all-in at fifteen cents); the die pushed out above 14,200 dies | NOT RUN (proxy) | CONTROLS 14:00; COHORT rows 15:00 with a twin; ADVERSARY re-prices on the pinned object |
|
||||
| ctl-fishhash | control | CONTROLS building Iron Fish's implementation on build-9 (pid build-9-lab-controls-fishhash.pid), by 14:00; ADVERSARY read cpp/FishHash.cpp | 32 x 3 fetches of 128 B = 96 random reads over a fixed 4.83 GB dataset, about 9,400 lane-instructions of 64-bit multiply-add and FNV | NOT RUN | v2: a_same 162 (three N2 reticles, fused lane), USD 0.35; the board 1,044 (872 to 1,251), 124 MH/s per board bandwidth-bound, USD 4.78; 95 percent of the board's energy is the memory path | waits on COHORT's card row | NOT RUN | NOT RUN | CONTROLS 14:00; COHORT 15:00 |
|
||||
| ctl-coop-arx | control and candidate | CONTROLS: the cooperative ARX kernel and CPU reference bit-exact at 2^16 for chain lengths 24 / 264 / 1,032 / 4,104 ARX ops per fetch per lane (build-2, pid build-2-lab-controls-arxcoop.pid); the document and rows 13:00 | 64 coalesced 256 B fetches; target f at or under 14.8 percent non-ARX energy; spills, sync, generation and finalisation counted | NOT RUN (the card MODELLED by ADVERSARY: 35 nJ per coalesced read, 8.5 pJ per ARX instruction at the knee) | v2 (card MODELLED, SCREEN) at 1.6 M ARX per hash: the board 2.40x (1.96 to 2.86) same node against the routed 32-register fused lane, 2.98x ahead; a_same 5,024 (near-memory, fused) = 3.15x; USD 13 to 15 per MH/s against 15.7 | SCREEN, 5090 knee modelled, board, v2: 2.40x | v2 at ten cents, card modelled: the board holds 1.1x; the die holds 1.5x | SCREEN | CONTROLS 13:00; COHORT's 4090 and 5090 rows 15:00; ADVERSARY re-prices within the hour |
|
||||
| cand-x10 (variants alu-130k / 260k / 520k and sector-118 inside it) | candidate (the founder's third review; the scoped same-node board claim; 8a, 8a.1) | SEARCH: the kit at build-1:/srv/artefacts/lab/cand-x10/kit/ (sector.cu 16417ce6, run-x10.sh, 18 fixtures PASS on a rented 4090 at 11:11 UTC, 112 registers, no spills); the accepted-work contract APPROVED (per lane-work = per digest over 32, both printed) | dependent 32 B sector loads, every byte folded; 118 loads as written; the FAULT OF RECORD: 7 of every 8 loads re-read the same sector, about 16 real misses per lane-hash (8a.1); the verifier under 10 ms owed | SEARCH's first rows (a rented 4090 at stock, SCREEN until COHORT's pairs): 118 loads 810 to 845 nJ per lane-work (25.9 to 27.0 uJ per digest) at 264 to 275 W; 64 loads 567 at 294 W; a tenth of v6's 8,091 on the card class, the cache hits of the fault, not a design gain | v2 with the card MODELLED (SCREEN): sector-118 the board 634 (553 to 798) = 3.00x (2.38 to 3.44) at a card modelled at 1,900 nJ, 3.03x ahead; the split chip 243 / 22 / 369 against the card's 1,650 / 70 / 180; the fold gap 1.2x to 3.9x by core; the die 73 (26x); the ALU ladder 130k / 260k / 520k: the board 4.67x / 2.89x / 1.63x (1.27 to 2.06), 5.52x / 3.56x / 2.08x ahead (the card = v6 by the reviewer's construction). Every modelled-card row re-priced within the hour of COHORT's measured row; the 16-real-misses fault means the chip's memory term in these rows is also overstated for the object as written | SCREEN; the verdict line waits on COHORT's measured pairs (v6 and X10, the same card, the same session) | v2 at ten cents, card modelled: the board holds 2.2x; the die pushed out above 5,800 dies | SCREEN (the object as written carries the fault) | COHORT: run cand-x10 and cand-x10b paired with v6 on the 4090 and 5090 pods now (the kits are staged); ADVERSARY: re-price on the measured rows and on the 16-miss trace; LAB: the verdict line within the hour of the pairs |
|
||||
| cand-x10b | candidate (main's ratified address rule on X10: load n reads the two registers the previous load's fold wrote last; zero repeats in every trace) | SEARCH: hash-x10b.ts, fixtures-x10b.txt (18), sector.cu under -DX10B; the kit lands under build-1:/srv/artefacts/lab/cand-x10b/ with its fixture line; queued on the same 4090 pod behind the x10 rows | as X10 with 118 real dependent sector misses per lane-work; fixtures 18 of 18 PASS under -DX10B; the kit at build-1:/srv/artefacts/lab/cand-x10b/kit with trace.json | SEARCH's first row (a rented 4090 at stock, sampler rule, SCREEN until COHORT's pair): 118 loads 3,653 nJ per lane-work at 66.1 M lane-works per second and 241.5 W, 31 nJ per dependent sector read, the card at its 7.8 G dependent reads per second ceiling; the 64-load and lock rows queued | set v2's same-node board on the 118-miss object: 634 (553 to 798), WITNESS, the split chip memory 243 / fold 22 / tax 369 | the 4090 at stock, the same-node DRAM board, set v2: 5.8x (4.6 to 6.6); v6 on the same card class 5.4x: the fold buys nothing on the ratio (REG-06 confirmed); the term that holds it above 1.5 is the card's memory path (31 nJ per read against the chip's about 2); PARTIAL: the locked 5090 and 5080 and the AMD card NOT RUN | NOT RUN (ADVERSARY re-prices on the measured row) | MEASURED-partial; FAIL CLOSED per the review (no added arithmetic, rotation or set growth) | COHORT: the v6 and x10b pairs on the uncapped 4090 and 5090 after the dataset-size decider; SEARCH: the 64-load and lock rows; ADVERSARY: the coexistence row on the measured card |
|
||||
| cand-01 to cand-09, cand-ilp2, cand-ilp4 (SEARCH batch 1) | candidates (the workload-search system) | staged at build-1:/srv/artefacts/lab/candidates/ (12:17 UK by the box clock) with trace.json; ADVERSARY's trace watcher prices each within the hour; the GPU self-test on a one-shot 4090 pod by 13:30; the top three to COHORT and ADVERSARY by 14:00 at ds30 | the six knobs with explicit limits; the ARX-only region 48 to 64 reads, 170k to 225k instructions per unit; the ilp variants test the card's dependency structure (11.8 pJ per instruction at the lock on the drawn block against 6.2 on an ILP-4 chain) | NOT RUN | NOT RUN (priced on v2 within the hour) | SCREEN (SEARCH's model, calibration on v2 owed): the ARX-only region 1.72x at the 5090 knee against the board, 3.67x on the worst cell | NOT RUN | SCREEN | SEARCH 13:30 and 14:00; the recalibration on v2 before the top three are named |
|
||||
|
||||
## COHORT's denominator run on ctl-v6 (11:49 UK)
|
||||
## COHORT's denominator run on ctl-v6 (from 11:49 UK)
|
||||
|
||||
Eight pods rented by id through the handover gate (two hosts per card: 5090 x2, 4090 x2, 3090 x2, 5080 x2; drivers 570 to 595; one
|
||||
5090 pod capped at 400 of 600 W and named so), the X7 kit's gen-6 worker f5f3846c, the x1-ctrl-ds30 pack (0x2a1d6caab4c24564) with
|
||||
its read-only twin (X7's twin, kernel 93a6a5ce, the address path kept by construction, twin_addr none accepted), three timed runs
|
||||
per pack per state interleaved, rows staged at build-1:/srv/artefacts/lab/ctl-v6/<provider>-<pod>/ and linked under
|
||||
/srv/artefacts/lab/cohort/ctl-v6/<card>/; at 12:1x the 5090s at pass 4 of 6, the 3090s at pass 2, the 5080b re-rented on a new
|
||||
host, the 4090b under a re-rent watcher; the pair-mode harness (control plus candidate in one session, the 10 percent budget and
|
||||
P03 lines per card) ready for the X10 kit. The AMD and Intel tiers BLOCKED: no RX 7600 to 9070 or Arc card on either provider (AMD
|
||||
there is MI300X and MI350X only), the house rigs unreachable by software; both tiers NOT RUN "no rented card; the house rigs
|
||||
unreachable by software" for every candidate (evidence build-1:/srv/artefacts/lab/NOT-RUN-amd-intel.md); the hourly provider
|
||||
check retries and a card that appears is rented through the gate at once. Spend: about USD 3 for the set on a day at USD 732.
|
||||
Rented by id through the handover gate (two hosts per card: 5090 x2, 4090 x2, 3090 x2, 5080 x2; drivers 570 to 595), the gen-6
|
||||
worker f5f3846c on kit bf9b85d6, the x1-ctrl-ds30 pack (0x2a1d6caab4c24564) with its read-only twin (X7's twin, kernel 93a6a5ce,
|
||||
the address path kept by construction, twin_addr none accepted), three timed runs per pack per state interleaved, rows at
|
||||
build-1:/srv/artefacts/lab/ctl-v6/vast-<pod>/ (rows.jsonl, SHA256SUMS, the .tgz) linked under /srv/artefacts/lab/cohort/ctl-v6/<card>/
|
||||
and the cohort's own table at /srv/artefacts/lab/cohort/TABLE.md. Every pod refuses the lock: stock only. The capped-host finding
|
||||
(12:17): f near 1 on a capped card is meaningless; the gate now refuses capped hosts for the f cells; the 4090b pod that never
|
||||
answered was destroyed and re-rented. AMD and Intel: no RX 7600 to 9070 or Arc card on either provider (AMD there is MI300X and
|
||||
MI350X only), the house rigs unreachable by software; NOT RUN "no rented card; the house rigs unreachable by software" on every
|
||||
candidate (build-1:/srv/artefacts/lab/NOT-RUN-amd-intel.md); the hourly provider check retries. Spend: USD 750 at 12:03.
|
||||
|
||||
## Adversarial sets
|
||||
|
||||
| set | date | contents | candidates scored on it |
|
||||
|---|---|---|---|
|
||||
| v0 (the record) | 9 Oct, X0 amendment 5b and X5 | the placed 8-lane 18-family core (6.55 pJ per lane-op at N5), the GDDR7 board, the hybrids at 0.25, 0.50, 0.75, the N2 full-SRAM die, recomputation; X7's HBM3 and near-memory memory paths; X8's systolic int8 array | ctl-v6 (the record: board 2.35x, die 7.8x); SEARCH's cost model (recalibration owed) |
|
||||
| v1 | 12:0x UK 9 Oct (ADVERSARY, commit 0344ec150 on class-v6-adversary; tools/1p5x/lab/adversary.py on build-4 under build-4-lab-adversary.pid; the JSONs scratchpad/lab/adv/<cand id>.json; pages docs/analysis/class-v6/1p5x/lab/adv/<cand id>/README.md; the set and method lab/adv/README.md) | v0 plus: a bandwidth ceiling on every DRAM design (1.79 TB/s at 85 percent); a register file sized to the work (the floor lane's routed 8-register flop lanes in the complete machine); fused dependent operations (the tail 0.6 of the row CLAIMED until the routed arxf and arxf32 lanes land from the floor-k flow on build-4, about 12:4x); HBM3 at one and eight stacks and near-memory as complete machines with the sector arithmetic for 128 and 256 B bursts; recomputation priced from the Ethash-family generators; the die on as many reticles as the dataset needs. Calibration: v6 on the placed core plus GDDR7 reproduces X0 5b (1,706 vs 1,707 nJ, 2.35x) and the die (511 vs 513) | ctl-v6, ctl-progpow-094 (proxy), ctl-fishhash, ctl-coop-arx (parametric) |
|
||||
| v2 | opens when the routed fused lanes land (about 12:4x) | the routed arxf lanes replace the fused tail claim | every candidate re-scored |
|
||||
| v0 (the record) | 9 Oct, X0 amendment 5b and X5 | the placed 8-lane 18-family core (6.55 pJ per lane-op at N5), the GDDR7 board, the hybrids at 0.25, 0.50, 0.75, the N2 full-SRAM die, recomputation; X7's HBM3 and near-memory paths; X8's systolic int8 array | ctl-v6 (the record: board 2.35x, die 7.8x); SEARCH's cost model (recalibration owed) |
|
||||
| v1 | 12:0x UK (ADVERSARY, 0344ec150 on class-v6-adversary) | v0 plus a bandwidth ceiling on every DRAM design (1.79 TB/s at 85 percent), a register file sized to the work (the routed 8-register flop lanes), fused dependent operations (the tail CLAIMED), HBM3 at one and eight stacks and near-memory as complete machines, recomputation priced from the Ethash-family generators, the die on as many reticles as the dataset needs; calibration reproduces X0 5b (1,706 vs 1,707 nJ; the die 511 vs 513) | the four controls (ctl-v6 board 2.57x) |
|
||||
| v2 | 12:0x to 12:1x UK (ADVERSARY, f9cb259cc the routed lanes, 923f76e74 coexistence, 7c6b538f1 the price sheet; tools/chip-model/floor-k-lab with the routed power logs) | v1 with the routed fused-ARX lanes (ASAP7 routed with SPEF, 1,200 ps, timing met: arxf 8-register window 1.87 pJ per fused add-rotate-xor triple, 464 um2, against the single-op lane's 2.16 pJ per op; arxf32 32-register window 5.42 pJ per triple, 1,316 um2): the ARX-fused rows WITNESS; the non-ARX fused groups (mul-xor, 64-bit multiply-add, math and merge) CLAIMED-partial until the two lanes in the flow on build-4 land (the 64-register fused-ARX window that X10 carries as "x1.6 claimed", a fused multiply-xor lane), about 12:3x; every modelled-card row labelled "card": "MODELLED" and SCREEN; the coexistence tables, the new-buyer column, the growth schedules (growth-schedules.json) and the price sheet with the break-even sensitivity (the board breaks even at ten cents only with devices under about USD 8 to 10 each, a fleet above a million machines and a 36-month life together) | every control and candidate (ctl-v6 board 2.60x, die 11.9x; ctl-progpow-094 4.24x proxy; ctl-coop-arx 2.40x screen; cand-x10 3.00x screen) |
|
||||
| v3 | 12:2x UK (ADVERSARY b2b9ee0b9; v3/ beside v2/ under lab/adv/; the JSONs in scratchpad/lab/adv/ now v3) | v2 plus two more ROUTED lanes (the 64-register fused-ARX window 9.90 pJ per triple, 2,469 um2, replacing the "x1.6 claimed"; the fused multiply-xor pair 4.13 pJ over 32 registers, replacing the claimed tail on the FNV and merge steps) and two corrections (a shadow class's window is the 8 registers its shadow runs on, as v6; a sized lane pays for a window above 8, so the 64-register sized lane is dearer than the placed core's SRAM window) | every control and candidate: ctl-progpow-094 a_same 669 (10.3x), board 3.94x (proxy); cand-x10 Sector 2.92x; cand-x10 at 520k ALU the board 1.03x (0.83 to 1.14) same node, 1.35x ahead, SCREEN with the card assumed = v6 (the measurement ordered: SEARCH builds the point, COHORT pairs it; the card's own 520k instructions at 5.9 to 11.8 pJ are 3 to 6 uJ, so the P03 line decides first); cand-01 to cand-10 a_same 574 to 1,168, the board 769 to 1,472 (about 3.1x to 3.3x against their screened 5090 knee figures, a 3.9x to 5.4x) |
|
||||
|
||||
## Rejections and regression hits
|
||||
|
||||
| when | source | what |
|
||||
|---|---|---|
|
||||
| 12:1x UK | SEARCH, the first screen (4,000 draws, seed 1) | 1,762 int8 mixes by REG-04; 122 scattered-ARX designs at or under 32 reads by REG-05; 343 on the verification or granularity limits (F2); none measured, all SCREEN rejections |
|
||||
| 12:1x UK | SEARCH, the first screen (4,000 draws, seed 1) | 1,762 int8 mixes by REG-04; 122 scattered-ARX designs at or under 32 reads by REG-05; 343 on the verification or granularity limits (F2); SCREEN rejections, none measured |
|
||||
| 12:1x UK | SEARCH on cand-x10 | the Sector reference as written re-reads the same sector for 7 of every 8 loads (16 real misses per lane-hash): the object is measured as written (its own row) and the corrected address rule measured beside it as cand-x10b; the author's energy split and the 10 percent budget do not describe the object as written |
|
||||
|
||||
## Faults
|
||||
|
||||
| when | source | what | state |
|
||||
|---|---|---|---|
|
||||
| 11:49 UK | COHORT | no AMD (RX 7600 to 9070) or Intel Arc card rentable on either provider; the house rigs unreachable by software | the two tiers NOT RUN with the reason on every candidate; hourly retry |
|
||||
| 12:1x UK | SEARCH | a parse fault on +arxr48+flat in batch 1 | fixed in the cut building on build-9; a 20-minute slip on the 13:30 clock, absorbed inside it |
|
||||
| 12:1x UK | SEARCH | a parse fault on +arxr48+flat in batch 1 | fixed in the cut; a 20-minute slip on the 13:30 clock, absorbed |
|
||||
| 12:1x UK | COHORT | the 4090b pod never answered on the provider's ssh proxy | destroyed and re-rented on another host |
|
||||
| 12:17 UK | COHORT | the read-only twin reads f near 1 on a power-capped card (the saved ALU power goes to clock) | the lab rule 1.11: f on uncapped cards only; the gate refuses capped hosts for the f cells; capped rows stand named |
|
||||
| 12:2x UK | LAB | the line to main of 12:1x carried "13:1x UK" (main's clock, not `date`) | the lab's lines carry `date` from here; reported once |
|
||||
|
||||
## Open rows (NOT RUN)
|
||||
|
||||
| row | owner | clock |
|
||||
|---|---|---|
|
||||
| the card's random-read headroom per cohort card against its memory-timing bound and the chip's 148 MH/s (8c.8) | COHORT with CONTROLS | this afternoon with the scoreboard |
|
||||
| the two-phase coexistence rows, the revenue column, the used-card column, the growth-scaled new buyer, the exact meeting tariff per row (8c.2 to 8c.7) | ADVERSARY | this afternoon |
|
||||
| the 4 GiB proving cap defined precisely (8c.10) | CONTROLS (the definition), ADVERSARY (the economics) | this afternoon |
|
||||
| the comparative review of what other GPU chains publish on chip resistance (8c.9) | unassigned; NOT RUN until done | none |
|
||||
| the units rule in every control's contract (revenue per accepted work in the algorithm's own units) | CONTROLS | with each pin |
|
||||
| the founder's bundle (8d) | LAB | 14:00 |
|
||||
|
|
|
|||
|
|
@ -20434,7 +20434,7 @@
|
|||
"plan_status": "NOT RUN",
|
||||
"run_id": "lab-20261009-01",
|
||||
"evidence_path": "docs/analysis/class-v6/1p5x/lab/README.md; docs/analysis/class-v6/1p5x/lab/table.md",
|
||||
"updated": "2026-10-09T11:18:34.435Z",
|
||||
"updated": "2026-10-09T11:29:00.510Z",
|
||||
"evidence_record": {
|
||||
"requirement_id": "R15-01",
|
||||
"decision": "NOT RUN",
|
||||
|
|
@ -20455,8 +20455,8 @@
|
|||
},
|
||||
"claim_impact": "none",
|
||||
"reviewer": "",
|
||||
"at": "2026-10-09T11:18:34.435Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
"at": "2026-10-09T11:29:00.510Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. 12:3x UK: the first cohort cells (ctl-v6 at stock on rented 5090, 5080 and 3090 pods: the worst cell the 3090 at 8,429 nJ = 5.46x on set v2's same-node board, PARTIAL, the dataset size under decision after CONTROLS measured the live 4 GiB object at 2.4x the 1 GiB research pack's rate); X10's first measured cell (cand-x10b on the 4090 at stock 3,653 nJ per lane-work = 5.8x on the board; the fold buys nothing); set v3 (routed 64-register and multiply-xor lanes); the fourth to sixth review rulings (8c); the 4 GiB rule (8e). Every row still NOT RUN until read. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
},
|
||||
"evidence_records": {
|
||||
"lab:candidate": {
|
||||
|
|
@ -20479,8 +20479,8 @@
|
|||
},
|
||||
"claim_impact": "none",
|
||||
"reviewer": "",
|
||||
"at": "2026-10-09T11:18:34.435Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
"at": "2026-10-09T11:29:00.510Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. 12:3x UK: the first cohort cells (ctl-v6 at stock on rented 5090, 5080 and 3090 pods: the worst cell the 3090 at 8,429 nJ = 5.46x on set v2's same-node board, PARTIAL, the dataset size under decision after CONTROLS measured the live 4 GiB object at 2.4x the 1 GiB research pack's rate); X10's first measured cell (cand-x10b on the 4090 at stock 3,653 nJ per lane-work = 5.8x on the board; the fold buys nothing); set v3 (routed 64-register and multiply-xor lanes); the fourth to sixth review rulings (8c); the 4 GiB rule (8e). Every row still NOT RUN until read. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
}
|
||||
},
|
||||
"in_progress_since": "2026-10-09T10:48:54.646Z",
|
||||
|
|
@ -21144,7 +21144,7 @@
|
|||
"plan_status": "NOT RUN",
|
||||
"run_id": "lab-20261009-01",
|
||||
"evidence_path": "docs/analysis/class-v6/1p5x/lab/README.md; docs/analysis/class-v6/1p5x/lab/table.md",
|
||||
"updated": "2026-10-09T11:18:34.435Z",
|
||||
"updated": "2026-10-09T11:29:00.510Z",
|
||||
"evidence_record": {
|
||||
"requirement_id": "R15-08",
|
||||
"decision": "NOT RUN",
|
||||
|
|
@ -21165,8 +21165,8 @@
|
|||
},
|
||||
"claim_impact": "none",
|
||||
"reviewer": "",
|
||||
"at": "2026-10-09T11:18:34.435Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
"at": "2026-10-09T11:29:00.510Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. 12:3x UK: the first cohort cells (ctl-v6 at stock on rented 5090, 5080 and 3090 pods: the worst cell the 3090 at 8,429 nJ = 5.46x on set v2's same-node board, PARTIAL, the dataset size under decision after CONTROLS measured the live 4 GiB object at 2.4x the 1 GiB research pack's rate); X10's first measured cell (cand-x10b on the 4090 at stock 3,653 nJ per lane-work = 5.8x on the board; the fold buys nothing); set v3 (routed 64-register and multiply-xor lanes); the fourth to sixth review rulings (8c); the 4 GiB rule (8e). Every row still NOT RUN until read. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
},
|
||||
"evidence_records": {
|
||||
"lab:candidate": {
|
||||
|
|
@ -21189,8 +21189,8 @@
|
|||
},
|
||||
"claim_impact": "none",
|
||||
"reviewer": "",
|
||||
"at": "2026-10-09T11:18:34.435Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
"at": "2026-10-09T11:29:00.510Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. 12:3x UK: the first cohort cells (ctl-v6 at stock on rented 5090, 5080 and 3090 pods: the worst cell the 3090 at 8,429 nJ = 5.46x on set v2's same-node board, PARTIAL, the dataset size under decision after CONTROLS measured the live 4 GiB object at 2.4x the 1 GiB research pack's rate); X10's first measured cell (cand-x10b on the 4090 at stock 3,653 nJ per lane-work = 5.8x on the board; the fold buys nothing); set v3 (routed 64-register and multiply-xor lanes); the fourth to sixth review rulings (8c); the 4 GiB rule (8e). Every row still NOT RUN until read. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
}
|
||||
},
|
||||
"in_progress_since": "2026-10-09T10:48:54.646Z",
|
||||
|
|
@ -21234,7 +21234,7 @@
|
|||
"plan_status": "NOT RUN",
|
||||
"run_id": "lab-20261009-01",
|
||||
"evidence_path": "docs/analysis/class-v6/1p5x/lab/README.md; docs/analysis/class-v6/1p5x/lab/table.md",
|
||||
"updated": "2026-10-09T11:18:34.435Z",
|
||||
"updated": "2026-10-09T11:29:00.510Z",
|
||||
"evidence_record": {
|
||||
"requirement_id": "R15-09",
|
||||
"decision": "NOT RUN",
|
||||
|
|
@ -21255,8 +21255,8 @@
|
|||
},
|
||||
"claim_impact": "none",
|
||||
"reviewer": "",
|
||||
"at": "2026-10-09T11:18:34.435Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
"at": "2026-10-09T11:29:00.510Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. 12:3x UK: the first cohort cells (ctl-v6 at stock on rented 5090, 5080 and 3090 pods: the worst cell the 3090 at 8,429 nJ = 5.46x on set v2's same-node board, PARTIAL, the dataset size under decision after CONTROLS measured the live 4 GiB object at 2.4x the 1 GiB research pack's rate); X10's first measured cell (cand-x10b on the 4090 at stock 3,653 nJ per lane-work = 5.8x on the board; the fold buys nothing); set v3 (routed 64-register and multiply-xor lanes); the fourth to sixth review rulings (8c); the 4 GiB rule (8e). Every row still NOT RUN until read. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
},
|
||||
"evidence_records": {
|
||||
"lab:candidate": {
|
||||
|
|
@ -21279,8 +21279,8 @@
|
|||
},
|
||||
"claim_impact": "none",
|
||||
"reviewer": "",
|
||||
"at": "2026-10-09T11:18:34.435Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
"at": "2026-10-09T11:29:00.510Z",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. 12:3x UK: the first cohort cells (ctl-v6 at stock on rented 5090, 5080 and 3090 pods: the worst cell the 3090 at 8,429 nJ = 5.46x on set v2's same-node board, PARTIAL, the dataset size under decision after CONTROLS measured the live 4 GiB object at 2.4x the 1 GiB research pack's rate); X10's first measured cell (cand-x10b on the 4090 at stock 3,653 nJ per lane-work = 5.8x on the board; the fold buys nothing); set v3 (routed 64-register and multiply-xor lanes); the fourth to sixth review rulings (8c); the 4 GiB rule (8e). Every row still NOT RUN until read. | The 1.5x adversarial comparison laboratory (the founder's order, 9 October 2026, 11:4x UK): one evaluation for every control and candidate (the measurement recipe with the read-only twin for the memory share, the adversary interface returning the lowest credible specialist energy per design as a complete machine with WITNESS or BOUND labels, the score as the worst comparison over the required cohort same node and one node ahead, the rejection filters F1 to F6, the regression set REG-01 to REG-08 from the 8 and 9 October failures). Every row NOT RUN until the panel reads it; the first measured score (the frozen v6 control on the cohort against adversarial set v1) lands as a later batch under this cell. Amended 11:5x UK: X10, the full-sector fold candidate of the founder's third review, added as cand-x10 with the scoped same-node board claim (the die and node-ahead chips as coexistence rows); the AMD and Intel tiers NOT RUN on every candidate (no rented card; the house rigs unreachable by software) until a card is found."
|
||||
}
|
||||
},
|
||||
"in_progress_since": "2026-10-09T10:48:54.646Z",
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
"in_progress": true,
|
||||
"method": "model",
|
||||
"evidence": "docs/analysis/class-v6/1p5x/lab/README.md; docs/analysis/class-v6/1p5x/lab/table.md",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs.",
|
||||
"note": "The lab's interface and the candidate table at the fan-out: the frozen v6 control carried from the record (the house 5090 at its knee 4,011 nJ per hash, board power; the X0 amendment 5b rows: the DRAM board 2.35x same node WITNESS, the N2 die 7.8x the worst credible), the cohort rows for the 3090, the 5080 and the AMD and Intel tiers NOT RUN, adversarial set v1 pending; the three other controls (ProgPoW 0.9.4 reference, FishHash, the cooperative ARX candidate) NOT RUN with their clocks. No score is the lab's until the cohort and the adversary rows are in; R15-01, R15-08 and R15-09 stay NOT RUN until read. X10 (cand-x10) joins the table NOT RUN with its per-lane assignments and clocks; COHORT's ctl-v6 denominator set is in flight on eight rented pods. 12:1x UK: adversarial set v1 on the table (the frozen v6's same-node board 2.57x, 2.04 to 3.00, the fused tail CLAIMED until the routed lanes land; the die 11.4x as a coexistence row); the coexistence table (interface section 8b) added as the scoreboard's headline; SEARCH's first screen recorded as SCREEN rejections. Still NOT RUN: no cohort score until COHORT's eight rows are read back. 12:2x UK: set v2 (the routed fused-ARX lanes) makes the v6 board 2.60x a WITNESS; the ctl-v6 coexistence table (the board holds at every price; the N2 die pushes the GPU owner out above 14,300 dies at USD 0.10) is the headline; X10 SCREEN with the card modelled (the board 3.00x at 118 loads). Still NOT RUN: the cohort rows in their timed runs. 12:3x UK: the first cohort cells (ctl-v6 at stock on rented 5090, 5080 and 3090 pods: the worst cell the 3090 at 8,429 nJ = 5.46x on set v2's same-node board, PARTIAL, the dataset size under decision after CONTROLS measured the live 4 GiB object at 2.4x the 1 GiB research pack's rate); X10's first measured cell (cand-x10b on the 4090 at stock 3,653 nJ per lane-work = 5.8x on the board; the fold buys nothing); set v3 (routed 64-register and multiply-xor lanes); the fourth to sixth review rulings (8c); the 4 GiB rule (8e). Every row still NOT RUN until read.",
|
||||
"claim_impact": "none"
|
||||
}
|
||||
],
|
||||
|
|
|
|||
Loading…
Reference in a new issue