diff --git a/docs/design/class-v6-rotating-family.md b/docs/design/class-v6-rotating-family.md
index 0d0ba6ad4..686366be8 100644
--- a/docs/design/class-v6-rotating-family.md
+++ b/docs/design/class-v6-rotating-family.md
@@ -277,7 +277,16 @@ The close (20:00): the honest floor per tier against each chip row, the recommen
 
 **The read width is the only wire lever on the SRAM die, and the floor is a ticket, not a joule.** Lane B's 1.0 nJ was the 64-byte row; the die reads what the hash asks for, and the wire scales with the bits moved while the macro access does not:
 
-**The convention rule for every shadowed row (the coordinator's order, 13:1x UK): the headline is the ABSOLUTE convention, pJ per op on each side at the operating point (the die's core costs what it costs; the GPU's op at its own clock, 11.3 pJ stock and 6.2 at the 1,300 lock on the 5090); the record's convention (k against the GPU's op cost at the same operating point, so the die's core gets cheaper when the card locks) is carried beside it, marked, and it flatters the die at the lock by 1.6x (6.1x against 3.8x at k 0.5; 3.3x against 2.0x at k 1).** The shadowed columns in the table below are the lane's first reading at the card's stock point, where the two conventions coincide; the k lane's synthesised rows (floor lane 2, coming in absolute) re-fold them before the close, and the lock rows then appear in both conventions with the absolute one first.
+**The convention rule for every shadowed row (the coordinator's order, 13:1x UK): the headline is the ABSOLUTE convention, pJ per op on each side at the operating point (the die's core costs what it costs; the GPU's op at its own clock, 11.3 pJ stock and 6.2 at the 1,300 lock on the 5090); the record's convention (k against the GPU's op cost at the same operating point, so the die's core gets cheaper when the card locks) is carried beside it, marked, and it flatters the die at the lock by 1.6x (6.1x against 3.8x at k 0.5; 3.3x against 2.0x at k 1).** The shadowed columns in the table below are the lane's first reading at the card's stock point, where the two conventions coincide. The lock rows, both conventions, absolute first (floor lane 3's 2.2a at d550dadd, 13:09 UK; the card at the lock 1.67 plus 0.65 microjoules measured, the die's E_hash0 from its 2.2; the absolute die pays k x 1.10 microjoules whatever the card does, the record's k x 0.65):
+
+| W words | Absolute, k 0.5 / 1 (the headline) | The record's convention, k 0.5 / 1 (marked: flatters the die by 1.6x) | Label |
+|---|---|---|---|
+| 1 | 4.0x / 2.0x | 6.4x / 3.4x | modelled chip, measured card |
+| 4 (genesis) | 3.8x / 2.0x | 6.1x / 3.3x | modelled chip, measured card |
+| 8 | 3.7x / 2.0x | 5.8x / 3.2x | modelled chip, measured card |
+| 16 | 3.4x / 1.9x | 5.2x / 3.0x | modelled chip, measured card |
+
+The k lane's RTL rows (floor lane 2, in absolute) replace the k axis of this table when they land; until then the honest shadowed reading of the SRAM die against a 5090 at its knee is 2.0x at k 1 and 3.7x to 4.0x at k 0.5, whatever the read width.
 
 | W words | Bits per read | Chip E_read | GH/s per die (300 W) | Zero shadow against the 5090 | With the class v4 shadow, k 0.5 / 1 (stock point; the record's convention, to be re-folded by the k lane in absolute) | At the card's whole shadow (F 2.0), k 0.5 / 1 (same convention note) | The honest card's cost | Label |
 |---|---|---|---|---|---|---|---|---|