Merge spec-accept-23 ba08d6b8 into master (gate: green on ba08d6b8, recorded by tools/ci/pre-push.sh; landed on the box mirror)

docs/fud-ledger.md

@@ -706,7 +706,7 @@ Evidence: litepaper "For miners", hardware paragraph. Wording: overclaims list,
 ### C2. vs Monero: "no chip in seven years" is not proof
 "Absence of a public RandomX ASIC is not evidence one cannot exist. Monero is also a small prize."
 
-Status: Conceded, stated; reopened as conceded (7 October 2026, morning, X36): the X9 never shipped, so Monero's record is again seven years without a shipped chip, and the concession stands as first written; the litepaper says so in the same sentences.
+Status: Conceded, stated; corrected (8 October 2026, lane A's history): Monero's record is about seven years with one shipped chip, the Antminer X5 at 1.46x per joule over a desktop CPU, not seven years without one; the concession stands and the litepaper's sentences say so (`docs/analysis/class-v6/history.md` 2.3). Was: Conceded, stated; reopened as conceded (7 October 2026, morning, X36): the X9 never shipped, so Monero's record is again seven years without a shipped chip, and the concession stands as first written; the litepaper says so in the same sentences.
 
 Status: Conceded, stated (7 October 2026, morning): the one-screen home page is back on the owner's word, so this row is stated on `site/litepaper.html` only; the sentence there is unchanged and the text check lists it under the litepaper.
 
@@ -2298,7 +2298,7 @@ Evidence: `site/litepaper.html`; `docs/plans/testnet-go.md`; X31, X32.
 ### X34. RandomX described as chip-free
 "The home page said the random program 'has kept chips off Monero since 2019', the litepaper said Monero ran on RandomX 'with no chip publicly shipped' and spoke of 'Monero's seven years without a public chip'. Bitmain's Antminer X9, a RandomX chip, ships from July 2026 (1 MH/s at 2,472 W, about USD 5,600; monero-project/monero issue 10270), and RandomX 2.0 shipped on 25 March 2026. Every sentence that said or implied RandomX is chip-free, or that Monero's approach has held, was wrong."
 
-Status: Fixed, stated; corrected (7 October 2026, morning, X36): the X9 never shipped. Bitmain opened pre-orders on 26 December 2025 and withdrew the product in mid-May 2026 before any unit was delivered; every sentence below that had it shipping now states that, and RandomX stands as a technique no chip has yet shipped against. The sentences in this row are the history.
+Status: Fixed, stated; corrected again (8 October 2026, lane A's history, `docs/analysis/class-v6/history.md` 2.3): one chip did ship against RandomX, Bitmain's Antminer X5 (announced 27 August 2023, shipped September 2023), a board of RISC-V chips at 1.46x per joule over a Ryzen 9 7950X, on silicon SChernykh believes mined privately from about 2021; RandomX v2 was released on 25 March 2026 with its mainnet activation pending (PR 10038); the X9 was withdrawn in mid-May 2026 with zero units. Every served sentence that said "no chip shipped" or "seven years without a shipped chip" now carries the X5 and the v2 release (litepaper precedents row, the chip-model paragraph, the vs RandomX section and its track-record row; /claims and /randomx follow from it); the X36 sentence on the X9 stands. Was: Fixed, stated; corrected (7 October 2026, morning, X36): the X9 never shipped. Bitmain opened pre-orders on 26 December 2025 and withdrew the product in mid-May 2026 before any unit was delivered; every sentence below that had it shipping now states that, and RandomX stands as a technique no chip has yet shipped against. The sentences in this row are the history.
 
 Status: Fixed, stated (7 October 2026, morning): the one-screen home page carries no RandomX sentence, so the corrected wording stands on `site/litepaper.html` (four sentences and the table row); the text check lists them there.
 

site/claims.html

@@ -224,7 +224,7 @@
 <div class="derived"><p>Here are the limits, stated before anyone else states them.</p>
         <ul>
           <li><strong>A proof in seconds.</strong> Not at launch. Proving a full block today needs a cluster of 100 to 200 consumer GPUs, approximate, so Igneum launches with proofs within about a minute and tightens as hardware improves. Users still see their transaction land in one second.</li>
-          <li><strong>A chip is impossible.</strong> No. A chip wired for one program is a bad bet, because the program moves before it ships. A programmable chip is not stopped by the moving target: everything it needs is public at genesis and every drawn parameter is firmware to it (an address permute, a rotator, an immediate table), so the defence against it is the latency-shadow work (class v4) and the price per joule, not the schedule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane and 3.4x with one three times better, under class v4 from the first block: a memory-controller chip that stores the whole dataset and carries a GPU-class datapath beside its memory for the 100,000 ops per hash in the shadow, the range running from a chip core as costly per operation as a GPU lane (k = 1, modelled on the 5090’s measured watts at its knee, 7 October 2026) to a core three times better per operation (k about 0.33); the withdrawn Antminer X9’s claimed figure is a ratio against a CPU core, not a GPU lane, so it does not stand for a chip core against us; the ladder’s second rung takes that bracket to about 2.8x (modelled, 7 October 2026). Class v5 then makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item (designed, 7 October 2026). The baseline the work started from, never the launch state: without class v4 the same stored-dataset chip would reach 1.2x per chip and 5x to 9x per joule in our model (6 October 2026); the Ethash chips of this class reached 2.1x to 4.8x (Linzhi Phoenix 2020, Jasminer X4 2021, Antminer E9 2022). The strongest recompute chip we can price, holding the whole 256 MiB cache on-die, reaches under 1x per chip against an RTX 5090 (the published model, 5 October 2026: 0.92x per unit of silicon with a 3x fixed-function allowance, approximate). Sources: the chip model analysis (6 October 2026); the ASIC history’s Ethash rows; Counter ASIC 3.0 item 8 (the chip’s per-joule edge over the RTX 5090 falls from 5.6x to 2.1x on GDDR7 at k = 1 and to 3.4x at a core three times better, the 5090 at 0.2% less rate; gates G1 to G6 passed, 6 October 2026). No hash has stayed free of chips forever; Igneum does not claim to. Monero’s RandomX has held for about seven years; the one chip announced against it, Bitmain’s Antminer X9, was withdrawn in mid-May 2026 before any unit shipped, its claimed core (k about 0.33) never measured. That record says nothing about the price of a chip with the 256 MB cache on its die; that price is a cost model, not a measurement.</li>
+          <li><strong>A chip is impossible.</strong> No. A chip wired for one program is a bad bet, because the program moves before it ships. A programmable chip is not stopped by the moving target: everything it needs is public at genesis and every drawn parameter is firmware to it (an address permute, a rotator, an immediate table), so the defence against it is the latency-shadow work (class v4) and the price per joule, not the schedule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane and 3.4x with one three times better, under class v4 from the first block: a memory-controller chip that stores the whole dataset and carries a GPU-class datapath beside its memory for the 100,000 ops per hash in the shadow, the range running from a chip core as costly per operation as a GPU lane (k = 1, modelled on the 5090’s measured watts at its knee, 7 October 2026) to a core three times better per operation (k about 0.33); the withdrawn Antminer X9’s claimed figure is a ratio against a CPU core, not a GPU lane, so it does not stand for a chip core against us; the ladder’s second rung takes that bracket to about 2.8x (modelled, 7 October 2026). Class v5 then makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item (designed, 7 October 2026). The baseline the work started from, never the launch state: without class v4 the same stored-dataset chip would reach 1.2x per chip and 5x to 9x per joule in our model (6 October 2026); the Ethash chips of this class reached 2.1x to 4.8x (Linzhi Phoenix 2020, Jasminer X4 2021, Antminer E9 2022). The strongest recompute chip we can price, holding the whole 256 MiB cache on-die, reaches under 1x per chip against an RTX 5090 (the published model, 5 October 2026: 0.92x per unit of silicon with a 3x fixed-function allowance, approximate). Sources: the chip model analysis (6 October 2026); the ASIC history’s Ethash rows; Counter ASIC 3.0 item 8 (the chip’s per-joule edge over the RTX 5090 falls from 5.6x to 2.1x on GDDR7 at k = 1 and to 3.4x at a core three times better, the 5090 at 0.2% less rate; gates G1 to G6 passed, 6 October 2026). No hash has stayed free of chips forever; Igneum does not claim to. Monero’s RandomX has held its miners on commodity hardware for about seven years: one chip shipped against it, Bitmain’s Antminer X5 (September 2023), at 1.46x per joule over a desktop CPU; the one announced beyond it, the Antminer X9, was withdrawn in mid-May 2026 before any unit shipped, its claimed core (k about 0.33) never measured; RandomX v2 was released on 25 March 2026 with its activation pending. That record says nothing about the price of a chip with the 256 MB cache on its die; that price is a cost model, not a measurement.</li>
           <li><strong>A guaranteed income floor.</strong> No. External proving is a small market today. Igneum's miners' electricity cost in it is close to power, but the price they must charge is the subsidy they forgo, which falls as one over network hash: an edge at scale and nothing more.</li>
           <li><strong>A memory-hard prototype on every vendor.</strong> Not yet. The 256 MB cache closed the shortcut on Apple silicon (computing items runs 4.8x slower than loading them, measured 3 October 2026). The same ratio on NVIDIA and on a discrete AMD card is Open.</li>
           <li><strong>Finality in the first month.</strong> No. No checkpoint locks until the 30-day window has 30 days of history. The first month of mainnet is proof of work with a 12-hour depth, and the text above says so wherever a day count appears.</li>

site/ledger.html

@@ -1397,7 +1397,7 @@ blockquote{margin:10px 0;padding:10px 14px;border-left:3px solid var(--line-2);c
 <article class="entry" id="AP-F8-1" data-bucket="Fixed or built">
 <div class="head"><span class="id">AP-F8-1</span><h3>A load whose source was last written by <code>or</code>, <code>mul</code> or <code>mulhi</code> makes a cross-hash hot set</h3><span class="date">7 October 2026</span></div>
 <blockquote>The item histogram of class v4 over 2^26 nonces is not uniform: the top 0.1 percent of items take 0.520 percent of reads against 0.115 for a uniform control (4.05x), one item takes 78,479 reads (153x the mean), and site 15 feeds 6.37 percent of its reads into that top 0.1 percent in every iteration.&quot; (attack-pass row F8, <code>a repository file</code>, 7 October 2026)</blockquote>
-<div class="status"><span class="badge b-fixed-or-built">Fixed in part, finding bounded, stated</span> <span class="did">7 October 2026, night, the Counter ASIC lane's words): class v4 sub-version 3 (igneum-pow 017e7037, the audit-freeze tag) is frozen with the dataflow rule, the shared-operand rule, the 0.98 ratio and the total draw; the in-house pass's F8 re-gate reads 60 of 64 seeds under 1.2x with the four-seed tail accepted by the coordinator as the window model's unattributed residue (no chip consequence); the pass then attributed the class by value (eight live hot sets at 1.54x to 2.24x in the lowest 30 of 29,032 accepted programs, each about 1 MB of items at 0.3 percent of reads, 1.002x to a chip); class v5 (1c420786, frozen 21:53 UK) carries the fix as rule (c'''), the per-site distinct-index floor at 0.995 on the state flag (its census refuses 2.435 percent of accepted programs; seven of seven live hot sets refused at 0.9821 to 0.9919; the eighth's ratio owed tonight), with a named residual (three mild shadow-block-written concentrations at 0.9992 to 0.9997, about 1.0004x, a value-level test in the next class); the record is <code>a repository file</code> section 7c and the class v5 design's section 14. The eighth live hot set (seed 122960, id 4be7393ab6c84802, the deepest found: X_f +0.111 percent, 1.54x the window model, its hottest item at 475,616 reads from an all-ones source) reads minimum site 12 at 0.9824 at the acceptance's own 2^20 sample (live 0.9822), refused by class v5's (c''') floor at 0.995; so the floor refuses nine of nine live hot sets by X_f at or above f found in the tail of 269,250 accepted programs (minimum sites 0.9809 to 0.9919; the ninth, seed 228763 from a non-saturated source, at 0.9809 on 8 October 2026) against 0 hot sets in 20 random programs; what it misses stays the three mild shadow-block-written concentrations at 0.9992 to 0.9997 (Devnet 3's first program among them), about 1.0004x to a chip, the value-level test in the next class (22:41 local time; the logs under <code>a repository file/</code> on branch adv-accept; the v5 design's section 14). The public sentence (the coordinator's wording, 7 October 2026, night; the count moved to nine at 01:13 local time on 8 October when the ninth live hot set, seed 228763 from a non-saturated source, read 0.9809 and was refused): nine of nine hot sets refused; the diffuse era-stride excess, bounded under 0.1 percent of a hash's reads per site, is not caught by the floor and is the next class's test. The reason, read by the in-house pass (adv-cache-2) and the class v5 lane together: the distinct-index count at 2^20 sees concentration on few word indices whatever their source, saturated or not (the hot sets put about 3 percent of a site's reads on 512 indices, so the ratio falls to 0.981 to 0.992; the final tally 9 of 9 live hot sets and both single-item programs refused, 7 clean-live programs refused among the 12 deepest, 3 mild residuals missed) and not a diffuse excess over the top 0.1 percent of items (16,384 items), which is what the era-stride low-bit law produces (13 of 27 drawn-era programs carry a site over 1.04x, 8 over 1.2x, worst 1.75x; 0 of 29 refused at the 2^20 sample, minimum sites 0.9965 to 1.0000); its chip value is about 1.0024x at the worst site read, under this row's bound by an order; the row for it is AP-F8-6. The RTX 5080 grid's knee is not in tonight; X37 keeps the 5080's stock premium only.</span></div>
+<div class="status"><span class="badge b-fixed-or-built">Fixed in part, finding bounded, stated</span> <span class="did">7 October 2026, night, the Counter ASIC lane's words): class v4 sub-version 3 (igneum-pow 017e7037, the audit-freeze tag) is frozen with the dataflow rule, the shared-operand rule, the 0.98 ratio and the total draw; the in-house pass's F8 re-gate reads 60 of 64 seeds under 1.2x with the four-seed tail accepted by the coordinator as the window model's unattributed residue (no chip consequence); the pass then attributed the class by value (eight live hot sets at 1.54x to 2.24x in the lowest 30 of 29,032 accepted programs, each about 1 MB of items at 0.3 percent of reads, 1.002x to a chip); class v5 (1c420786, frozen 21:53 UK) carries the fix as rule (c'''), the per-site distinct-index floor at 0.995 on the state flag (its census refuses 2.435 percent of accepted programs; seven of seven live hot sets refused at 0.9821 to 0.9919; the eighth's ratio owed tonight), with a named residual (three mild shadow-block-written concentrations at 0.9992 to 0.9997, about 1.0004x, a value-level test in the next class); the record is <code>a repository file</code> section 7c and the class v5 design's section 14. The eighth live hot set (seed 122960, id 4be7393ab6c84802, the deepest found: X_f +0.111 percent, 1.54x the window model, its hottest item at 475,616 reads from an all-ones source) reads minimum site 12 at 0.9824 at the acceptance's own 2^20 sample (live 0.9822), refused by class v5's (c''') floor at 0.995; so the floor refuses nine of nine live hot sets by X_f at or above f found in the tail of 269,250 accepted programs (minimum sites 0.9809 to 0.9919; the ninth, seed 228763 from a non-saturated source, at 0.9809 on 8 October 2026) against 0 hot sets in 20 random programs; what it misses stays the three mild shadow-block-written concentrations at 0.9992 to 0.9997 (Devnet 3's first program among them), about 1.0004x to a chip, the value-level test in the next class (22:41 local time; the logs under <code>a repository file/</code> on branch adv-accept; the v5 design's section 14). The public sentence (the coordinator's wording, 7 October 2026, night; the count moved to nine at 01:13 local time on 8 October when the ninth live hot set, seed 228763 from a non-saturated source, read 0.9809 and was refused): nine of nine hot sets refused; the diffuse era-stride excess, bounded under 0.1 percent of a hash's reads per site, is not caught by the floor and is the next class's test. The reason, read by the in-house pass (adv-cache-2) and the class v5 lane together: the distinct-index count at 2^20 sees concentration on few word indices whatever their source, saturated or not (the hot sets put about 3 percent of a site's reads on 512 indices, so the ratio falls to 0.981 to 0.992; the final tally 9 of 9 live hot sets and both single-item programs refused, 7 clean-live programs refused among the 12 deepest, 3 mild residuals missed) and not a diffuse excess over the top 0.1 percent of items (16,384 items), which is what the era-stride low-bit law produces (13 of 27 drawn-era programs carry a site over 1.04x, 8 over 1.2x, worst 1.75x; 0 of 29 refused at the 2^20 sample, minimum sites 0.9965 to 1.0000); its chip value is about 1.0024x at the worst site read, under this row's bound by an order; the row for it is AP-F8-6. The RTX 5080 grid's knee is not in tonight; X37 keeps the 5080's stock premium only. The tail is attributed (8 October 2026, 09:46 UK, the hash lane): one narrow-window site per seed with a quarter-bit bucket concentration from a mad, xor or sub writer, no lossy source, no chip consequence beyond the window model; the per-site bucket bound that would refuse it is a morning item for the next class, not a change to 017e7037.</span></div>
 <details><summary>The answer as first written</summary><p>Correct as a fault, wrong as a null. The window layer (spec 01 1.13.1 as proposed, <code>a repository file</code> 1.4) moves the uniform null from 0.115 to 0.160 percent at the top 0.1 percent (1.39x, not 4.05x) and explains every per-site row of F8's attribution except site 15. Site 15's source r6 was last written by <code>or r6, r4</code> (instruction 61, the load at 63), a non-injective op whose output bits are 1 with probability 3/4, so the all-ones source recurs with probability (3/4)^32 per read; the era map sends it to item 0xca5b92, F8's hottest item exactly, and F8's next seven items are exactly the seven one-zero-bit sources whose zero survives the window mask. The popcount model at the measured bias (p = 0.7585) predicts 77,348 all-ones reads against 78,479, and the program's top-0.1-percent share at 0.58 against 0.52. The acceptance rule's part (a) takes any write as a fresh source and part (c) counts saturation on final register values only, so the class of fault passes it: of 1,024 chain-shaped class v4 programs 96.6 percent carry a load whose source's last writer is <code>or</code>, <code>mul</code> or <code>mulhi</code>, 48.5 percent an <code>or</code>-sourced one (0.30 percent of all reads per site), 4.9 percent an <code>or</code>-of-<code>or</code> chain (p3's class: 72 percent of that site's reads, 4.6 percent of all reads, on 0.1 percent of items). The ceiling under rule (c)'s 120-of-128 floor is one site repeating its item in all 8 iterations, 6.25 percent of reads, a chip edge of at most 1.067x in 64 bytes of SRAM; the public claim's 2x margin stands, and the public line says &quot;bounded&quot;, not &quot;uniform&quot; (<code>a repository file</code> sections 1 to 4).</p></details>
 </article>
 <article class="entry" id="AP-F8-4" data-bucket="Fixed or built">
@@ -1428,7 +1428,7 @@ blockquote{margin:10px 0;padding:10px 14px;border-left:3px solid var(--line-2);c
           <a href="https://discord.gg/igneum" target="_blank" rel="noopener" aria-label="The Igneum Discord"><svg viewBox="0 0 24 24" width="22" height="22" fill="currentColor" aria-hidden="true"><path d="M19.6 5.3A17 17 0 0 0 15.4 4l-.2.4a15.6 15.6 0 0 1 3.9 1.9 13.6 13.6 0 0 0-14.2 0A15.6 15.6 0 0 1 8.8 4.4L8.6 4a17 17 0 0 0-4.2 1.3C1.8 9.2 1.1 13 1.4 16.7a17.1 17.1 0 0 0 5.2 2.6l1.1-1.8a10.8 10.8 0 0 1-1.7-.8l.4-.3a12.2 12.2 0 0 0 11.2 0l.4.3-1.7.8 1.1 1.8a17 17 0 0 0 5.2-2.6c.4-4.3-.7-8-3-11.4zM8.7 14.4c-1 0-1.8-.9-1.8-2.1s.8-2.1 1.8-2.1 1.9 1 1.8 2.1c0 1.2-.8 2.1-1.8 2.1zm6.6 0c-1 0-1.8-.9-1.8-2.1s.8-2.1 1.8-2.1 1.9 1 1.8 2.1c0 1.2-.8 2.1-1.8 2.1z"></path></svg></a>
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       <div class="footer-column"><h4>Run</h4><div>

site/litepaper.html

@@ -332,7 +332,7 @@ body.all .pager{display:none}
         <div class="tbl"><table>
           <thead><tr><th>Piece</th><th>Closest precedent</th><th>What Igneum adds</th><th>State, 7 Oct 2026</th></tr></thead>
           <tbody>
-            <tr><td>A mining program that regenerates itself, for GPUs</td><td>RandomX on Monero since 2019, for CPUs, a program per hash; the one chip announced against it, Bitmain’s Antminer X9, withdrawn in May 2026 before launch. ProgPoW, as KAWPOW on Ravencoin since 2020, changes the maths inside a fixed program shape every few blocks on GPUs (approximate)</td><td>A whole kernel per hour compiled to native code, a daily dataset from a 256 MB cache, a verifiable delay before the seed, era draws from a genesis reserve</td><td>Measured: hourly swaps on Apple, NVIDIA and AMD cards on the live devnet, 4 October 2026</td></tr>
+            <tr><td>A mining program that regenerates itself, for GPUs</td><td>RandomX on Monero since 2019, for CPUs, a program per hash; one chip shipped against it, Bitmain’s Antminer X5 (September 2023), a board of RISC-V chips at 1.46x per joule over a desktop CPU, on silicon believed mining privately from about 2021; the X9 was withdrawn in May 2026 with zero units; RandomX v2 was released on 25 March 2026 with its activation pending. ProgPoW, as KAWPOW on Ravencoin since 2020, changes the maths inside a fixed program shape every few blocks on GPUs (approximate)</td><td>A whole kernel per hour compiled to native code, a daily dataset from a 256 MB cache, a verifiable delay before the seed, era draws from a genesis reserve</td><td>Measured: hourly swaps on Apple, NVIDIA and AMD cards on the live devnet, 4 October 2026</td></tr>
             <tr><td>The mining card does paid, useful, verifiable work</td><td>Primecoin's prime chains in 2013 were not useful. Aleo ran proving as consensus and the fastest prover won (both approximate)</td><td>Proving kept apart from the lottery; shards assigned by sortition, not by speed</td><td>Implemented: proving v0 and v1 on Devnet 3 from block zero (7 October 2026), v0 on the first devnet since 5 October 2026. The job market for other chains is Designed</td></tr>
             <tr><td>A proof-of-work chain where every block is proven</td><td>zkEVMs run as rollups on proof-of-stake Ethereum. Conflux has run GPU-mined EVM apps on a DAG since 2020, without proofs (approximate)</td><td>Proven state on a proof-of-work base layer, produced by the miners themselves</td><td>Implemented in part: shards proven and paid on the devnet. The aggregated block proof checked in consensus is Designed</td></tr>
             <tr><td>Finality held by miners and not moved by hour-long rentals</td><td>Decred votes with stake. Horizen penalises hidden chains. Kaspa limits merge depth (approximate)</td><td>Vote weight is 30 days of blocks per key. Hashrate that appeared today has no vote</td><td>Implemented: rule v3 live on Devnet 3 from block zero, first lock 7 October 2026; rule v2 ran the first devnet from its first lock on 4 October 2026. External review is owed at gate 3</td></tr>
@@ -451,14 +451,14 @@ body.all .pager{display:none}
           <tr><td>When a stored-dataset chip pays for itself</td><td>at about USD 100 M of market cap in the first two years, not before</td><td>modelled, 7 October 2026</td></tr>
           <tr><td>The baseline the work started from: the same chip under class v3, without the shadow (the Ethash class)</td><td>5x to 9x (5.1x on GDDR7, 9.2x on eight HBM3 stacks; the Ethash chips of this class reached 2.1x to 4.8x)</td><td>modelled, 6 October 2026; the precedent measured by others, 2020 to 2022; never the launch state</td></tr>
         </tbody></table></div>
-        <p>What a miner sees from this. Class v4 costs a 5090 145 W more unlocked, 88 W more at a 1,400 MHz core lock and 82 W at the best operating points (class v4 at 1,200 MHz, class v3 at 1,300; the knee is 1,300 MHz on both), for 0.2 percent more rate (measured, 7 October 2026; the 80 W read on 6 October was at the app's tuned cap); an M5 Max 16 W more for 1.5 percent, an RX 9070 XT and an RTX 4070 nothing (measured, 6 October 2026). The ladder that sets how much work rides in the shadow starts at rung 0 at genesis and climbs by miner signal; its third rung is inadmissible today because a server core verifies it in 10.85 ms, over the gate (measured, 7 October 2026). Devnet 3 runs class v4 from its first block (7 October 2026); the first devnet started on class v3 and reaches class v4 by miner signal at a published height. The next test of the model is an internal adversarial pass, not an independent review: three lanes that have never worked on the hash code attack the mixer, the chained cache and the acceptance rule with only what an outsider has (the public kit, the frozen object, the spec, the harnesses) and publish the break or the bound they reach. No outside review has run yet.</p>
+        <p>What a miner sees from this. Class v4 costs a 5090 145 W more unlocked, 88 W more at a 1,400 MHz core lock and 82 W at the best operating points (class v4 at 1,200 MHz, class v3 at 1,300; the knee is 1,300 MHz on both), for 0.2 percent more rate (measured, 7 October 2026; the 80 W read on 6 October was at the app's tuned cap); an M5 Max 16 W more for 1.5 percent, an RX 9070 XT and an RTX 4070 nothing (measured, 6 October 2026). The ladder that sets how much work rides in the shadow starts at rung 0 at genesis and climbs by miner signal; its third rung is inadmissible today because a server core verifies it in 10.85 ms, over the gate (measured, 7 October 2026). Devnet 3 runs class v4 from its first block (7 October 2026); the first devnet started on class v3 and reaches class v4 by miner signal at a published height. Classes rotate on findings and at least yearly; a class change is a release activated by block height. Class v5 crosses on Devnet 3 by height; class v6 is the design in progress (opened 8 October 2026), with four layers as its spine: per-era draws of the parameters a release now fixes, a dataset whose size tracks the chain state, scheduled family epochs by height, and the acceptance floor generalised to every era’s draw. The next test of the model is an internal adversarial pass, not an independent review: three lanes that have never worked on the hash code attack the mixer, the chained cache and the acceptance rule with only what an outsider has (the public kit, the frozen object, the spec, the harnesses) and publish the break or the bound they reach. No outside review has run yet.</p>
-        <p>No hash has stayed free of chips forever. Igneum does not claim to. It states the gain its own model finds, the response takes a week, and both are measured. The model is public: <a href="/bench#counter-asic-2-0-the-numbers">the numbers</a>; the claim is tested by the in-house adversarial pass and the public benchmark. Monero has run on RandomX since 2019 (approximate) with no chip shipped. Bitmain opened Antminer X9 pre-orders on 26 December 2025 for July 2026 delivery, then withdrew the product in mid-May 2026 and refunded buyers before any unit shipped; none has been independently benchmarked. A box with about a 2x per joule edge over the best CPUs, and about 3x over a desktop, was withdrawn rather than face a RandomX re-tune of 1.5x or more. That is the band Igneum’s class v4 model sits in (2.1x to 3.4x over an RTX 5090), and the defence that held was a maintained algorithm with a credible upgrade path, which is what the ladder is.</p>
+        <p>No hash has stayed free of chips forever. Igneum does not claim to. It states the gain its own model finds, the response takes a week, and both are measured. The model is public: <a href="/bench#counter-asic-2-0-the-numbers">the numbers</a>; the claim is tested by the in-house adversarial pass and the public benchmark. Monero has run on RandomX since November 2019; one chip shipped against it, Bitmain’s Antminer X5 (September 2023), a board of RISC-V chips at 1.46x per joule over a desktop CPU, on silicon believed mining privately from about 2021; RandomX v2 was released on 25 March 2026 with its mainnet activation pending. Bitmain opened Antminer X9 pre-orders on 26 December 2025 for July 2026 delivery, then withdrew the product in mid-May 2026 and refunded buyers before any unit shipped; none has been independently benchmarked. A box with about a 2x per joule edge over the best CPUs, and about 3x over a desktop, was withdrawn rather than face a RandomX re-tune of 1.5x or more. That is the band Igneum’s class v4 model sits in (2.1x to 3.4x over an RTX 5090), and the defence that held was a maintained algorithm with a credible upgrade path, which is what the ladder is.</p>
         <p>One thing takes a person, here and on every chain that exists: writing new code. A chain cannot safely write its own generator, and it cannot safely tell a chip from a wave of honest new cards by hashrate alone. If the design above ever failed, anyone could publish a new generator and miners would switch it on by signalling, as Monero's community can fork. Igneum is built to make that day unlikely, and does not depend on avoiding it.</p>
       </section>
 
       <section id="randomx">
         <h2>Monero's idea, finished for GPUs</h2>
-        <p>RandomX has kept chips off Monero since 2019 (approximate) by making the mining program random, so the hardware that runs it well is the hardware everyone already owns. The one chip announced against it, Bitmain’s Antminer X9 (pre-orders from 26 December 2025 at 1 MH/s and 2,472 W, about USD 5,600), was withdrawn in mid-May 2026 before any unit shipped; RandomX 2.0 shipped on 25 March 2026 (monero-project/monero issue 10270). Igneum takes the same principle to graphics cards and adds what RandomX never had.</p>
+        <p>RandomX has kept Monero on commodity hardware since 2019 by making the mining program random, so the hardware that runs it well is close to the hardware everyone already owns: the one chip that shipped, Bitmain’s Antminer X5 (September 2023), is a board of RISC-V chips at 1.46x per joule over a desktop CPU. The one chip announced against it, Bitmain’s Antminer X9 (pre-orders from 26 December 2025 at 1 MH/s and 2,472 W, about USD 5,600), was withdrawn in mid-May 2026 before any unit shipped; RandomX 2.0 shipped on 25 March 2026 with its mainnet activation pending (monero-project/monero issue 10270). Igneum takes the same principle to graphics cards and adds what RandomX never had.</p>
         <div class="tbl"><table>
           <thead><tr><th>Property</th><th>RandomX, Monero</th><th>Igneum</th></tr></thead>
           <tbody>
@@ -469,7 +469,7 @@ body.all .pager{display:none}
             <tr><td>Changes over time</td><td>None. A fixed design, unchanged for seven years</td><td>A new program every hour, its memory pattern with it; era draws and reserved families on a schedule fixed at genesis. Nobody touches it</td></tr>
             <tr><td>Seed grinding</td><td>Not applicable, the program comes from the hash input</td><td>Closed by a verifiable delay between seed and program</td></tr>
             <tr><td>Useful work</td><td>None. Hashing only</td><td>Every NVIDIA card from 8 GB proves; 12 GB and up mine and prove; 24 GB on the stock server (eleven rented cards, RTX 3060 to RTX 5090, 6 October 2026); they sell proofs to other chains. AMD and Apple cards mine, and a prover for them lands when a zkVM ships one</td></tr>
-            <tr><td>Track record</td><td>About seven years without a shipped chip; the one announced, Bitmain’s Antminer X9, was withdrawn in May 2026 before launch</td><td>Zero years. Every number above is measured and logged with the commands that produced it. The specification, reference hash, test vectors and simulators are public now (git.igneum.network/igneum-network/spec). The node, the miner and the wallet follow to the same host as the repository is published</td></tr>
+            <tr><td>Track record</td><td>About seven years with one shipped chip, Bitmain’s Antminer X5 (September 2023), at 1.46x per joule over a desktop CPU; the one announced beyond it, Bitmain’s Antminer X9, was withdrawn in May 2026 with zero units; RandomX v2 released 25 March 2026, activation pending</td><td>Zero years. Every number above is measured and logged with the commands that produced it. The specification, reference hash, test vectors and simulators are public now (git.igneum.network/igneum-network/spec). The node, the miner and the wallet follow to the same host as the repository is published</td></tr>
           </tbody>
         </table></div>
         <p>Measured so far: the same hourly program, generated on an Apple M5 Max, compiled by Apple's Metal and NVIDIA's CUDA on an RTX 5090, produced identical hashes on both, 192 of 192 across two programs. On a 1 GB dataset the 5090 ran at about 228 million hashes a second and the Mac at about 45 million, both bound by random memory access rather than arithmetic. Those are prototype figures, not mining rates. The first prototype dataset was a closed-form function, and a miner could compute items instead of loading them: measured 111x faster that way on the Mac. The 256 MB cache construction replaced it on 3 October 2026. With the cache, computing items on the fly runs 4.8x slower than loading them, measured on the Mac, and the honest rate is unchanged on both vendors. Open: the same shortcut ratio on NVIDIA and on a discrete AMD card, and the time-memory trade-off between the two measured points. Inside the 5090's 96 MB cache the same program ran nearly six times faster, which is why the dataset starts at 2 GB and grows. On 4 October 2026 the live devnet crossed an hourly program change on all three vendors with no pause and no rejected block: a Mac at 26.7 million hashes a second, an RTX 5090 at 123 million and an integrated AMD chip at 2.7 million, every hash doing 128 distinct reads of the memory-hard dataset.</p>
@@ -808,7 +808,7 @@ body.all .pager{display:none}
         <p>Here are the limits, stated before anyone else states them.</p>
         <ul>
           <li><strong>A proof in seconds.</strong> Not at launch. Proving a full block today needs a cluster of 100 to 200 consumer GPUs, approximate, so Igneum launches with proofs within about a minute and tightens as hardware improves. Users still see their transaction land in one second.</li>
-          <li><strong>A chip is impossible.</strong> No. A chip wired for one program is a bad bet, because the program moves before it ships. A programmable chip is not stopped by the moving target: everything it needs is public at genesis and every drawn parameter is firmware to it (an address permute, a rotator, an immediate table), so the defence against it is the latency-shadow work (class v4) and the price per joule, not the schedule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane and 3.4x with one three times better, under class v4 from the first block: a memory-controller chip that stores the whole dataset and carries a GPU-class datapath beside its memory for the 100,000 ops per hash in the shadow, the range running from a chip core as costly per operation as a GPU lane (k = 1, modelled on the 5090’s measured watts at its knee, 7 October 2026) to a core three times better per operation (k about 0.33); the withdrawn Antminer X9’s claimed figure is a ratio against a CPU core, not a GPU lane, so it does not stand for a chip core against us; the ladder’s second rung takes that bracket to about 2.8x (modelled, 7 October 2026). Class v5 then makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item (designed, 7 October 2026). The baseline the work started from, never the launch state: without class v4 the same stored-dataset chip would reach 1.2x per chip and 5x to 9x per joule in our model (6 October 2026); the Ethash chips of this class reached 2.1x to 4.8x (Linzhi Phoenix 2020, Jasminer X4 2021, Antminer E9 2022). The strongest recompute chip we can price, holding the whole 256 MiB cache on-die, reaches under 1x per chip against an RTX 5090 (the published model, 5 October 2026: 0.92x per unit of silicon with a 3x fixed-function allowance, approximate). Sources: the chip model analysis (6 October 2026); the ASIC history’s Ethash rows; Counter ASIC 3.0 item 8 (the chip’s per-joule edge over the RTX 5090 falls from 5.6x to 2.1x on GDDR7 at k = 1 and to 3.4x at a core three times better, the 5090 at 0.2% less rate; gates G1 to G6 passed, 6 October 2026). No hash has stayed free of chips forever; Igneum does not claim to. Monero’s RandomX has held for about seven years; the one chip announced against it, Bitmain’s Antminer X9, was withdrawn in mid-May 2026 before any unit shipped, its claimed core (k about 0.33) never measured. That record says nothing about the price of a chip with the 256 MB cache on its die; that price is a cost model, not a measurement.</li>
+          <li><strong>A chip is impossible.</strong> No. A chip wired for one program is a bad bet, because the program moves before it ships. A programmable chip is not stopped by the moving target: everything it needs is public at genesis and every drawn parameter is firmware to it (an address permute, a rotator, an immediate table), so the defence against it is the latency-shadow work (class v4) and the price per joule, not the schedule (the Horizon lane analysis, 6 October 2026, section 5.4; ledger M32). At launch the strongest chip in our public model reaches 2.1x per joule against an RTX 5090 with a core as good as a GPU lane and 3.4x with one three times better, under class v4 from the first block: a memory-controller chip that stores the whole dataset and carries a GPU-class datapath beside its memory for the 100,000 ops per hash in the shadow, the range running from a chip core as costly per operation as a GPU lane (k = 1, modelled on the 5090’s measured watts at its knee, 7 October 2026) to a core three times better per operation (k about 0.33); the withdrawn Antminer X9’s claimed figure is a ratio against a CPU core, not a GPU lane, so it does not stand for a chip core against us; the ladder’s second rung takes that bracket to about 2.8x (modelled, 7 October 2026). Class v5 then makes the dataset the chain’s own state, so a chip that stores it or recomputes it is wrong on every item (designed, 7 October 2026). The baseline the work started from, never the launch state: without class v4 the same stored-dataset chip would reach 1.2x per chip and 5x to 9x per joule in our model (6 October 2026); the Ethash chips of this class reached 2.1x to 4.8x (Linzhi Phoenix 2020, Jasminer X4 2021, Antminer E9 2022). The strongest recompute chip we can price, holding the whole 256 MiB cache on-die, reaches under 1x per chip against an RTX 5090 (the published model, 5 October 2026: 0.92x per unit of silicon with a 3x fixed-function allowance, approximate). Sources: the chip model analysis (6 October 2026); the ASIC history’s Ethash rows; Counter ASIC 3.0 item 8 (the chip’s per-joule edge over the RTX 5090 falls from 5.6x to 2.1x on GDDR7 at k = 1 and to 3.4x at a core three times better, the 5090 at 0.2% less rate; gates G1 to G6 passed, 6 October 2026). No hash has stayed free of chips forever; Igneum does not claim to. Monero’s RandomX has held its miners on commodity hardware for about seven years: one chip shipped against it, Bitmain’s Antminer X5 (September 2023), at 1.46x per joule over a desktop CPU; the one announced beyond it, the Antminer X9, was withdrawn in mid-May 2026 before any unit shipped, its claimed core (k about 0.33) never measured; RandomX v2 was released on 25 March 2026 with its activation pending. That record says nothing about the price of a chip with the 256 MB cache on its die; that price is a cost model, not a measurement.</li>
           <li><strong>A guaranteed income floor.</strong> No. External proving is a small market today. Igneum's miners' electricity cost in it is close to power, but the price they must charge is the subsidy they forgo, which falls as one over network hash: an edge at scale and nothing more.</li>
           <li><strong>A memory-hard prototype on every vendor.</strong> Not yet. The 256 MB cache closed the shortcut on Apple silicon (computing items runs 4.8x slower than loading them, measured 3 October 2026). The same ratio on NVIDIA and on a discrete AMD card is Open.</li>
           <li><strong>Finality in the first month.</strong> No. No checkpoint locks until the 30-day window has 30 days of history. The first month of mainnet is proof of work with a 12-hour depth, and the text above says so wherever a day count appears.</li>

site/miner-bench.json

@@ -854,13 +854,13 @@
       "group": "buy",
       "card": "NVIDIA RTX 4070 Ti Super (16 GB)",
       "mh_s": 41.24,
-      "watts": 142.6,
+      "watts": 137.8,
-      "mh_per_w": 0.289,
+      "mh_per_w": 0.268,
       "driver_os": "NVIDIA driver 615.71.09, Ubuntu 24.04 (CUDA 12.8.1 image)",
-      "source": "model sweep 2026-10-08, row 2 (a rented card, result cb2-rtx-4070-ti-super-7325-result.json; 09:26Z)",
+      "source": "model sweep 2026-10-08, row 2 (a rented card, result cb2-rtx-4070-ti-super-7325-result.json; 09:26Z); the class v4 watts rerun, 8 October 2026 (result cb4-rtx-4070-ti-super-5733-result.json, the v4-devnet-epoch0 pack, sub-version 3, three runs of about 30 s, the class v3 pack paired on the same host)",
-      "note": "rented single-card host, 0.10 h; power.draw mean 142.6 W (max 145.2, limit 285 W), SM 2,885 MHz mean, memory 10,251 MHz, 47 C, the SW thermal bit set with no rate effect (three runs within 0.02 percent); self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (41.37 MH/s, fingerprint matched); read ceiling 41.6 MH/s, the hash at 0.99 of it. The Ada 192-bit bus class: the same MH per watt as the 4070 Ti; the extra 4 GB buys headroom, not rate. Watts are class v3 (read 8 October 2026, 11:4x UK): the fleet's bench pack was the class v3 program (program_class v3, generator 3, load_class mx8-erad810f22d), so this row's watts and MH per watt are class v3 figures; the rate holds under class v4 (memory-bound: a 5070 Ti measured 78.7 MH/s at 141 W on class v3 and 78.8 at 224 W on class v4). The class v4 watts rerun on the same models lands with its date, the v3 watts kept beside as the shadow premium per card",
+      "note": "rented single-card host, 0.10 h; power.draw mean 142.6 W (max 145.2, limit 285 W), SM 2,885 MHz mean, memory 10,251 MHz, 47 C, the SW thermal bit set with no rate effect (three runs within 0.02 percent); self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (41.37 MH/s, fingerprint matched); read ceiling 41.6 MH/s, the hash at 0.99 of it. The Ada 192-bit bus class: the same MH per watt as the 4070 Ti; the extra 4 GB buys headroom, not rate. Class v4 watts (8 October 2026, the rerun on the frozen v4-devnet-epoch0 pack, self-test PASS): 137.8 W at 36.93 MH/s, 0.268 MH per watt; the class v3 pack on the same host read 102.3 W at the same rate, so the shadow premium on this card is +34.7 percent of watts for no rate (the class is memory-bound). this host is a 210 W, 2,400 MHz board at 36.9 MH/s on both classes against the morning board's 41.2, so the rate reads as a range with the host noted; the premium is smaller than the 5070's because this board sits nearer its cap",
-      "watts_class": "v3",
+      "watts_display": "137.8 (class v4)",
-      "watts_display": "142.6 (class v3)"
+      "mh_s_display": "37 to 41 by board (36.93 on this host)"
     },
     {
       "generator": "v2",
@@ -902,13 +902,12 @@
       "group": "buy",
       "card": "NVIDIA RTX 4080 (16 GB)",
       "mh_s": 40.71,
-      "watts": 128.6,
+      "watts": 185.6,
-      "mh_per_w": 0.317,
+      "mh_per_w": 0.219,
       "driver_os": "NVIDIA driver 595.84, Ubuntu 24.04 (CUDA 12.8.1 image)",
-      "source": "model sweep 2026-10-08, row 4 (a rented card, result cb2-rtx-4080-16-gb-7347-result.json; 09:28Z)",
+      "source": "model sweep 2026-10-08, row 4 (a rented card, result cb2-rtx-4080-16-gb-7347-result.json; 09:28Z); the class v4 watts rerun, 8 October 2026 (result cb4-rtx-4080-16-gb-7107-result.json, the v4-devnet-epoch0 pack, sub-version 3, three runs of about 30 s, the class v3 pack paired on the same host)",
-      "note": "rented single-card host, 0.15 h; power.draw mean 128.6 W (max 130.5, limit 320 W), SM 2,776 MHz mean, memory 10,801 MHz, 38 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (40.80 MH/s, fingerprint matched); read ceiling 41.0 MH/s, the hash at 0.99 of it. One percent under the 4070 Ti Super at 14 W less: the Ada 16 GB tier is a 41 MH/s tier whichever card. Watts are class v3 (read 8 October 2026, 11:4x UK): the fleet's bench pack was the class v3 program (program_class v3, generator 3, load_class mx8-erad810f22d), so this row's watts and MH per watt are class v3 figures; the rate holds under class v4 (memory-bound: a 5070 Ti measured 78.7 MH/s at 141 W on class v3 and 78.8 at 224 W on class v4). The class v4 watts rerun on the same models lands with its date, the v3 watts kept beside as the shadow premium per card",
+      "note": "rented single-card host, 0.15 h; power.draw mean 128.6 W (max 130.5, limit 320 W), SM 2,776 MHz mean, memory 10,801 MHz, 38 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (40.80 MH/s, fingerprint matched); read ceiling 41.0 MH/s, the hash at 0.99 of it. One percent under the 4070 Ti Super at 14 W less: the Ada 16 GB tier is a 41 MH/s tier whichever card. Class v4 watts (8 October 2026, the rerun on the frozen v4-devnet-epoch0 pack, self-test PASS): 185.6 W at 40.73 MH/s, 0.219 MH per watt; the class v3 pack on the same host read 128.1 W at the same rate, so the shadow premium on this card is +44.9 percent of watts for no rate (the class is memory-bound). the same board as the morning row (offer 54551253; the v3 draw repeats to half a watt); the 256-bit board's premium sits above the 192-bit cards' third",
-      "watts_class": "v3",
+      "watts_display": "185.6 (class v4)"
-      "watts_display": "128.6 (class v3)"
     },
     {
       "generator": "v2",
@@ -968,19 +967,18 @@
       "group": "buy",
       "card": "NVIDIA RTX 4060 Ti (16 GB)",
       "mh_s": 20.07,
-      "watts": 79.2,
+      "watts": 102.3,
-      "mh_per_w": 0.253,
+      "mh_per_w": 0.196,
       "driver_os": "NVIDIA driver 595.71.05, Ubuntu 24.04 (CUDA 12.8.1 image)",
-      "source": "model sweep 2026-10-08, row 7 (a rented card, result cb2-rtx-4060-ti-16-gb-7364-result.json; 09:33Z)",
+      "source": "model sweep 2026-10-08, row 7 (a rented card, result cb2-rtx-4060-ti-16-gb-7364-result.json; 09:33Z); the class v4 watts rerun, 8 October 2026 (result cb4-rtx-4060-ti-16-gb-6679-result.json, the v4-devnet-epoch0 pack, sub-version 3, three runs of about 30 s, the class v3 pack paired on the same host)",
-      "note": "rented single-card host, 0.22 h; power.draw mean 79.2 W (max 86.2, limit 165 W), SM 2,836 MHz mean, memory 8,751 MHz, 63 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (20.10 MH/s, fingerprint matched). Repeats the 7 October number (20.10 then, 20.07 now); the one card of the sweep well under its probed read ceiling (0.65 of 30.9 MH/s: the 128-bit bus with the large L2 makes the chase probe optimistic), so 20 MH/s at 79 W is the card's rate; 16 GB holds any class with room. Watts are class v3 (read 8 October 2026, 11:4x UK): the fleet's bench pack was the class v3 program (program_class v3, generator 3, load_class mx8-erad810f22d), so this row's watts and MH per watt are class v3 figures; the rate holds under class v4 (memory-bound: a 5070 Ti measured 78.7 MH/s at 141 W on class v3 and 78.8 at 224 W on class v4). The class v4 watts rerun on the same models lands with its date, the v3 watts kept beside as the shadow premium per card",
+      "note": "rented single-card host, 0.22 h; power.draw mean 79.2 W (max 86.2, limit 165 W), SM 2,836 MHz mean, memory 8,751 MHz, 63 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (20.10 MH/s, fingerprint matched). Repeats the 7 October number (20.10 then, 20.07 now); the one card of the sweep well under its probed read ceiling (0.65 of 30.9 MH/s: the 128-bit bus with the large L2 makes the chase probe optimistic), so 20 MH/s at 79 W is the card's rate; 16 GB holds any class with room. Class v4 watts (8 October 2026, the rerun on the frozen v4-devnet-epoch0 pack, self-test PASS): 102.3 W at 20.1 MH/s, 0.196 MH per watt; the class v3 pack on the same host read 76.6 W at the same rate, so the shadow premium on this card is +33.6 percent of watts for no rate (the class is memory-bound). the same board as the 7 October row (offer 47543124); the rate is the same on every 4060 Ti host and both classes (20.07 to 20.10)",
       "hive": {
         "core_mhz": null,
         "mem_mhz": null,
         "pl_w": null,
         "label": "stock (rented card, no clock control on the host; no measured tune point)"
       },
-      "watts_class": "v3",
+      "watts_display": "102.3 (class v4)"
-      "watts_display": "79.2 (class v3)"
     },
     {
       "generator": "v2",
@@ -992,19 +990,19 @@
       "group": "buy",
       "card": "NVIDIA RTX 5070 (12 GB)",
       "mh_s": 51.81,
-      "watts": 110.8,
+      "watts": 176.1,
-      "mh_per_w": 0.468,
+      "mh_per_w": 0.334,
       "driver_os": "NVIDIA driver 580.173.02, Ubuntu 24.04 (CUDA 12.8.1 image)",
-      "source": "model sweep 2026-10-08, row 8 (a rented card, result cb2-rtx-5070-12-gb-8750-result.json; 09:35Z)",
+      "source": "model sweep 2026-10-08, row 8 (a rented card, result cb2-rtx-5070-12-gb-8750-result.json; 09:35Z); the class v4 watts rerun, 8 October 2026 (result cb4-rtx-5070-12-gb-5732-result.json, the v4-devnet-epoch0 pack, sub-version 3, three runs of about 30 s, the class v3 pack paired on the same host)",
-      "note": "rented single-card host, 0.09 h; power.draw mean 110.8 W (max 112.0, limit 250 W), SM 2,851 MHz mean, memory 13,801 MHz, 60 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (51.98 MH/s, fingerprint matched); read ceiling 52.3 MH/s, the hash at 0.99 of it. Repeats the 7 October row (52.01 then, 51.82 now) at 8 W more on this host; second to the 5070 Ti in MH per watt among consumer cards (GDDR7 lifts Blackwell here, not SM count); 12 GB holds the class v4 set with 10 GB spare. Watts are class v3 (read 8 October 2026, 11:4x UK): the fleet's bench pack was the class v3 program (program_class v3, generator 3, load_class mx8-erad810f22d), so this row's watts and MH per watt are class v3 figures; the rate holds under class v4 (memory-bound: a 5070 Ti measured 78.7 MH/s at 141 W on class v3 and 78.8 at 224 W on class v4). The class v4 watts rerun on the same models lands with its date, the v3 watts kept beside as the shadow premium per card",
+      "note": "rented single-card host, 0.09 h; power.draw mean 110.8 W (max 112.0, limit 250 W), SM 2,851 MHz mean, memory 13,801 MHz, 60 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (51.98 MH/s, fingerprint matched); read ceiling 52.3 MH/s, the hash at 0.99 of it. Repeats the 7 October row (52.01 then, 51.82 now) at 8 W more on this host; second to the 5070 Ti in MH per watt among consumer cards (GDDR7 lifts Blackwell here, not SM count); 12 GB holds the class v4 set with 10 GB spare. Class v4 watts (8 October 2026, the rerun on the frozen v4-devnet-epoch0 pack, self-test PASS): 176.1 W at 58.89 MH/s, 0.334 MH per watt; the class v3 pack on the same host read 113.1 W at the same rate, so the shadow premium on this card is +55.7 percent of watts for no rate (the class is memory-bound). board-to-board spread: this host 58.9 MH/s on both classes, the morning host 51.8 (GDDR7 memory clocks differ by board), so the rate reads as a range with the host noted",
       "hive": {
         "core_mhz": null,
         "mem_mhz": null,
         "pl_w": null,
         "label": "stock (rented card, no clock control on the host; no measured tune point)"
       },
-      "watts_class": "v3",
+      "watts_display": "176.1 (class v4)",
-      "watts_display": "110.8 (class v3)"
+      "mh_s_display": "52 to 59 by board (58.89 on this host)"
     },
     {
       "generator": "v2",
@@ -1016,19 +1014,18 @@
       "group": "buy",
       "card": "NVIDIA RTX 4070 Super (12 GB)",
       "mh_s": 31.24,
-      "watts": 100.2,
+      "watts": 108.4,
-      "mh_per_w": 0.312,
+      "mh_per_w": 0.288,
       "driver_os": "NVIDIA driver 580.178.04, Ubuntu 24.04 (CUDA 12.8.1 image)",
-      "source": "model sweep 2026-10-08, row 9 (a rented card, result cb2-rtx-4070-super-12--8582-result.json; 09:36Z)",
+      "source": "model sweep 2026-10-08, row 9 (a rented card, result cb2-rtx-4070-super-12--8582-result.json; 09:36Z); the class v4 watts rerun, 8 October 2026 (result cb4-rtx-4070-super-12--6238-result.json, the v4-devnet-epoch0 pack, sub-version 3, three runs of about 30 s, the class v3 pack paired on the same host)",
-      "note": "rented single-card host, 0.13 h; power.draw mean 100.2 W (max 103.9) under a 110 W host cap (stock 220 W), SM 2,764 MHz mean, memory 10,251 MHz, 53 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (31.29 MH/s, fingerprint matched); read ceiling 34.4 MH/s, the hash at 0.91 of it. Lands on the 4070 Ti's number (31.26 on 7 October) at 7 W less (the same 192-bit 21 Gbps bus); the host's 110 W cap cost no rate, a tune-down reading in itself: an owner can cap a 4070 Super at half its stock power and lose nothing on class v4. Watts are class v3 (read 8 October 2026, 11:4x UK): the fleet's bench pack was the class v3 program (program_class v3, generator 3, load_class mx8-erad810f22d), so this row's watts and MH per watt are class v3 figures; the rate holds under class v4 (memory-bound: a 5070 Ti measured 78.7 MH/s at 141 W on class v3 and 78.8 at 224 W on class v4). The class v4 watts rerun on the same models lands with its date, the v3 watts kept beside as the shadow premium per card",
+      "note": "rented single-card host, 0.13 h; power.draw mean 100.2 W (max 103.9) under a 110 W host cap (stock 220 W), SM 2,764 MHz mean, memory 10,251 MHz, 53 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (31.29 MH/s, fingerprint matched); read ceiling 34.4 MH/s, the hash at 0.91 of it. Lands on the 4070 Ti's number (31.26 on 7 October) at 7 W less (the same 192-bit 21 Gbps bus); the host's 110 W cap cost no rate, a tune-down reading in itself: an owner can cap a 4070 Super at half its stock power and lose nothing on class v4. Class v4 watts (8 October 2026, the rerun on the frozen v4-devnet-epoch0 pack, self-test PASS): 108.4 W at 31.25 MH/s, 0.288 MH per watt; the class v3 pack on the same host read 99.2 W at the same rate, so the shadow premium on this card is +9.3 percent of watts for no rate (the class is memory-bound). the same board as the morning row (host offer 51485188), capped at 110 W by the host (stock 220) with the SW power-cap bit set the whole run: the cap absorbs the class v4 stage's extra draw (the SM clock drops 10 percent, the rate does not move), so the premium is 9 percent here against a third on uncapped Ada boards; a power cap near half stock costs a 192-bit Ada card nothing on class v4",
       "hive": {
         "core_mhz": null,
         "mem_mhz": null,
         "pl_w": null,
         "label": "stock (rented card, no clock control on the host; no measured tune point)"
       },
-      "watts_class": "v3",
+      "watts_display": "108.4 (class v4)"
-      "watts_display": "100.2 (class v3)"
     },
     {
       "generator": "v2",
@@ -1279,19 +1276,18 @@
       "card": "NVIDIA RTX 4070 Ti (12 GB)",
       "group": "buy",
       "mh_s": 31.24,
-      "watts": 95.4,
+      "watts": 155.3,
-      "mh_per_w": 0.327,
+      "mh_per_w": 0.201,
       "driver_os": "NVIDIA driver 580.126.09, Ubuntu 24.04 (CUDA 12.8.1 image)",
-      "source": "model sweep 2026-10-08, row 20 (a rented card, result cb2-rtx-4070-ti-12-gb-0695-result.json; 09:57Z)",
+      "source": "model sweep 2026-10-08, row 20 (a rented card, result cb2-rtx-4070-ti-12-gb-0695-result.json; 09:57Z); the class v4 watts rerun, 8 October 2026 (result cb4-rtx-4070-ti-12-gb-5744-result.json, the v4-devnet-epoch0 pack, sub-version 3, three runs of about 30 s, the class v3 pack paired on the same host)",
-      "note": "rented single-card host, 0.18 h; power.draw mean 95.4 W (max 96.7, limit 285 W), SM 2,825 MHz mean, memory 10,251 MHz, 49 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (31.28 MH/s, fingerprint matched); read ceiling 31.7 MH/s, the hash at 0.99 of it. Repeats the 7 October rate to 0.07 percent on another provider at 12 W less; the 192-bit Ada pair (4070 Ti, 4070 Super) land on one number, 31.2 MH/s under 100 W. Watts are class v3 (read 8 October 2026, 11:4x UK): the fleet's bench pack was the class v3 program (program_class v3, generator 3, load_class mx8-erad810f22d), so this row's watts and MH per watt are class v3 figures; the rate holds under class v4 (memory-bound: a 5070 Ti measured 78.7 MH/s at 141 W on class v3 and 78.8 at 224 W on class v4). The class v4 watts rerun on the same models lands with its date, the v3 watts kept beside as the shadow premium per card",
+      "note": "rented single-card host, 0.18 h; power.draw mean 95.4 W (max 96.7, limit 285 W), SM 2,825 MHz mean, memory 10,251 MHz, 49 C, no throttle reason; self-test PASS (96 of 96 vector lanes); the class v5 kit holds the rate (31.28 MH/s, fingerprint matched); read ceiling 31.7 MH/s, the hash at 0.99 of it. Repeats the 7 October rate to 0.07 percent on another provider at 12 W less; the 192-bit Ada pair (4070 Ti, 4070 Super) land on one number, 31.2 MH/s under 100 W. Class v4 watts (8 October 2026, the rerun on the frozen v4-devnet-epoch0 pack, self-test PASS): 155.3 W at 31.26 MH/s, 0.201 MH per watt; the class v3 pack on the same host read 113.8 W at the same rate, so the shadow premium on this card is +36.5 percent of watts for no rate (the class is memory-bound). the rate matches the morning and 7 October rows on a third host (no host spread on this card); driver 570.169 ran the class v4 pack clean",
       "hive": {
         "core_mhz": null,
         "mem_mhz": null,
         "pl_w": null,
         "label": "stock (rented card, no clock control on the host; no measured tune point)"
       },
-      "watts_class": "v3",
+      "watts_display": "155.3 (class v4)"
-      "watts_display": "95.4 (class v3)"
     },
     {
       "generator": "v2",

site/randomx.html

@@ -221,7 +221,7 @@
 </section>
 <section class="section compact">
 <div class="container">
-<div class="derived"><p>RandomX has kept chips off Monero since 2019 (approximate) by making the mining program random, so the hardware that runs it well is the hardware everyone already owns. The one chip announced against it, Bitmain’s Antminer X9 (pre-orders from 26 December 2025 at 1 MH/s and 2,472 W, about USD 5,600), was withdrawn in mid-May 2026 before any unit shipped; RandomX 2.0 shipped on 25 March 2026 (monero-project/monero issue 10270). Igneum takes the same principle to graphics cards and adds what RandomX never had.</p>
+<div class="derived"><p>RandomX has kept Monero on commodity hardware since 2019 by making the mining program random, so the hardware that runs it well is close to the hardware everyone already owns: the one chip that shipped, Bitmain’s Antminer X5 (September 2023), is a board of RISC-V chips at 1.46x per joule over a desktop CPU. The one chip announced against it, Bitmain’s Antminer X9 (pre-orders from 26 December 2025 at 1 MH/s and 2,472 W, about USD 5,600), was withdrawn in mid-May 2026 before any unit shipped; RandomX 2.0 shipped on 25 March 2026 with its mainnet activation pending (monero-project/monero issue 10270). Igneum takes the same principle to graphics cards and adds what RandomX never had.</p>
         <div class="tbl"><table>
           <thead><tr><th>Property</th><th>RandomX, Monero</th><th>Igneum</th></tr></thead>
           <tbody>
@@ -232,7 +232,7 @@
             <tr><td>Changes over time</td><td>None. A fixed design, unchanged for seven years</td><td>A new program every hour, its memory pattern with it; era draws and reserved families on a schedule fixed at genesis. Nobody touches it</td></tr>
             <tr><td>Seed grinding</td><td>Not applicable, the program comes from the hash input</td><td>Closed by a verifiable delay between seed and program</td></tr>
             <tr><td>Useful work</td><td>None. Hashing only</td><td>Every NVIDIA card from 8 GB proves; 12 GB and up mine and prove; 24 GB on the stock server (eleven rented cards, RTX 3060 to RTX 5090, 6 October 2026); they sell proofs to other chains. AMD and Apple cards mine, and a prover for them lands when a zkVM ships one</td></tr>
-            <tr><td>Track record</td><td>About seven years without a shipped chip; the one announced, Bitmain’s Antminer X9, was withdrawn in May 2026 before launch</td><td>Zero years. Every number above is measured and logged with the commands that produced it. The specification, reference hash, test vectors and simulators are public now (git.igneum.network/igneum-network/spec). The node, the miner and the wallet follow to the same host as the repository is published</td></tr>
+            <tr><td>Track record</td><td>About seven years with one shipped chip, Bitmain’s Antminer X5 (September 2023), at 1.46x per joule over a desktop CPU; the one announced beyond it, Bitmain’s Antminer X9, was withdrawn in May 2026 with zero units; RandomX v2 released 25 March 2026, activation pending</td><td>Zero years. Every number above is measured and logged with the commands that produced it. The specification, reference hash, test vectors and simulators are public now (git.igneum.network/igneum-network/spec). The node, the miner and the wallet follow to the same host as the repository is published</td></tr>
           </tbody>
         </table></div>
         <p>Measured so far: the same hourly program, generated on an Apple M5 Max, compiled by Apple's Metal and NVIDIA's CUDA on an RTX 5090, produced identical hashes on both, 192 of 192 across two programs. On a 1 GB dataset the 5090 ran at about 228 million hashes a second and the Mac at about 45 million, both bound by random memory access rather than arithmetic. Those are prototype figures, not mining rates. The first prototype dataset was a closed-form function, and a miner could compute items instead of loading them: measured 111x faster that way on the Mac. The 256 MB cache construction replaced it on 3 October 2026. With the cache, computing items on the fly runs 4.8x slower than loading them, measured on the Mac, and the honest rate is unchanged on both vendors. Open: the same shortcut ratio on NVIDIA and on a discrete AMD card, and the time-memory trade-off between the two measured points. Inside the 5090's 96 MB cache the same program ran nearly six times faster, which is why the dataset starts at 2 GB and grows. On 4 October 2026 the live devnet crossed an hourly program change on all three vendors with no pause and no rejected block: a Mac at 26.7 million hashes a second, an RTX 5090 at 123 million and an integrated AMD chip at 2.7 million, every hash doing 128 distinct reads of the memory-hard dataset.</p></div>

tools/ci/ledger-text-check.mjs

@@ -22,7 +22,7 @@ const REQUIRED = {
     ['G4', 'admin keys in consensus'],
     ['X8', 'No listing is arranged, promised or sought by the project'],
     ['X31', 'The public testnet is armed: three seed nodes and the public RPC are up, and it opens on the go word.'],
-    ['C2', '2019 (approximate)'],
+    ['C2', 'Monero has run on RandomX since November 2019'],
     ['X34', 'was withdrawn in mid-May 2026 before any unit shipped; RandomX 2.0 shipped on 25 March 2026'],
     ['X36', 'Bitmain opened Antminer X9 pre-orders on 26 December 2025 for July 2026 delivery, then withdrew the product in mid-May 2026 and refunded buyers before any unit shipped; none has been independently benchmarked.'],
     ['X35', 'so the launch number is the class v4 row'],
@@ -61,7 +61,7 @@ const REQUIRED = {
     ['G3', 'there is no team page'],
     ['G4', 'no admin keys in consensus'],
     ['G6', 'Pools can be bypassed on transaction choice'],
-    ['X34', 'About seven years without a shipped chip; the one announced, Bitmain'],
+    ['X34', 'About seven years with one shipped chip, Bitmain'],
     ['C3', 'Chips arrived, as on Kaspa, whose hash was designed to welcome them'],
     ['C3', 'Kaspa has run in production since 2021 (approximate)'],
     ['C5', 'Inclusion is not confirmation on either chain'],