diff --git a/docs/plans/counter-asic-2-rollout.md b/docs/plans/counter-asic-2-rollout.md
index 998c59fc6..adcc24332 100644
--- a/docs/plans/counter-asic-2-rollout.md
+++ b/docs/plans/counter-asic-2-rollout.md
@@ -104,7 +104,7 @@ CORRECTION at 23:08 UTC, from the shipper's own finding: the relay machine named
 
 ### 7c. The morning's hands list (for the 07:45 BST summary)
 
-1. Start PC 1's app (its engine quit at 22:31:06Z on 5 October and has no self-relaunch; the box has no relay agent): relaunch Igneum Miner, let it take 0.3.11 from the manifest, and confirm its STATUS line and the digest 0139ab9d.... Until then the devnet runs short PC 1's 141 MH/s and PC 1 carries no 0.3.11.
+1. Start PC 1's app (its engine quit at 22:31:06Z on 5 October and has no self-relaunch; the box has no relay agent): relaunch Igneum Miner, let it take 0.3.11 from the manifest, and confirm its STATUS line and the digest 0139ab9d...; then it reconnects. Expect PC 1 to show "0 peers" until it updates: N4 = N5 = 154,800 (epoch 43) lands at about 03:30 UTC on 6 October (DAA 139,1xx at 23:1x UTC at 1.002 DAA/s), so class v3 and proving v1 switch on while everyone sleeps; the Mac, the laptop and PC 2 cross it on 0.3.11, and a 0.3.10 node without the class v3 field in its digest is refused at its next handshake by every nine-field peer: the digest rule working as written, not a fault. Until the relaunch the devnet runs short PC 1's 141 MH/s.
 2. Then the 16:00Z check of C1 (7a): every prover on 0.3.11, else H = 210,000 is republished at tip + 86,400.
 3. The two open faults for a person at the machine: the source of PC 1's 22:31 quit and PC 2's 20:01 quit (the administrator-prompt class; the two-minute test of 4a), and the AMD clock and power sweep rows on the 9070 XT (owed; the card is present).
 4. Not on the list any more: the eGPU reseat (the drops were readings of PC 2).
diff --git a/docs/plans/counter-asic-2-status.md b/docs/plans/counter-asic-2-status.md
index 94342511d..1396e077d 100644
--- a/docs/plans/counter-asic-2-status.md
+++ b/docs/plans/counter-asic-2-status.md
@@ -643,3 +643,5 @@ The shipper found it from the intake: PC 2 has two new engine runs (win-1ccfe586
 23:09. PC 2 order, final for the night (one job at a time, each on the previous release): the shipper's combined suites-and-exes job; the aggregation-cost restore (20 s, queued behind it: the prover back on); the prover-floor build 4 (5 min) and sweep 2 (4 min); the aggregation-cost re-run (20 min); "PC 2 clear" and the 0.3.11 update-now; the ledger-pc2 M16 job (4 min); the repro benchmark (14 min: the 5090 CUDA and OpenCL, the gfx1036, the proving step, the 2^21 against 2^24 job-size bench). PC 1: nothing (its app down; the morning's first item).
 
 23:10. C32's premise withdrawn (the reviewer, from the code and the relay finding): an app update does not clear the jobs folder (the "AMD kit gone" read was PC 2, where it was never fetched); what stands is that an app restart aborts every running job, so the update-now is sequenced after the jobs that must not die, and the kit presence check is hygiene; rollout plan 4a reworded; the bench-log line 39f02ff on the stopped AMD agent's branch is corrected by this note (its owner is stopped).
+
+23:11. For the morning: N4 = N5 = 154,800 (epoch 43) lands at about 03:30 UTC on 6 October (DAA 139,1xx at 23:1x at 1.002 DAA/s): class v3 and proving v1 switch on while everyone sleeps, the Mac, the laptop and PC 2 cross it on 0.3.11; PC 1 (down, 0.3.10, no class v3 field in its digest) shows "0 peers" at its relaunch until it takes 0.3.11, the digest rule working as written; 7c's first line says relaunch, update, reconnect.